JPH03292019A - Data interpolating device - Google Patents

Abstract

PURPOSE:To improve the data quality at the time of the occurrence of an error exceeding an error check capability by monitoring a difference between an interpolation data and a one preceding line data at all time and outputting forcibly the interpolation data when the difference exceeds a prescribed value. CONSTITUTION:An interpolation processing circuit 30 takes correlation between a current data string d0 and a 2-preceding data string d2 and allows the result of correlation to be an interpolation data dH relating to a one-preceding data string d1. A difference comparator 31 always monitors a difference DF between an A terminal input (d1) and a B terminal input (dH) and outputs a switching signal S to be in the set state (S=1) when the difference exceeds a prescribed value DELTAx. An OR logic circuit 32 sets the state of a select terminal S of a selector 33 to select forcibly the B terminal input (dH) when a check flag F from an error correction detection circuit 22 is in the state (F=1) representing the presence of an error bit or a switching signal S from a differential value comparator 31 is in the state (S=1) representing (DF+¦A-B¦>DELTAx).

Description

[Detailed Description of the Invention] [Summary] The purpose of the present invention is to improve the data quality when an error exceeding the error detection ability occurs, particularly regarding a data interpolation device applied to error control of image data, audio data, etc. an error correction/detection means that corrects the error bit when the number of error bits in the data string is less than or equal to X bits, and outputs a detection signal indicating the presence of error bits when the number exceeds A holding means for holding the data string that has passed through the detection means in time order, a generating means for generating interpolated data based on the data string held in the holding means, and normally selecting data one column before,
a first selection means for selecting interpolated data when a detection signal indicating presence of two error bits is output; a difference value detection means for detecting a difference value between the interpolated data and data one column before; A second selection means is provided which selects the output of the first selection means and selects interpolated data when the difference value exceeds a predetermined value.

[Industrial application field]

The present invention relates to a data interpolation device, and particularly to a data interpolation device that can be used for error control of image data, audio data, and the like.

In data transmission that uses the atmosphere as a route, such as microwave communication and satellite broadcasting, the reception (tC/N ratio) may decrease due to the influence of rain.

In order to ensure sufficient data quality even when the received C/N ratio decreases, error correction of transmission codes is essential.

For example, A-mode and B-mode frames (i,
350 bits/frame)
SEC-DED has 1-bit error correction capability and 2-bit error detection capability and is used in normal mode, while DEC-TED has 2-bit error correction capability and 3-bit error detection capability. It has error detection capability and is used in enhanced mode.

In general, error control using error correction codes is possible when each information symbol is dispersed into a code pattern other than a code word due to some error, and when the dispersed region is isolated, error correction is possible. Furthermore, if the distributed regions partially overlap, although correction cannot be made, it is possible to detect errors. FIG. 3(a) is a conceptual diagram of error correction, and FIG. 3(b) is a conceptual diagram of error detection. In these figures, a1~
a3 and all~a13 are code words, b, ~b, and ~b13 are regions dispersed by errors, and C1 and C0 are regions of the entire sequence of length n.

In other words, in the enhanced mode described above, if the transmission error is 2 pints or less, it can be corrected (error correction);
It is possible to detect the presence of an error (error detection) when the number of bits exceeds 3 bits, and when an error is detected, data interpolation processing is often performed for the purpose of improving data quality.

[Conventional technology]

FIG. 4 is a diagram showing the main parts of a conventional data interpolation device.

The data string D1.4 inputted in time order is stored in the first register 11, second register 12, and third register 13 in sequence. That is, the current data string d0 is sent from the register 11, and the previous data string d is sent from the second register 12.
1, the data string d2 two columns before is taken out from the third register 13. do and d2 are input to the interpolation processing circuit 14, and the output d8 of the interpolation processing circuit 14 is input to the A and B terminals of the selector 15 along with d.

The interpolation processing circuit 14 extracts data d1 from one column before the current data column.
This is to generate interpolated data d, for which the current data string d0 and the data d2 two columns before are correlated, and the correlation result is defined as d. The selector 15 selects A according to the state (1 or 0) of the error detection flag F input to the select terminal S.
, input either one of the B terminals as a data string. Output as UT.

F=0 indicates that at least "error detection" was not detected as a result of error correction/detection processing performed on the data d1 one column before. In this case, the selector 15 selects data d in the previous column. F=1 indicates that an error has been detected as a result of error correction/detection processing. In this case, the selector 15 selects interpolated data dH.

Therefore, instead of the "error-detected" data d1 of the previous column, interpolated data d8 of this d can be output, and the data quality at the time of error detection can be improved.

[Problem to be solved by the invention]

However, in such a conventional data interpolation device, data dI of the previous column is determined according to the state of the error detection flag F.
and interpolated data d.
If a bit error that exceeds the error detection capability (maximum of 3 bits in the enhanced mode described above) occurs, the state will be the same as if F = 0, that is, no error was detected, so the data d1 of the previous column containing the focus error There is a problem that ``is selected''.

The present invention was made in view of these problems, and
The purpose is to improve data quality when an error occurs that exceeds the error detection ability.

[Means to solve the problem]

In order to achieve the above object, the present invention has been developed so that the number of error bits in one data string is
If it is less than a bit, the error focus is corrected, while
an error correction/detection means for outputting a detection signal indicating that there is an error focus when the number exceeds X bits and falls below y bits; a holding means for holding the data string that has passed through the error correction/detection means in time order; and holding in the holding means. generating means for generating interpolated data based on the data string that has been detected; and a first selecting means that normally selects the data one column before, but selects the interpolated data when a detection signal indicating that there is an error focus is output. , a difference value detection means for detecting a difference value between the interpolated data and the data one column before, and normally selects the output of the first selection means, but if the difference value exceeds a predetermined value, the interpolated data is and second selection means for selecting.

[Effect]

In the present invention, the difference value between the interpolated data and the data one column before is constantly monitored, and when this difference value exceeds a predetermined value, the interpolated data is forcibly output.

Here, the above-mentioned difference value expresses the magnitude of error variance of data one column before. Therefore, when a multi-focus error that exceeds the error detection ability occurs, interpolated data with a small error variance can be used instead of the data from the previous column that includes a bit error. Data quality can be improved.

〔Example〕

Hereinafter, the present invention will be explained based on the drawings.

FIG. 2 is a diagram showing an embodiment of the data interpolation device according to the present invention.
ulti-ple Sub Nyquist Samp
This is an example applied to an audio playback device.

The received MUSE signal is first subjected to frame deinterleaving processing 20 into frames of 1 and 350 bits, and then subjected to focus deinterleaving processing 21 in which the data focus order in the frame is rearranged to the original arrangement, and predetermined bits are Long data strings are retrieved sequentially. Each data string is subjected to error correction control using a 5EC-DED or DEC-TED correction code in an error correction/detection circuit 22 (error correction/detection means). For example, in reinforcement mode, l
When the number of error bits in a data string is 2 bits or less (corresponding to the X bits described in the gist of the invention), the error bits are corrected; (corresponding to the y bit described above) or below, the detection flag F (corresponding to the detection signal described in the gist of the invention) indicating the presence of error focus is set to a cent shape B (F=1).

Each data string that has passed through the error correction/detection circuit 22 has 16
After passing through the word deinterleaving process 23 of the sample,
The interpolation processing section 24 and the data selection section 25 perform necessary processing, and finally the audio reproduction section 26 converts the signal into an audio output and outputs it.

The interpolation processing unit 24 includes a lujistor 27 as a holding means for sequentially capturing and holding data strings inputted in time order;
It includes a second register 28, a third register 29, and an interpolation processing circuit 30 (generation means), and the current data string d0 is taken out from the first register 27, and the data string d, one column before, is taken out from the second register 28. The third register 29
The data string d2 two columns before is extracted. The interpolation processing circuit 30 interpolates the current data string d0 and the data string d2 two columns before.
The correlation with the data string d1 is calculated by, for example, averaging the discrete distances of the code words, and the correlation result is used as interpolated data d,4 regarding the data string d1 one column before.

The data selection unit 25 includes a difference value comparator 31 (difference value detection means), an OR logic circuit 32, and a selector 33 (first and second selection means), and the selector 33 has a select terminal S
According to the state (1 or O), either the A terminal input (a+) or the B terminal input (dM) is selected and output from the Y terminal. The difference value comparator 31 always calculates the difference value DF (
DF=l A-B l) is monitored, and when the difference value DF exceeds a predetermined value ΔX, the switching signal S is set (S=1
) and output. The OR logic circuit 32 operates when the detection flag F from the error correction/detection circuit 22 is in state a (F=1) indicating that there is an error bit, or when the switching signal S from the difference value comparator 31 is (DF=l A-B l >ΔX
>, the selector 33
Set the state of the select terminal S to 1 and manually input the B terminal (d
8> is forced to be selected.

As described above, in this embodiment, when an error focus exceeding X bits and below y bits occurs in the data d1 one column before (F=1), and when an error bit exceeding y bits occurs and the difference is In any case where the value DF becomes large enough to exceed ΔX (S=1), the interpolated data d9 can be selected in place of the data d1 in the previous column. Therefore, the selected data can be optimized and the data quality can be improved when an error exceeding the error detection ability occurs.

In addition, in this example, an example of application to HDTV was shown, but
Not limited to this, for example, digital communication in general,
It can also be applied to laser discs, compact discs, video discs, DATs, etc. In short, any device may be used as long as it handles data related to the preceding and succeeding bits, such as audio data or image data, and performs error correction control.

〔Effect of the invention〕

According to the present invention, with the above configuration, data selection can be made appropriate when an error exceeding the error detection ability occurs.
Data quality can be improved.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the principle configuration of the present invention, Fig. 2 is a block diagram showing an embodiment of the data interpolation device according to the invention, Fig. 3.4 is a diagram showing a conventional example, and Fig. 3 is a diagram showing a conventional example. FIG. 4, which is a diagram for explaining error correction and error detection, is a configuration diagram of the main part of the data interpolation device. 22...Error correction/detection circuit (error correction/detection means>), 27...Second register (holding means), 28...
...Second register (holding means), 29...
3rd register (holding means), 30... interpolation processing circuit (generation means), 31... difference value comparator (difference value detection means), 33... selector ( (first and second selection means). Diagram 3 explaining error correction and error detection

Claims (1)

[Claims] An error correction system that corrects the error bits when the number of error bits in one data string is x bits or less, and outputs a detection signal indicating the presence of error bits when the number exceeds x bits and is less than or equal to y bits. A detection means, a holding means for holding in time order the data string that has passed through the error correction/detection means, a generating means for generating interpolated data based on the data string held in the holding means, and usually data for one column before. while selecting the interpolated data when a detection signal indicating that there is an error bit is output; and a difference value detecting means for detecting a difference value between the interpolated data and the data one column before. A data interpolation device comprising: a second selection means that normally selects the output of the first selection means, but selects interpolated data when the difference value exceeds a predetermined value.