JPH0328886U - - Google Patents
Info
- Publication number
- JPH0328886U JPH0328886U JP8895789U JP8895789U JPH0328886U JP H0328886 U JPH0328886 U JP H0328886U JP 8895789 U JP8895789 U JP 8895789U JP 8895789 U JP8895789 U JP 8895789U JP H0328886 U JPH0328886 U JP H0328886U
- Authority
- JP
- Japan
- Prior art keywords
- interlaced
- television receiver
- field
- video signal
- display drive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Television Systems (AREA)
Description
第1図は本考案の実施例であるテレビ受像機の
表示部の構成を示すブロツク図、第2図は本実施
例による2つの表示ドライバによる画面の走査の
様子を示す説明図である。
a……第1ドライバによる表示点、b……第2
ドライバによる表示点。
FIG. 1 is a block diagram showing the configuration of a display section of a television receiver according to an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing how the screen is scanned by two display drivers according to this embodiment. a...display point by the first driver, b...second
Display point by driver.
Claims (1)
、各フイールド毎に画面上の全ラインを走査する
ノンインターレース方式のテレビ受像機において
、 入力映像信号の隣接走査線信号の間に補間すべ
き信号を生成する補間信号生成回路と、 テレビ受像機の表示装置上で互いに1ラインず
れて、各々インターレース走査を行う2つの表示
駆動回路と、 入力信号と上記補間信号とを各表示駆動回路に
1:1に接続し、その接続を各フイールド毎に切
り換える接続切換回路と を備えることを特徴とするノンインターレース
受像機。[Scope of Claim for Utility Model Registration] In a non-interlaced television receiver that receives a 2:1 interlaced video signal and scans all lines on the screen for each field, the adjacent scanning line signals of the input video signal an interpolation signal generation circuit that generates a signal to be interpolated between; two display drive circuits that perform interlaced scanning on the display device of a television receiver, shifted by one line from each other; A non-interlaced television receiver comprising: a connection switching circuit that is connected to a display drive circuit in a 1:1 ratio and switches the connection for each field.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8895789U JPH0328886U (en) | 1989-07-28 | 1989-07-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8895789U JPH0328886U (en) | 1989-07-28 | 1989-07-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0328886U true JPH0328886U (en) | 1991-03-22 |
Family
ID=31638552
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8895789U Pending JPH0328886U (en) | 1989-07-28 | 1989-07-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0328886U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008063683A (en) * | 2006-09-06 | 2008-03-21 | Dainippon Printing Co Ltd | Thread-containing print paper and printed product using the same |
-
1989
- 1989-07-28 JP JP8895789U patent/JPH0328886U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008063683A (en) * | 2006-09-06 | 2008-03-21 | Dainippon Printing Co Ltd | Thread-containing print paper and printed product using the same |
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