JPH03288448A - Field-effect transistor - Google Patents

Abstract

PURPOSE:To obtain a field effect transistor excellent in characteristics by using an InAs/GaAs superlattice structure. CONSTITUTION:By molecular beam epitaxial growth method, an undoped GaAs buffer layer 2 is grown on the surface of a semi-insulating GaAs substrate 1. An InAs layer of mono-molecular-layer thickness and a GaAs layer 4 of m-molecular-layer thickness form one unit. A superlattice layer wherein n-periods of the above units are laminated is grown. Further the following are continuously grown; an N-type Al0.15Ga0.85As spacer layer 5, an Si doped N-type Al0.15Ga0.85 As electron supplying layer 6, and an Si-doped N-type GaAs cap layer 7. Hence, as compared with a transistor of conventional structure having equivalent In composition wherein InGaAs is used as the channel, the following are all improved by scores percent: low electric field mobility, mutual conductance, current gain, and cutoff frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a field effect transistor that utilizes two-dimensional electron gas.

[Conventional technology]

G a As / N type A 1. A two-dimensional electron gas transistor using a G a As selectively doped structure is
It has excellent characteristics as a low noise element for high frequency bands.

It is widely used as an amplification element in home satellite broadcast receivers.

In order to further improve the characteristics of this transistor, I n
2. Description of the Related Art Transistors with improved noise characteristics using a selectively doped structure with a GaAs strained layer as a channel are being developed.

IEEE by Hendersen et al.
ELECTRON DEVICE LETTER3vo
The InGaAs strained layer channel transistor published in EDL-7, 1986 will be explained with reference to FIG.

A non-doped GaAs buffer layer 2 with a thickness of 1 μm and a non-doped I layer with a thickness of 150 μm are formed on the surface of a semi-insulating GaAs substrate 1 by molecular beam epitaxial growth (MBE).
n 0.15G ao, g5A s ii channel layer 11, thickness 30 N type A A' 0.15Ga
(1,65As spacer layer 5, Si 3X1018cm
-' doped thickness 350 A 11 (1,15G
ao, g5A S electron supply layer 6, Si 3X10”
A 400 cm-' doped N-type GaAs cap layer 7 is successively grown.

N-type GaAs cap layer 7 is formed by electron beam direct writing method.
and the N-type A
A gate electrode 8 with a thickness of 5 μm is formed, and a source electrode 9 and a drain electrode 10 which are in ohmic contact are formed.

Since the InGaAs electron channel layer 11 has a different lattice constant from the non-doped GaAs buffer layer 2, it is an elastically deformed strained layer.

I that can maintain good crystallinity without generating dislocations
There are restrictions on the thickness due to the nn composition ratio, and usually the In composition is X=0.
．． 15, thickness 150 people is used.

A transistor with InGaAs channel is GaAs
The reason why JnGaAs exhibits higher performance than conventional transistors with a channel is that JnGaAs has a larger electron affinity than GaAs, which increases the electron confinement effect, and InGaAs has better electron transport properties than GaAs. It is said that

[Problem to be solved by the invention]

In order to improve the characteristics of a transistor using InGaAs as a channel, the In composition X must be further increased, but as the composition X increases, the In
The lattice constant ratio between a 1-X As and GaAs increases, and the amount of strain in In X Ga 1-x As increases.

Therefore, the growth mode tends to shift from two-dimensional growth to three-dimensional growth, and dislocations occur accordingly, making it no longer possible to obtain a good crystal.

[Means to solve the problem]

The field effect transistor of the present invention includes a first layer, which is one of a high-purity semiconductor layer and a P-type semiconductor layer, on the surface of a semiconductor substrate.
a semiconductor layer is formed, and a second semiconductor layer having a larger electron affinity and a different lattice constant than the first semiconductor layer, and a third semiconductor layer having the same crystal as the first semiconductor layer. A lattice layer channel is formed, and a third semiconductor layer having low electron affinity is formed thereon.

〔Example〕

An embodiment of the present invention will be described with reference to FIG.

The surface of the semi-insulating GaAs substrate 1 is grown to a thickness of 80° C. by molecular beam epitaxial growth (MBE) at a temperature of 550° C.
Grow a non-doped GaAs buffer layer 2 with 1
A superlattice layer in which an InAs layer 3 with a molecular layer thickness (#3 people) and a GaAs layer 4 with a molecular layer thickness of m (yl=natural number) (ξ3 people) are stacked in n (n=natural number) periods as one unit. Grows further 30 thick N type A 11 o, 15 G
a o, 85 A S spacer layer 5, Si 2X1
0"cm - 'Doped Thickness 400 N Type A j'
(1,15G a O, B5A S electron supply layer 6, Si
400 N-type G doped with 3X10"cm-'
a A s carapace layer 7 is grown continuously.

If the InAs constituting the superlattice were grown to a thickness of two or more molecular layers, the crystallinity would be significantly degraded due to the lattice mismatch with GaAs, which currently is as much as 7%, so a one-molecular layer thickness was used.

In addition, Inx Ga1-XAS of the prior art is equivalent to
To obtain a superlattice with composition X, for example, X=0.
14, the thickness of the GaAs layer 4 constituting the superlattice is m=6
<molecular layer), if X=0.17, m=5, X=0.25
In that case, you should choose m=3.

In such a superlattice made of GaAs and InAS with a thickness of several molecular layers, the wave function of electron carriers is spread throughout the superlattice.

In this example, m=4, n=10<period) and m
A crystal structure having two types of superlattices, n=3 and n=10, was epitaxially grown, and then a recessed gate electrode with a gate length of 0.25 μm was formed using the electron beam direct writing method. 8 was formed, and a source electrode 9 and a drain electrode 10 which were in ohmic contact were formed to fabricate two types of transistors.

As a result, InG of the conventional structure with equivalent In composition
Compared to a transistor whose channel is a A s,
Improvements of several tens of percent in low-field mobility, mutual conductance, current gain, and cut-off frequency were confirmed.

Such property improvement in the superlattice structure is due to InGaA
G growth after s-layer lengthening This is expected to be because good crystallinity can be obtained even with (equivalently) large In composition X because the two-dimensional growth mode is restored during s-layer lengthening.

In this example, a transistor with a selectively doped structure has been described, but an S I
S (Sem1conductor Insulat
The present invention can also be applied to semiconductor type transistors, etc.

〔Effect of the invention〕

By using the InAs/GaAs superlattice structure, a field effect transistor with excellent characteristics was obtained.

Today, when molecular beam epitaxial growth equipment is rapidly developing, the contribution of this field effect transistor is significant.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a field effect transistor according to the prior art. 1... Semi-insulating GaAs substrate, 2... Non-doped G
a As buffer layer, 3...InAs layer (superlattice layer), 4-GaAs layer (superlattice layer), 5-A Ji
' o, 15G a Q, @5A S spacer layer,
6-N type A 10.15Gag, g5AS electron supply layer,
7... N-type GaAs cap layer, 8... Gate electrode, 9... Source electrode, 1o... Drain electrode, 11
- InO, 15Gao, g5As electron channel layer.

Claims (1)

[Claims] A first semiconductor layer, which is one of a high-purity semiconductor layer and a P-type semiconductor layer, is formed on the surface of the semiconductor substrate, and a second semiconductor layer having a larger electron affinity and a different lattice constant than the first semiconductor layer is formed. A superlattice layer channel is formed consisting of a semiconductor layer and a third semiconductor layer having the same crystal as the first semiconductor layer, and a third semiconductor layer having a small electron affinity is formed thereon. field effect transistor.