JPH0328476U - - Google Patents
Info
- Publication number
- JPH0328476U JPH0328476U JP8894389U JP8894389U JPH0328476U JP H0328476 U JPH0328476 U JP H0328476U JP 8894389 U JP8894389 U JP 8894389U JP 8894389 U JP8894389 U JP 8894389U JP H0328476 U JPH0328476 U JP H0328476U
- Authority
- JP
- Japan
- Prior art keywords
- socket
- semiconductor device
- board
- pin
- burn
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 230000001133 acceleration Effects 0.000 claims 1
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Description
第１図ａは本考案の一実施例を示す断面図、ｂ
は絶縁シートを示す正面図、ｃはバーインボード
を示す正面図、第２図ａは従来例のＩＣソケツト
を示す断面図、ｂはバーインボードを示す正面図
である。
１……ＩＣソケツト、２ａ……ソケツト本体、
２ｂ……蓋、３……半導体装置、４……リード、
５……絶縁シート、６……第１のソケツトピン、
７……第２のソケツトピン、８……第３のソケツ
トピン、９……抵抗、１０……Ｖｃｃ（電源）ラ
イン、１１……グランドライン、１２……絶縁シ
ートの貫通孔、３……バーインボード。
Fig. 1a is a sectional view showing an embodiment of the present invention, b
2 is a front view showing an insulating sheet, FIG. 2c is a front view showing a burn-in board, FIG. 2a is a sectional view showing a conventional IC socket, and FIG. 2b is a front view showing a burn-in board. 1...IC socket, 2a...socket body,
2b...Lid, 3...Semiconductor device, 4...Lead,
5... Insulating sheet, 6... First socket pin,
7... Second socket pin, 8... Third socket pin, 9... Resistor, 10... Vcc (power supply) line, 11... Ground line, 12... Through hole in insulating sheet, 3... Bar-in board .
Claims (1)
する際に使用するバーインボード装置において、 少なくとも３組のソケツトピンをもち、試験対
象の半導体装置を収納するＩＣソケツトと、 前記ＩＣソケツトの第１のソケツトピンに接続
される電源ライン及び第２のソケツトピンに接続
されるグランドライン並びに第３のソケツトピン
、電源ライン間に接続される抵抗を備えたＩＣソ
ケツト実装用バーインボードと、 試験対象の半導体装置の特性により半導体装置
のリードを前記ＩＣソケツトのソケツトピンに選
択して電気的に断続させる交換可能な絶縁シート
とを有することを特徴とするバーインボード装置
。[Claims for Utility Model Registration] In a bar-in-board device used when performing reliability and acceleration life tests of semiconductor devices, an IC socket having at least three sets of socket pins and housing a semiconductor device to be tested; A burn-in board for mounting an IC socket, which includes a power line connected to a first socket pin of an IC socket, a ground line connected to a second socket pin, and a resistor connected between the third socket pin and the power line, and a test. 1. A burn-in board device comprising a replaceable insulating sheet that selects and electrically disconnects the leads of the semiconductor device from the socket pins of the IC socket depending on the characteristics of the target semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8894389U JPH0328476U (en) | 1989-07-28 | 1989-07-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8894389U JPH0328476U (en) | 1989-07-28 | 1989-07-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0328476U true JPH0328476U (en) | 1991-03-20 |
Family
ID=31638536
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8894389U Pending JPH0328476U (en) | 1989-07-28 | 1989-07-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0328476U (en) |
-
1989
- 1989-07-28 JP JP8894389U patent/JPH0328476U/ja active Pending
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