JPH03274470A - Power measuring apparatus - Google Patents

Abstract

PURPOSE:To measure power with a reduced error by sampling voltage and current analogue input signals at a predetermined cycle possible to set variably to convert the same to digital data and removing the max. and min. values from the digital data before averaging said data. CONSTITUTION:The clock signal generated from a clock signal generating circuit 3 is altered to successively variably set the sampling cycles of the first and second analogue/digital converters 12, 22 and the analogue instantaneous values of the AC voltage and AC current of a terminal to be measured sampled at a plurality of the variably set cycles are converted to digital values by the converters 12, 22 to be inputted to an operation circuit 4 and power is operated and stored. The max. and min. values are removed from the stored digital values and the average value of the residual values is calculated to be displayed on a display device 5 as a power measured value. In this case, a measuring error up to 500 kHz in the frequency of an input signal is within the range of +0.01% and, even with respect to an input signal having a cycle within a range not satisfying a sampling theorem, power can be measured with a reduced error and it is unnecessary to use an expensive high speed sampling A/D converter and cost can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention is used for measuring alternating current power. In particular, the present invention relates to a power measuring device that calculates AC power using digitally converted instantaneous values of analog input voltage and input current sampled at a predetermined period.

〔overview〕

The present invention provides a power measurement device that calculates AC power using digitally converted instantaneous values of analog input terminals and input terminals sampled at a predetermined period, and by setting the predetermined sampling period variably. This makes it possible to reduce the measurement error even if the frequency input is sampled at a lower frequency that satisfies the sampling theorem corresponding to this frequency.

[Conventional technology]

In conventional examples of this type of power measuring device, there is a range in which the sampling period is one-half or more of the input period, that is, a range in which sampling is performed that does not satisfy the sampling theorem, resulting in large measurement errors. To prevent this, the sampling period of the analog-to-digital converter must be made faster than the maximum period of the input signal component.

The black circles in FIG. 3 indicate locations where the sampling period TAJ of the analog-to-digital converter coincides with a period equal to -2/2 of the input period Tin, that is, a portion where the measurement error becomes large. This area is an area where the relationship between the sampling frequency f5 of the analog-to-digital converter and the input frequency fih does not satisfy the sampling theorem f, 〉2・fin, and the measurement error is in the range of 1 to 0 near this area. It vibrates and becomes unstable.

[Problem to be solved by the invention]

However, in such conventional examples, the analog-to-digital converter for high-speed sampling that has been forced to be used is expensive, and the sampling period that is possible with this analog-to-digital converter (the sampling period of commercially available analog-to-digital converters) is expensive. The disadvantage is that the frequency range of the input that can be measured is determined by the upper limit (there is an upper limit).

SUMMARY OF THE INVENTION The present invention aims to eliminate such drawbacks and to provide a power measuring device that can measure within tolerance without using a high-speed sampling analog-to-digital converter.

[Means to solve the problem]

The present invention comprises: a first input circuit into which an analog signal representing an alternating current voltage at the end to be measured is input; a second input circuit into which an analog signal representing an alternating current at the end to be measured is input; A power measuring device comprising: an arithmetic circuit that calculates the power of the end to be measured from a value input to an input circuit;
Each of the two input circuits includes an analog-to-digital conversion circuit that samples an input analog signal at a predetermined period and converts it into digital data, and includes means for variably setting the predetermined period. do.

Further, the arithmetic circuit may include means for calculating an average value of the input values excluding the maximum value and the minimum value.

[For production]

If sampling that does not satisfy the sampling theorem is performed, the measurement error will increase, but sampling is performed at different sampling periods across the range in which this error increases. If an abnormal point is found, the average value of the measured values excluding the maximum and minimum values is calculated, and this value is used as the measured value.

〔Example〕

Hereinafter, one embodiment of the present invention will be described based on the drawings.

First, the configuration of this embodiment will be explained based on FIG. In this embodiment, as shown in FIG. 1, the period T of the end to be measured is
a first input circuit 1 into which an analog signal representing an AC voltage of in is input, and a period T of this end to be measured. The first input circuit 1 includes a voltage signal input circuit 11 and a clock to which the analog signal input to the voltage signal input circuit 11 is applied. The second input circuit 2 includes a first analog-to-digital converter 12 that samples the signal at a sampling period TAIll and converts it into digital data, and the second input circuit 2 includes a current signal input circuit 21 and a current signal input circuit 2.
1, and a first analog-to-digital converter 22 for sampling the analog signal input to the first analog-to-digital converter 22 at a sampling period TAl:l corresponding to the clock signal applied thereto, and converting the analog signal into digital data. The sampling period of the converter 12 and the sampling period TA of the first analog-to-digital converter 22
n is a plurality of sampling periods TAtl(1), TAD
(2) Based on the clock signal generation circuit 3 that generates a clock signal that can be variably set in the order of , TAD(n), the output value of the first analog-to-digital converter 12, and the output value of the first analog-to-digital converter 22. It includes an arithmetic circuit 4 that calculates the AC power at the end to be measured, and a display 5 that displays the calculation results of the arithmetic circuit 4.

However, multiple sampling periods TAD(1), TA
The range of I+(2), , TAD(n) is wider than the range where the error becomes large, and two or more ranges where the error becomes large are not measured at the same time.

Next, the operation of this embodiment will be explained based on FIGS. 1 and 2.

The clock signal generated by the clock signal generation circuit 3 is changed to change the sampling period TAD of the first analog-to-digital converter 12 and the second analog-to-digital converter 22 to the sampling period TAII(1), TAD(2),
, TAD(n) (step Sl).

In step S, the analog instantaneous values of the AC voltage and AC current at the end to be measured sampled at the plurality of sampling periods are converted into digital values by the first analog-digital converter 12 and the second analog-digital converter 22.
2) Power is calculated using this converted digital value and stored in the storage section of the calculation circuit 4 (step S3). This operation is performed for all TAl). When displaying the measured values (step S4), the arithmetic circuit 4 removes the maximum and minimum values of the digital values stored in the storage section (step S5), and calculates the average value of the remaining digital values. is calculated (step S6). This power value, which becomes the power measurement value, is given to the display 5 and displayed (step S7).

Set the sampling frequency to 90KH2, 100K[Iz,
The results of simulating the measurement error when the input signal frequency is 110 KHz show that the measurement error is within the range of ±0.01% up to an input signal frequency of 500 KHz.

[Effects of the Invention] As explained above, the present invention has the effect that power measurement with less error can be performed even for an input signal whose sampling period does not satisfy the sampling theorem.

Further, since high-frequency AC power can be measured without using an expensive analog-to-digital converter for high-speed sampling, product costs can be reduced.

Furthermore, even without measuring the frequency (f, wa) of the input signal, the sampling frequency equal to the value of n-fl can be eliminated at the calculation stage, which has the effect of simplifying the measurement procedure.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a flowchart showing the operation of the embodiment of the present invention. FIG. 3 is a diagram showing locations where measurement errors become large. DESCRIPTION OF SYMBOLS 1... First input circuit, 2... Second input circuit, lock signal generation circuit for 3, 4... Arithmetic circuit, 5... Display device, 11... Voltage signal input circuit, 12 ... first analog-digital converter, 21 ... current signal input circuit,
22...Second analog-to-digital converter.

Claims (1)

[Claims] 1. A first input circuit into which an analog signal representing an alternating current voltage at the end to be measured is input, and a second input circuit into which an analog signal representing an alternating current at the end to be measured is input. and an arithmetic circuit that calculates the power at the end to be measured from the values input to the two input circuits, each of which receives an input analog signal at a predetermined period. A power measuring device comprising: an analog-to-digital conversion circuit that samples and converts the data into digital data; and means for variably setting the predetermined period. 2. The power measuring device according to claim 1, wherein the calculation circuit includes means for calculating an average value of the input values excluding the maximum value and the minimum value.