JPH0327122B2 - - Google Patents

Info

Publication number
JPH0327122B2
JPH0327122B2 JP59246314A JP24631484A JPH0327122B2 JP H0327122 B2 JPH0327122 B2 JP H0327122B2 JP 59246314 A JP59246314 A JP 59246314A JP 24631484 A JP24631484 A JP 24631484A JP H0327122 B2 JPH0327122 B2 JP H0327122B2
Authority
JP
Japan
Prior art keywords
gaas
fet
radiation
semiconductor device
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59246314A
Other languages
Japanese (ja)
Other versions
JPS61126807A (en
Inventor
Osamu Ishihara
Koji Aono
Teruyuki Shimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP59246314A priority Critical patent/JPS61126807A/en
Publication of JPS61126807A publication Critical patent/JPS61126807A/en
Publication of JPH0327122B2 publication Critical patent/JPH0327122B2/ja
Granted legal-status Critical Current

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  • Amplifiers (AREA)
  • Junction Field-Effect Transistors (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、GaAs FETとこれにゲート電圧を
印加するための抵抗分割回路とからなる半導体装
置において、GaAs FETの耐放射線性の向上に
関し、さらに詳しく言えば、GaAs FETのバイ
アス回路の改良を通じてGaAs FETを用いた回
路の耐放射線性の向上を図る方法に関するもので
ある。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to improving the radiation resistance of the GaAs FET in a semiconductor device consisting of a GaAs FET and a resistor divider circuit for applying a gate voltage to the GaAs FET. More specifically, the present invention relates to a method for improving the radiation resistance of a circuit using GaAs FETs by improving the bias circuit of GaAs FETs.

〔従来技術〕[Prior art]

GaAs FETは、UHF帯からマイクロ波、ミリ
波帯で動作する高周波用のトランジスタであり、
衛星通信を始めレーダ、その他の高周波帯の機器
に使用されている。そしてこれらの用途の中に
は、例えば、宇宙空間のような放射線の強い環境
で使われることも多い。このような環境で使用す
る場合、放射線に対する耐性が装置の信頼性上重
要になる。
GaAs FET is a high-frequency transistor that operates in the UHF band, microwave band, and millimeter wave band.
It is used in satellite communications, radar, and other high-frequency band equipment. Among these applications, they are often used in environments with strong radiation, such as outer space. When used in such an environment, resistance to radiation becomes important for the reliability of the device.

第2図は従来の一般的なバイアス印加法を用い
た半導体装置を示し、図において、1はGaAs
FETであり、該FET1のソース1aは接地され、
ドレイン1bに正電圧(Vd)が印加され、ゲー
ト1cには負電圧(−Vg)が印加されている。
Figure 2 shows a semiconductor device using the conventional general bias application method.
FET, the source 1a of the FET 1 is grounded,
A positive voltage (Vd) is applied to the drain 1b, and a negative voltage (-Vg) is applied to the gate 1c.

第3図は、上記第2図の従来の半導体装置にお
いて、低雑音増幅用GaAs FETのドレイン1b、
ゲート1cに各々一定電圧Vd、−Vgを印加し、
この状態で該FETにγ線を照射した場合の静特
性の変化を示したものである。図において、γ線
の照射量が増加するに伴つてドレイン飽和電流
(Idss)、ピンチオフ電圧(Vp)及び伝達コンダ
クタンス(gm)が共に減少していることが判り、
特にドレイン飽和電流Idssは1×109radのγ線の
照射で半減しており、変化が著しい。
FIG. 3 shows the drain 1b of the low-noise amplification GaAs FET in the conventional semiconductor device shown in FIG.
Applying constant voltages Vd and -Vg to the gate 1c, respectively,
This figure shows the change in static characteristics when the FET is irradiated with gamma rays in this state. In the figure, it can be seen that as the γ-ray irradiation dose increases, the drain saturation current (Idss), pinch-off voltage (Vp), and transconductance (gm) all decrease.
In particular, the drain saturation current Idss was halved by irradiation with γ-rays of 1×10 9 rad, and the change was remarkable.

第4図は、上記と同じ条件におけるGaAs
FETの高周波特性の変化を示したものである。
第4図aは雑音指数(NF)、同図bは利得(Ga)
の変化を示したものであり、図において、照射量
の増加によりNFは増加し、Gaは減少しており、
静特性と同様に高周波特性も放射線照射により劣
化することがわかる。
Figure 4 shows GaAs under the same conditions as above.
This shows changes in the high frequency characteristics of FET.
Figure 4 a shows the noise figure (NF), and Figure 4 b shows the gain (Ga).
In the figure, as the irradiation dose increases, NF increases and Ga decreases.
It can be seen that, like the static characteristics, the high frequency characteristics are also degraded by radiation irradiation.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このようにGaAs FETの特性は放射線を受け
ることにより変化し、このため、従来の放射線の
存在する環境で使われるGaAs FETを用いた半
導体装置においては、その特性が変化(または劣
化)することとなり、実用上問題であつた。
In this way, the characteristics of GaAs FETs change when exposed to radiation, and for this reason, the characteristics of conventional semiconductor devices using GaAs FETs that are used in environments where radiation exists will change (or deteriorate). , which was a practical problem.

本発明は、上記の問題点に鑑みなされたもの
で、放射線による特性の変化の少ない半導体装置
を提供することを目的としている。
The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device whose characteristics are less likely to change due to radiation.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、GaAs FETと、これのゲート電極
に電圧を印加する抵抗分解回路を備えた半導体装
置において、上記抵抗分割回路の抵抗の少なくと
も1つをGaAsを用いて形成したものである。
The present invention provides a semiconductor device including a GaAs FET and a resistance dividing circuit for applying a voltage to its gate electrode, in which at least one of the resistors of the resistance dividing circuit is formed using GaAs.

〔作用〕[Effect]

本発明では、放射線が照射されると、ゲートの
バイアス点を変化し、その結果、例えばGaAs
FETの放射線による電気特性の変化が小さくな
る。
In the present invention, when irradiated with radiation, the bias point of the gate is changed so that, for example, GaAs
Changes in electrical characteristics of FET due to radiation are reduced.

〔実施例〕〔Example〕

以下、本発明の実施例を図について説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例を示す。図におい
て、第2図と同一符号は同一又は相当部分を示
し、2はゲートバイアス電圧(−Vg)を2つの
抵抗R1,R2で分割し、GaAs FETのゲート
電極1cに供給するための抵抗分割回路である。
このときGaAs FETに加わるゲート電圧は−Vg
×R2/(R1+R2)=−Vg0となる。ところでこ
のような抵抗分割回路2によるバイアス法は、従
来一般的に行なわれているが、本発明の特徴は抵
抗R1,R2の両方、又は一方をGaAsで作るこ
とにあり、本実施例では、抵抗R2は、例えば金
属被膜抵抗などの普通の抵抗であり、抵抗R1は
GaAsで形成されている。
FIG. 1 shows an embodiment of the invention. In the figure, the same reference numerals as in Figure 2 indicate the same or equivalent parts, and 2 is a resistance divider for dividing the gate bias voltage (-Vg) by two resistors R1 and R2 and supplying it to the gate electrode 1c of the GaAs FET. It is a circuit.
At this time, the gate voltage applied to the GaAs FET is −Vg
×R2/(R1+R2)=-Vg0. By the way, such a biasing method using the resistor divider circuit 2 has been generally performed in the past, but the feature of the present invention is that both or one of the resistors R1 and R2 is made of GaAs, and in this embodiment, Resistor R2 is an ordinary resistor such as a metal film resistor, and resistor R1 is
Made of GaAs.

次に作用効果について説明する。 Next, the effects will be explained.

放射線照射量が増加すると、抵抗R1の値は増
加するが、一方、抵抗R2の値はほとんど変化し
ないので、結果として分圧比R2/(R1+R2)は
小さくなり、バイアスが浅くなつてゲート1cに
加わる電圧は小さくなり、ドレイン電流が増加す
る方向にバイアス点が動く。このとき、第3図か
らも判る通り、放射線によりドレイン飽和電流
Idssは減少しようとしているが、この放射線によ
るIdssが減少する効果と、上記バイアス点の変化
によるドレイン電流が増加する結果とが相殺する
ように作用する。
As the radiation dose increases, the value of resistor R1 increases, but on the other hand, the value of resistor R2 hardly changes, so as a result, the voltage division ratio R2/(R1+R2) decreases, and the bias becomes shallower and is applied to gate 1c. The voltage decreases and the bias point moves in the direction of increasing drain current. At this time, as can be seen from Figure 3, the drain saturation current increases due to radiation.
Idss is about to decrease, but the effect of decreasing Idss due to this radiation and the increase in drain current due to the change in the bias point act to cancel each other out.

従つて抵抗R1,R2の値を適当にとり、−Vg
の値を適当に選択することにより、ドレイン飽和
電流Idssの変化を少なくすることができる。第5
図は、上記実施例によるバイアス法を用いた
GaAs FETにおいて、ドレイン電流をほぼ10m
Aで一定になるようにした場合の高周波特性の変
化。示たものである。この図から明らかなよう
に、放射線照射量の増加に伴つて雑音指数
(NF)の劣化はあるものの、利得(Ga)の低下
は無くなつて、ほぼ一定となつており、補償され
ている。
Therefore, take appropriate values of resistors R1 and R2 and -Vg
By appropriately selecting the value of , changes in drain saturation current Idss can be reduced. Fifth
The figure shows the results obtained using the bias method according to the above example.
In GaAs FET, the drain current is approximately 10m
Change in high frequency characteristics when A is set constant. This is what was shown. As is clear from this figure, although the noise figure (NF) deteriorates as the radiation dose increases, the gain (Ga) no longer decreases and remains almost constant, which is compensated for.

このように本実施例では、GaAs FET回路の
電気特性、特に利得を放射線に対して安定化でき
る。
In this way, in this embodiment, the electrical characteristics, especially the gain, of the GaAs FET circuit can be stabilized against radiation.

なお、上記実施例では利得の安定化の例を示し
たが、本発明では上記抵抗R1,R2を適当に選
択することにより雑音指数(NF)を補償するこ
ともできる。また、上記実施例では抵抗R1のみ
をGaAsで形成したが、抵抗R1,R2の両方を
GaAsで形成し、R1,R2を形成する部分のキ
ヤリア濃度に変化を持たせることにより、同様の
効果を得ることも可能である。
In the above embodiment, an example of stabilizing the gain was shown, but in the present invention, the noise figure (NF) can also be compensated by appropriately selecting the resistors R1 and R2. In addition, in the above embodiment, only the resistor R1 was formed of GaAs, but both resistors R1 and R2 were formed of GaAs.
A similar effect can also be obtained by forming GaAs and varying the carrier concentration in the portions where R1 and R2 are formed.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明に係る半導体装置によれ
ば、抵抗分割回路の抵抗の少なくとも1つを
GaAsを用いて形成したので、放射線の照射によ
りゲートのバイアス点を変化させることができ、
その結果、例えばGaAs FETの放射線による特
性変化を小さくできる効果がある。
As described above, according to the semiconductor device according to the present invention, at least one of the resistors of the resistor divider circuit is
Since it is formed using GaAs, the bias point of the gate can be changed by irradiation with radiation.
As a result, it has the effect of reducing changes in characteristics of GaAs FETs due to radiation, for example.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による半導体装置の
回路図、第2図は従来の半導体装置の回路図、第
3図はGaAs FETの静特性の変化を示す特性図、
第4図a,bは高周波特性の変化を示す特性図、
第5図は上記実施例の効果を説明するための特性
図である。 1……GaAs FET、1c……ゲート、2……
抵抗分割回路、R1,R2……第1、第2分割抵
抗。
FIG. 1 is a circuit diagram of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional semiconductor device, and FIG. 3 is a characteristic diagram showing changes in static characteristics of a GaAs FET.
Figure 4 a and b are characteristic diagrams showing changes in high frequency characteristics;
FIG. 5 is a characteristic diagram for explaining the effects of the above embodiment. 1...GaAs FET, 1c...gate, 2...
Resistance dividing circuit, R1, R2...first and second dividing resistors.

Claims (1)

【特許請求の範囲】 1 GaAs FETと、一定電圧を抵抗分割して上
記GaAs FETのゲート電圧を得るための抵抗分
割回路とを備えた半導体装置において、上記抵抗
分割回路の抵抗の少なくとも1つをGaAsを用い
て形成したことを特徴とする半導体装置。 2 上記GaAs FETはn形であり、上記抵抗分
割回路は、負電源とアースとの間に直列に接続さ
れた第1、第2分割抵抗からなり、上記GaAsを
用いたのは第1分割抵抗であることを特徴とする
特許請求の範囲第1項記載の半導体装置。
[Claims] 1. A semiconductor device including a GaAs FET and a resistance divider circuit for dividing a constant voltage by resistance to obtain a gate voltage of the GaAs FET, wherein at least one of the resistors of the resistance divider circuit is A semiconductor device characterized in that it is formed using GaAs. 2 The GaAs FET mentioned above is n-type, and the resistance dividing circuit consists of a first and second dividing resistor connected in series between the negative power supply and the ground, and the GaAs FET is used in the first dividing resistor. A semiconductor device according to claim 1, characterized in that:
JP59246314A 1984-11-22 1984-11-22 Semiconductor device Granted JPS61126807A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59246314A JPS61126807A (en) 1984-11-22 1984-11-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59246314A JPS61126807A (en) 1984-11-22 1984-11-22 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS61126807A JPS61126807A (en) 1986-06-14
JPH0327122B2 true JPH0327122B2 (en) 1991-04-15

Family

ID=17146711

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59246314A Granted JPS61126807A (en) 1984-11-22 1984-11-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS61126807A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9404202B2 (en) 2010-02-05 2016-08-02 University Of Leeds Carbon fibre yarn and method for the production thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6108025B1 (en) 2016-11-09 2017-04-05 富士電機株式会社 Constant voltage generator and measuring device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9404202B2 (en) 2010-02-05 2016-08-02 University Of Leeds Carbon fibre yarn and method for the production thereof

Also Published As

Publication number Publication date
JPS61126807A (en) 1986-06-14

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