JPH03270673A - Overcurrent protective circuit - Google Patents

Abstract

PURPOSE:To suppress overcurrent by making a judgment that an overcurrent is fed to a load when a detected signal exceeds a set reference voltage and applying a control voltage to the dead time control terminal of a pulse width control circuit thereby lengthening the dead time. CONSTITUTION:Upon occurrence of an overcurrent state where any one of rectifying/smoothing circuits 13a, 13b, 23a, 23b feeds a current higher than a rated output current, a detection signal to be applied on the + terminal of an operational amplifier 17 through diodes D1-D4 exceeds a set reference voltage applied on the-terminal, and thereby a positive output signal from the operational amplifier 17 is applied onto the dead time control terminal DT of pulse width control circuits 15, 25 thus controlling the dead time to be lengthened. Consequently, DC output currents from switching regulators 10, 20 are limited resulting in the protection of the switching regulators 10, 20 from overcurrent and overload.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an overcurrent protection circuit for a plurality of switching regulators.

BACKGROUND ART Electronic devices that require multiple types of stabilized DC voltages and consume relatively large amounts of power have adopted a configuration in which power is supplied using multiple switching regulators. In such electronic equipment, if the power supply current due to any voltage increases beyond the rated value, it is considered that an abnormality has occurred and all power supply is stopped. However, in case of -temporal overcurrent condition,
Although the normal state will be restored in a short period of time, automatic recovery is not possible if an overcurrent is detected and the power supply is stopped to perform a protective action, so it is necessary to restart the system manually. Therefore, it is desired to be able to automatically resupply power.

[Prior Art] A conventional power supply device using a plurality of switching regulators has the configuration shown in FIG. 3, for example.
A switching element such as a field effect transistor or a bipolar transistor is connected to the primary winding of the transformer 31.41, and is controlled to be turned on or off by a pulse width control circuit 35.45. When the switching element 32.42 turns on, a DC input voltage is applied to the primary winding of the transformer 31.41, and a voltage is induced in the secondary winding, so this induced voltage is transferred to the rectifier and smoothing circuit 33.43. The voltage is rectified and smoothed to become a DC output voltage. This DC output voltage is set to various voltages in response to demands on the load side, and by a configuration not shown, the DC output voltage is applied to the pulse width control circuit 35, 45, and is set to a set reference voltage. The switching element 32 is compared according to the error voltage.
Since the ON width of .degree.42 is controlled, a stabilized DC output voltage is output.

The current supplied to the load is detected by current detectors 34 and 44 consisting of resistors, current transformers, etc., and is applied to the overcurrent detection circuit 36. When a current exceeding a set rated current is supplied, an overcurrent is detected. It is determined that the current state is present, an alarm signal is applied to the latch circuit 37 to cause the latch circuit to latch, and the output signal of the latch circuit 37 is applied as a stop signal to the pulse width control circuits 35 and 45. Thereby, the pulse width control circuit 35.45 maintains the switching element 32.42 in the off state.

When restarting such a power supply circuit, latch circuit 3
7 to reset the stop signal and restart the operation of the pulse width control circuits 35 and 45.

The pulse width control circuit 35.45 has, for example, the configuration shown in FIG.
．． 55 is an error amplifier, 56 is a flip-flop, 57 is an OR circuit, 58.59 is a NOR circuit, 60 is an inverter,
61.62 is an AND circuit, 63.64 is an output transistor, RT is a terminal for connecting a resistor R, and CT is a capacitor C.
terminal to connect, DT is dead time control terminal, +IN
.

-IN is an input terminal to which a rectified and smoothed output voltage or a voltage obtained by dividing it is applied, FB is a feedback terminal, ○C is an output control terminal, and C1, C2, El, and E2 are output terminals.

This pulse width control circuit has a configuration that can be applied to a two-stone switching regulator.The oscillator 51 charges the capacitor C with a constant current, and when the terminal voltage of the capacitor C reaches a set value, the oscillator 51 charges the capacitor C with a constant current. By discharging it, a sawtooth wave signal is generated, and the resistance R (K
Ω] and the capacitor C [μF], the oscillation frequency f becomes fL:, 1.2/(R−C) (KHz). Comparator 53 receives the sawtooth signal and error amplifier 54 .
55 and output the comparison output signal to the OR circuit 5.
7. Output Random Distaro 3 via Noah circuit 58.59
．． The output signal of the output transistor 3.64 controls the on period of the switching elements 32 and 42 in FIG.

Note that even if the dead time control terminal DT is in an unbiased state, a bias voltage is applied to the comparator 52, so that the duty is not 100%. Also, if the output control terminal OC is set to "0", the AND circuit 61.62
The output signal of 3.
64 are turned on or off at the same time, and when the output control terminal OC is set to '1'', the AND circuits 61 and 62 are opened, so in response to the inversion operation of the flip-flop 56, the output transistors 3 and 64 are inverted. Phase operation will be performed.

[Problem that the invention seeks to solve]

As mentioned above, when multiple switching regulators are used to supply stabilized DC voltage of various voltage values to electronic equipment, if an overcurrent is detected, all switching regulators will stop operating. Furthermore, when the overcurrent condition is released, it is necessary to manually reset the latch circuit 37, which poses a problem in operability.

The present invention aims to automatically restore the normal state when the overcurrent state is canceled by limiting the supplied current without completely stopping the current when the overcurrent state occurs. It is.

[Means to solve the problem]

The overcurrent protection circuit of the present invention performs overcurrent protection using the dead time control terminal of the pulse width control circuit, and will be explained with reference to FIG.

A switching element 2 such as a transistor connected to the primary winding of the transformer 1, a rectifier smoothing circuit 3 connected to an arbitrary number of secondary windings of the transformer 1, and a current detection section that detects the output current of the rectifier smoothing circuit 3. 4 and a pulse width control circuit 5 that controls the on-width of the switching element 2, dead time control of the pulse width control circuit 5 corresponding to the plurality of switching regulators is performed. A comparison circuit 7 is commonly connected to the terminal 6, a set reference voltage is applied to one terminal of the comparison circuit 7, and the detection signal of the current detection section 4 corresponding to each rectification and smoothing circuit 3 is connected to the other terminal by wire OR connection. and enter
The configuration is such that when the detection signal is larger than the set reference voltage, it is determined that there is an overcurrent state, and a voltage that lengthens the dead time is applied to the dead time control terminal 6.

[Function] Since the detection signal from the current detection section 4 is inputted to the other terminal of the comparison circuit 7 in a wired-OR connection, the detection signal with the largest value is inputted to the comparison circuit 7. That is, the maximum detection signal among the detection signals normalized corresponding to various rated output currents is input to the comparator circuit 7,
It is compared with the set reference voltage. When the detection signal is larger than this set reference voltage, it is determined that overcurrent is supplied to the load,
A control voltage is applied to the dead time control terminal 6 of the pulse width control circuit 5 to lengthen the dead time in the pulse width control circuit 5 of all switching regulators. As a result, the output is limited, and overcurrent can be suppressed.

Also, when the overcurrent condition is released, the voltage applied from the comparator circuit 7 to the dead time control terminal 6 becomes zero.
It will automatically return to the original control state.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a circuit diagram of a main part of an embodiment of the present invention.
is the switching regulator, 11°21 is the transformer,
12.22 are switching elements such as field effect transistors and bipolar transistors, 13a, 13b, 23a
, 23b is a rectifying and smoothing circuit, 14a, 14b, 24a, 2
4b is a current detection unit using a current transformer or resistance, etc.; 1
5゜25 is a pulse width control circuit, DT is a dead time control terminal, VI is a voltage detection terminal, 16.26 is a drive transformer, 17 is an operational amplifier, D1 to D5 are diodes, R1-
R7 is a resistor.

The switching regulator 10.20 has a multi-output configuration, and the DC output voltages of each are generally set to different values depending on the load side requirements, but the pulse width control circuits 15.25 are the same. It has a dead time control terminal DT, a voltage detection terminal Vl, etc., and controls the ON/OFF state of the switching element 12.22 via the drive transformer 16.26. Further, a set voltage obtained by dividing the +■ voltage by resistors R1 and R2 is applied to the dead time control terminal DT, and the minimum dead time is set.

Further, the rectifying and smoothing circuits 13a, 13b, 23a, and 23b are each equipped with a rectifying diode, a smoothing capacitor, an inductance, etc. (not shown), and their respective output currents are detected by current detecting sections 14a, 14b, 24a, and 24b.
is detected and wired-OR connected via diodes D1 to D4. Therefore, the detection signal of the maximum value is inputted via the diode to the child terminal of the operational amplifier 17 constituting the comparator circuit.

In this case, each current detection section 14a, 14b, 24a, 24
The detection signal b is from the rectifying and smoothing circuit 13a.

If the rated output currents from 13b, 23a, and 23b are the same, they are input as they are to the child terminals of the operational amplifier 17 via the diodes D1 to D4, but if the rated output currents are different, they are normalized and then Diode D1~D
For example, if the rectifier and smoothing circuits 13a, 23a, and 24b have the same rated output current, and the rectifier and smoothing circuit 13b has a rated output current that is twice those, In this case, the detection signal of the current detection section 14b corresponding to the rectification and smoothing circuit 13b is
The value is 2.

Also, a voltage of 10 V is applied to one terminal of the operational amplifier I7 through a resistor R3.
, R4 and added as a set reference voltage,
It is compared with the detection signal of the maximum value, and the comparison output signal is applied to the dead time control terminal DT of the pulse width control circuit 15.25 via the diode D5.

When any one of the rectifying and smoothing circuits 13a, 13b, 23a, and 23b enters an overcurrent state in which a current exceeding the rated output current is supplied, the operational amplifier 1 is supplied via the diodes D1 to D4.
The detection signal applied to the middle terminal of 7 becomes larger than the set reference voltage applied to one terminal, and the positive output signal of the operational amplifier 17 passes through the diode D5 to the dead voltage of the pulse width control circuit 15. It is applied to the time control terminal DT and controlled so that the dead time becomes longer.

That is, in the pulse width control circuit shown in FIG. 4, when the voltage applied to the dead time control terminal DT is increased, the period during which the sawtooth wave signal from the oscillator 51 is high in level with respect to this voltage becomes shorter, and the error amplifier 54. Dead time becomes longer regardless of the output of 55. Therefore, each DC output current of the switching regulator 10.20 is limited, and the load and the switching regulator 10.20 can be protected from overcurrent.

When such an overcurrent condition is released, the operational amplifier 17
The detection signal applied to the middle terminal of the operational amplifier 17 becomes smaller than the set reference voltage applied to one terminal.
The polarity of the output signal is reversed, the diode D5 prevents the output signal from being applied to the dead time control terminal DT, and only the voltage preset by the resistor R1°R2 is applied to the dead time control terminal DT, resulting in normal control. state.

The above embodiment includes two switching regulators 10
．． Although a configuration using 20 switching regulators is shown, a similar configuration can be made using a larger number of switching regulators.

〔Effect of the invention〕

As explained above, the present invention connects the comparison circuit 7 in common to the dead time control terminal 6 of the pulse width control circuit 5 compatible with a plurality of switching regulators, and the comparison circuit 7
Apply the set reference voltage to one terminal of the
The detection signal of the current detection unit 4 is inputted by wired OR connection, and when the detection signal is larger than the set reference voltage, it is determined that there is an overcurrent state, and a voltage is applied to the dead time control terminal 6.
This increases the dead time, thereby suppressing the output current, thereby protecting the load and switching regulator from overcurrent.

Furthermore, when the overcurrent condition is released, voltage is no longer applied from the comparator circuit 7 to the dead time control terminal 6, so that the normal control condition returns. That is, there is an advantage that the abnormal load state is recovered and the normal power supply state can be automatically returned.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram of the principle of the present invention, Fig. 2 is a main part circuit diagram of an embodiment of the present invention, Fig. 3 is a main part block diagram of a conventional example, and Fig. 4 is a diagram illustrating the principle of the present invention.
The figure is a block diagram of a pulse width control circuit. 1 is a transformer, 2 is a switching element, 3 is a rectifier and smoothing circuit, 4 is a current detection section, 5 is a pulse width control circuit, 6 is a dead time control terminal, and 7 is a comparison circuit.

Claims (1)

[Claims] A switching element (2) connected to a primary winding of a transformer (1), a rectifying and smoothing circuit (3) connected to an arbitrary number of secondary windings of the transformer (1), and a rectifying and smoothing circuit (3) connected to an arbitrary number of secondary windings of the transformer (1); A current detection section (4) that detects the output current of the smoothing circuit (3), and a pulse width control circuit (5) that controls the on-width of the switching element (2).
), in an overcurrent protection circuit for a plurality of switching regulators each having a comparator circuit (7) commonly connected to a dead time control terminal (6) of the pulse width control circuit (5) corresponding to the plurality of switching regulators. ) is connected, a set reference voltage is applied to one terminal of the comparison circuit (7), and the detection signal of the current detection section (4) corresponding to each of the rectification and smoothing circuits (3) is connected to the other terminal of the comparison circuit (7). When the detection signal is larger than the set reference voltage, an overcurrent state is determined and a voltage that lengthens the dead time is applied to the dead time control terminal (6). Features an overcurrent protection circuit.