JPS5956871A - Overload protecting system for multioutput power source - Google Patents

Abstract

PURPOSE:To prevent the erroneous operation of an overload operation by stopping the operation of an inverter when the current of astable output circuit exceeds the prescribed value or when the voltage of the output circuit having a drooping stabilizer is the prescribed value or lower. CONSTITUTION:The output of an inverter 2 is applied to the primary coil of a transformer 3, and a plurality of outputs are obtained from the secondary coils through a drooping stabilizer 4. An astable output circuit 10 provided at the secondary coil N3 to control a pulse width modulator 5 for controlling the inverter 2, the output current is detected by a resistor R1, applied to a comparator 11 delayed in the bias operations of the resistors R2, R3, inputted to AND circuit 7-2 together with a low voltage signal when any of the outputs is overload, thereby stopping the inverter 2. Accordingly, the erroneous operation of the overload protecting operation occurred on the basis of the low voltage state of the output circuit at the power source energizing and swithcing time can be effectively prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a power supply having a large number of output circuits, particularly a multi-output switching power supply using a single inverter, to prevent damage to semiconductor elements etc. due to overload. It relates to load protection systems.

Conventional technology and problems Multi-output switching power supplies using a single inverter have one DC/AC inverter, and obtain multiple outputs by branching the output to multiple output circuits via a transformer and then converting it to DC. It is widely used as a power source for various devices.

Conventionally, overload protection systems for multi-output switching power supplies using a single inverter include a method of detecting an increase in current in the main inverter, a method of detecting an increase in each output current, and a method of detecting an increase in each output current, and a method of detecting an increase in each output current by making each output circuit a self-driving type. A method of detecting a voltage drop under load is used. Among these methods, the method of detecting the current of the main inverter cannot detect an overload in a small capacity output circuit, which may damage the semiconductor elements, and the method of detecting each output current may damage the circuit. Make it complicated. Furthermore, the method of detecting the voltage drop of each output requires a circuit that inhibits the voltage drop detection output that occurs when turning on and off.

FIG. 1 shows the configuration of a conventional multi-output power supply σ overload protection system, which belongs to a system that performs overload protection by detecting a voltage drop in each output circuit. In the figure, 1 is an AC input rectifying and smoothing section, 2 is a main inverter, 3 is a transformer, 4-1.4-3 is a drooping type ballast, 5 is a pulse width modulation section, 6-1.6-2 is a comparator, 7-1 is an OR circuit,
8 is the input/disconnection error output prevention section, 9 is the oscillation section, and 10 is the auxiliary? ! It is the source.

In FIG. 1, an AC input rectifying and smoothing section 1 rectifies and smoothes an AC input to generate a DC output, which is input to the main inverter 2. The main inverter 2 converts the DC input according to the excitation signal of the oscillation unit 9 applied via the pulse width modulation unit 5 to generate a transformed output, which is input to the primary winding No. of the transformer B. Drooping type ballasts 4-1, 4-2 are connected to the secondary windings N, , N2 of the transformer 30, respectively, and outputs of +12V and +24V, for example, are generated from each drooping type ballast.

On the other hand, the secondary winding N3 has a diode I)1. J) 2, choke coil L1. An unstable output circuit consisting of a smoothing capacitor C1 is connected to generate, for example, a +5V output, and the output of the unstable output circuit is input to a pulse width modulator 5 to adjust the switching pulse width supplied to the main inverter 1. The output voltage of the main inverter 2 is kept constant by modulating the feedback voltage.

Each drooping type ballast 4-1.4-2 has drooping characteristics as shown in Figure 2, and stabilizes so that the output voltage remains constant regardless of the output current value within the rated load range. , When overloaded, the output voltage suddenly drops to provide protection. The outputs (1) and (2) of the drooping type ballast 4-1.4-2 are respectively applied to one input of the comparator 6-1.6-2 and compared with the reference voltage applied to the other input. These reference voltages are determined according to the limits of voltage drop allowed by each drooping ballast (two), and correspond to the low voltage protection setting level in the characteristics shown in Figure 2. -1 and 6-2 generate a high level output when the output voltage of the drooping type ballast falls below the reference voltage,
This output is applied to the erroneous output prevention section 8 at the time of turning on and off via the OR circuit 7-1. The erroneous output prevention section 8 thereby generates an oscillation stop signal and inputs it to the oscillation section 9 . The oscillator 9 stops oscillating when the oscillation stop signal is applied, so the main inverter 2 loses excitation and stops operating, and the overload protection at the output of each drooping stabilizer 4-1, 4-2 is activated. It will be done. The power-on/power-off erroneous output prevention section 8 prevents the output of each comparator based on a low voltage when the power is turned on or off, thereby preventing unstable operation of the main inverter. The auxiliary power supply 10 rectifies and smooths the AC input, converts it to DC, and supplies it as power to the erroneous output prevention circuit 8 at the time of turning on and turning off.

FIG. 3 shows an example of the configuration of the overload protection circuit used in the multi-output power supply shown in FIG. 1, and corresponds to the portion surrounded by a broken line in FIG.

In the same figure, CM'P1 is a comparator consisting of, for example, an operational amplifier, and the comparator 6 in FIG.
-1, and when the output (2) of the drooping type ballast 4-1 becomes below the low voltage protection setting level, a high level output is generated. Reference numeral 011 denotes an OR circuit, which corresponds to the OR circuit 7-1 in the first circuit, and generates a high-level output by the outputs of the comparator CMP1 and a comparator (not shown) corresponding to the comparator 6-2 in FIG.

The output of the OR circuit OR is connected to the base of the transistor Q2 via a connection point a between resistors R11 and R12. A current flows through the resistors R11 and R12 when the transistor Q1 is on, and therefore the connection point α is maintained at a certain positive potential.

In this state, when the output of the OR circuit OR is generated, the transistor Q2 is turned on. The collector current caused by turning on the transistor Q2 is supplied to the oscillation section 9 as an oscillation stop signal output to stop its operation.

In this way, overload protection can be achieved by stopping the operation of the main inverter when the output voltage of each drooping ballast drops. However, for several tens to several milliseconds after the power is turned on and after the power is turned off, the output voltage of the drooping type ballast decreases, so the overload protection circuit operates and an oscillation stop signal is generated.

Transformer 7", full-wave rectifier diodes D11 to D14,
The circuit consisting of the smoothing capacitor C11 corresponds to the auxiliary power supply 10 in FIG. CMP2 is a comparator made of, for example, an operational amplifier, and by comparing the auxiliary power supply output with a constant voltage element D15, it generates a positive output for a certain period of time when the power input to the auxiliary power supply is turned on, and also when the power supply input is turned off. Generates positive output. Comparator C
Transistor Q1 is turned off by the positive output of MP2, and the potential at connection point α decreases. In this state, even if a high level output is generated from OR circuit OR, transistor Q1 is turned off.
1 does not turn on. Therefore, the oscillation stop signal will not be generated for a certain period of time after the power is input and after the power is disconnected.

This prevents the overload protection circuit from malfunctioning due to the delay in the operation of the drooping stabilizer.

In this way, in conventional overload protection circuits, in order to detect the voltage drop of each output, not only is the configuration complicated as it requires a circuit to prevent reading outputs when turning on and off. The prevention circuit has many delicate points in its design and adjustment, and has the drawback that stable operation cannot always be expected.

OBJECT OF THE INVENTION The present invention attempts to solve the problems of the prior art, and its purpose is to provide a simple detection circuit for detecting the overload state of each output in a multi-output switching power supply having different output capacities. To provide a circuit type that can detect and reliably cut off the power supply (-).

Structure of the Invention The present invention utilizes the output voltage of a high-output unregulated output circuit in a combustion source to reduce the operation delay when turning on and off the power of an output circuit equipped with a self-driving ballast. (This is designed to prevent the malfunction of the overload protection circuit based on the following.

Examples of the invention FIG. 4 shows the configuration of an embodiment of the present invention.

In this figure, the same parts as in FIG. 1 are indicated by the same numbers, 11 is a comparator, and 12 is a low voltage detection receiving circuit.

Section 4 (1) In the overload protection system shown, the 2θ of the transformer B (the diode D1.D connected to the winding light
2. The unstable output circuit consisting of the Booyoke coil L1 and the smoothing capacitor C1 has a higher output than the output circuits connected to the other windings N, , N2. A resistor R1 is inserted in series with this unregulated output circuit to create a 1-L voltage drop proportional to the output current.

Comparator 11 is connected to both ends of resistor R1,
A constant positive bias is applied by resistors R2 and R5. In this state, when the voltage drop across the resistor R1 exceeds a certain value, a high level output is generated, and this output is given as an overcurrent signal to the oscillator 9 via the AND circuit 7'-2 to stop its oscillation. . The low voltage detection reception circuit 12 includes each drooping type ballast 4-1 connected to the windings #, , and N2.
, 4-2, and the output ■ of the non-stable output circuit connected to winding N3 are being input, and either of the outputs ■ or ■ has fallen below the reference value due to overload. When a low voltage signal is generated. The low voltage signal is applied to the oscillating section 9 via the AND circuit 7-2 to stop its oscillation. The main inverter stops its oscillation (g139) and stops its operation, and overload protection is performed.

FIG. 5 shows a specific example of the configuration of the low voltage detection receiving circuit 12 in the embodiment shown in FIG. (2) are connected to one terminal of a Zener diode D26 via Zener diodes D21 and D22, respectively, and the other terminal of the Zener diode D26 is connected to the base of the transistor Q11.The outputs (2) and (2) of the drooping ballast are When either one drops below the low voltage protection setting level, the Zener diode connected to its output will
Therefore, the Zener diode D23 also becomes conductive, and the base potential of the transistor Q11 decreases, turning it off. The Zyristor Tl11 has its gate connected to the collector of the transistor Q11 (2, Zener diode D24. When the collector potential rises, a gate current flows through the thyristor TH1, turning it on, and the current is supplied as a low voltage signal to the AND circuit 7-2. will stop operating and provide overload protection.

On the other hand, the output ■ is connected to the zener diode D24 via a time constant circuit consisting of a resistor R21 and a capacitor C21, so when the power is turned on, the potential at the connection point S between R21 and the zener diode D24 rises with a delay. . Now, the time t2 until the voltage at the 6 points rises and the Zetz diode D24 becomes conductive is the time tI until the outputs of the drooping type ballast rise and reach the low voltage maintenance Mik setting level.
If you make it long enough, the output when the power is turned on is
Since no power is supplied to the transistor Q11 even while the transistors Q11 and (2) are in a low voltage state, no low voltage signal is generated, thus preventing the overload protection circuit from malfunctioning when the power is turned on. When the power is cut off, the potential at 6 points drops rapidly, and transistor Q11 loses power before the output of the drooping ballast drops, so no low voltage signal is generated, and the overload protection circuit when the power is cut off. This also prevents malfunctions.

FIG. 6 explains the operation of the low voltage detection receiving circuit shown in FIG. In the figure, (1) indicates the output ■, and it is shown that the power is turned on at point A and the output ■ gradually increases to reach a constant value. (2) shows the potential at six points on the input side of the Zener diode D24, and the resistance l? 21, due to the time constant circuit consisting of the capacitor C21, its potential rises with a delay compared to (1), and the Zener diode D24 passes through the ina at point B (2).(6) is the transistor Indicates the base potential of Q11, and based on the delay in rising of the drooping type ballasts 4-1 to 4-3, the 0 point (2 indicates that the base potential has risen and the low voltage state has been released). There is. (4)
indicates the output of low voltage m, and the output ■ or ■ of the drooping type ballast decreases due to overload, and the base potential of transistor Q11 decreases at point D in (6).
This indicates that a low voltage signal was generated at the point. As a result, the main inverter stops, and the output (1) shown in (1) also decreases from 1 point.

In this way, in the multi-output power supply protection system shown in FIGS. 4 and 5, when the signal obtained by delaying the output voltage of the non-stable output circuit via the time constant circuit exceeds a certain voltage, Since the power is supplied to the circuit that detects the drop in the output of the drooping ballast, the oscillation stop signal to stop the power supply is generated based on the delay in the rise of the output voltage when the drooping ballast is turned on. It is prevented from being output.

Effects of the Invention As explained above, the multi-output power supply overload protection system of the present invention reduces the output of the high-power unregulated output circuit.
When the current exceeds a predetermined value or the output voltage of an output circuit equipped with a drooping type ballast is below a predetermined value, a detection signal is generated to stop the operation of the power supply main inverter (=
As a rule of thumb for detecting the output voltage of an output circuit equipped with a drooping type ballast, the output of a high-output unregulated output circuit is delayed and given, so it is equipped with a drooping type ballast when the power is turned on and off. A simple circuit can reliably prevent overload protection malfunctions caused by the generation of a detection signal based on the low voltage state of the output circuit.

[Brief explanation of drawings]

Figure 1 is a diagram showing the configuration of a conventional multi-output power supply overload protection system, Figure 2 is a diagram showing the characteristics of a drooping type ballast, and Figure 6 is a diagram showing the characteristics of a drooping type ballast.
The figure shows an example of the configuration of the overload protection circuit in the multi-output power supply shown in FIG. 1, FIG. 4 shows the structure of an embodiment of the present invention, and FIG. FIG. 6, which is a diagram showing an example of a specific configuration of the low voltage detection reception circuit 12, is a time chart illustrating the operation of the low voltage detection reception circuit. 1... AC input rectification and smoothing section, 2... Main inverter,
6...Transformer, 4-1, 4-2...Drooping type ballast, 5...Pulse width modulation section, 6-1, 6-2...
Comparator, 7-1... OR circuit, 7-2... AND circuit, 8... Erroneous output prevention unit when turning on and off, 9...
・Oscillation unit, 10...Auxiliary power supply, 11...Comparator, 12...Low pressure detection reception circuit Agent Patent attorney Gobe Tamamushi (6 others) -369- Nono 8 sun

Claims (1)

[Claims] In a multi-output power supply using a single inverter having a high output unregulated output circuit and an output circuit equipped with a drooping type ballast,
a first detection means for generating a detection signal when the output voltage of the output circuit equipped with the drooping type ballast is below a predetermined value; and a first detection means that is longer than a rise time constant when power is turned on of the output circuit equipped with the drooping type ballast. means for supplying power necessary for the operation of the first detection circuit when the output voltage of the high output non-stable output circuit delayed by a time constant exceeds a predetermined value; a second detection means for generating a detection signal when the output current of the output circuit exceeds a predetermined value;
Alternatively, an overload protection system for a multi-output power supply, characterized in that the operation of the single inverter is stopped when a detection signal is generated from the second detection means.