JPH03265147A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the function of a semiconductor device from being lost even if edge short circuit occurs and to eliminate generation of a defective in an assembly process by a method wherein pads are provided on the outer peripheral part of the device regardless of the function of the device and P-N junctions having a width of a pad width or wider are formed in a semiconductor substrate which is positioned under these pads. CONSTITUTION:A plurality of pieces more than the number of pads 13 of P-N junctions 10 having a width of at least a pad width or wider are formed in the outer peripheral part, which is positioned in the vicinity of the pads 13 on an N-type substrate 11, of the N-type substrate 11. According to such a manner, even if a plurality of edge short circuits are generated, an electrical short between a wiring and the substrate can be prevented from being generated by the plurality of P-N junctions formed in the outer peripheral part, which is positioned in the vicinity of the pads, of a semiconductor device and at the same time, it becomes possible that an inter-wiring short is also prevented from being generated.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to the structure of a semiconductor device.

[Summary of the Invention 1 The present invention is characterized in that a plurality of PN junctions having a width equal to or larger than the pad width are formed at the outer periphery of a pad portion, regardless of the original function of the semiconductor device.

[Prior Art] The outer periphery of a semiconductor device having a conventional structure was as shown in FIG. 2 or 3.

Figure 2 shows the most common structure, in which the outer peripheral part 2 of the semiconductor device
0, no PN junction is intentionally formed. In this case, wires such as gold wire, aluminum cotton, TAB leads, beam lead electrode leads, etc., which connect this semiconductor device and external devices from pads 23 which are internal electrodes of the semiconductor device, are connected to the outer peripheral portion 20. By contacting the pad 23
Since the substrate 21 is electrically short-circuited, the original function of the semiconductor device is impaired.

FIG. 3 shows an improved structure of FIG. 2, in which a continuous PN junction is formed in the outer peripheral portion 30 of the semiconductor device. With this structure, the wiring from the pad 33, such as gold wire, aluminum wire, TAB lead, beam lead electrode node, etc., which connects the semiconductor device and external device, can be
Even if it comes into contact with the outer peripheral portion 30, the PN junction formed here prevents an electrical short between the pad 33 and the substrate 31, and the function of the semiconductor device is not impaired.

However, if a plurality of wirings from the pads 33 come into contact with the substrate 31, an electrical short will occur between the pads, and the functionality of the semiconductor device will be impaired.

[Problems to be Solved by the Invention] A wire bonding method using a gold edge or aluminum wire is generally used to connect a semiconductor device and an external device. However, in recent years, semiconductor devices have become thinner and the number of interconnects has increased (
Due to the increase in the number of bins), wiring methods such as the TAB method are increasing. - In the TAB method, the number of wires connecting the semiconductor device and external devices is large, so there is a high possibility that a plurality of wires will come into contact with the substrate.

An object of the present invention is to prevent the wiring from a plurality of pads from coming into contact with the substrate in the same semiconductor device and impairing the functions of the six semiconductor devices.

[Means for Solving the Problem 1] Specifically, in order to prevent electrical shorts between the wirings from the pads and between the wirings from the pads and the board even if multiple wirings from the pads come into contact with the board, It is assumed that a plurality of PN junctions are arranged around the outer periphery of the semiconductor device.

[Embodiment] FIG. 1 is an embodiment of the present invention, and shows an example in which an N-type substrate is used as the substrate of a semiconductor device, and the PN junction is composed of three PNP junctions.

FIG. 1(a) is a cross-sectional side view, in which a PN junction 10 is formed on the outer periphery of an N-type substrate 11 near a pad 13. As shown in FIG.

FIG. 2(b) is a cross-sectional front view, in which a PN junction 10 having a width at least equal to or larger than the pad width is formed on the outer periphery of the substrate 11 of the semiconductor device in the vicinity of the pad. Above, multiple pieces are formed. but,
This is just one example, and there is no need to be particular about the type of substrate of the semiconductor device (P type, N type, etc.), the number of PN junctions, or the total number of PN junctions in the semiconductor device.6 Basically, this P
Since the N-junction can fulfill its function if it is double or more, the minimum condition of the present invention is that the N-junction is double or more.

Further, the minimum condition for the total number of PN junctions in a semiconductor device is that the number of PN junctions separated on each side during manufacturing is the same as the number of pads connected to the outside of the semiconductor device.

〔Effect of the invention〕

With the above structure, even if multiple edge shorts occur, the multiple PN junctions formed on the outer periphery of the semiconductor device near the pads will simply prevent electrical shorts between the wiring and the substrate. This also prevents electrical shorts between wiring lines.

As a result, even if an edge short occurs, the semiconductor device will not lose its functionality, and this has the great effect of reducing the occurrence of defects in the assembly process of the semiconductor device and improving the reliability of the semiconductor device.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device showing an embodiment of the present invention, with (a) a side view and (b) a front view. FIG. 2 is a cross-sectional view of (a) a side view and (b) a front view of a semiconductor device in which no consideration is given to edge shorts. FIG. 3 shows that a PN junction is formed on the entire outer periphery of the semiconductor device,
(a) of semiconductor devices with some consideration for edge shorts
) is a side view, and (b) is a front cross-sectional view. 10 ・ 11 ・ l 2 ・ l 3 ・ 20 ・ 2 l ・ 22 ・ 23 ・ PN junction semiconductor device substrate insulating film pad formed on the outer periphery of the semiconductor device according to the embodiment of the present invention Semiconductor device outer periphery semiconductor device substrate insulation Membrane pad 30 - Semiconductor device outer peripheral part 31 in which PN junction is formed - Semiconductor device outer peripheral part 32 - 33 - Insulating film pad or more

Claims (1)

[Claims] A plurality of PN junctions are formed on the outer periphery of a semiconductor device, which are unrelated to the original function of the semiconductor device and have a width greater than the width of the electrode (hereinafter referred to as a pad) taken out from the semiconductor device to an external device. Characteristic semiconductor devices.