JPH03262166A - Thin film semiconductor device - Google Patents
Thin film semiconductor deviceInfo
- Publication number
- JPH03262166A JPH03262166A JP2062440A JP6244090A JPH03262166A JP H03262166 A JPH03262166 A JP H03262166A JP 2062440 A JP2062440 A JP 2062440A JP 6244090 A JP6244090 A JP 6244090A JP H03262166 A JPH03262166 A JP H03262166A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- deposited
- substrate
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 76
- 239000010409 thin film Substances 0.000 title claims description 33
- 239000000758 substrate Substances 0.000 claims abstract description 56
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 20
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 20
- 239000010703 silicon Substances 0.000 claims abstract description 20
- 239000000463 material Substances 0.000 claims description 20
- 238000000034 method Methods 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 26
- 239000002184 metal Substances 0.000 description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 7
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 6
- 229910001220 stainless steel Inorganic materials 0.000 description 6
- 239000010935 stainless steel Substances 0.000 description 6
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical class [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 2
- JIMODRYHNQDMSX-UHFFFAOYSA-N [GeH2].[Si] Chemical compound [GeH2].[Si] JIMODRYHNQDMSX-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 150000003376 silicon Chemical class 0.000 description 2
- 230000000087 stabilizing effect Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- XMIJDTGORVPYLW-UHFFFAOYSA-N [SiH2] Chemical compound [SiH2] XMIJDTGORVPYLW-UHFFFAOYSA-N 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 229910052990 silicon hydride Inorganic materials 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野コ
この発明は、導電性を有する基板の上に、シリコン系半
導体材料による薄膜を堆積させた薄膜半導体装置に関し
、特に、太陽電池等に利用される装置に関する。[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a thin film semiconductor device in which a thin film of silicon-based semiconductor material is deposited on a conductive substrate, and is particularly applicable to solar cells and the like. related to the equipment used.
［従来の技術］
金属基板上に非晶質または微結晶のシリコン系半導体材
料による薄膜、を堆積させた半導体装置は、太陽電池等
に適用される。このような太陽電池には、アモルファス
・シリコン太陽電池が含まれている。これは、加工性、
量産性および低コスト等の点で最も期待されている太陽
電池の一つである。[Prior Art] A semiconductor device in which a thin film of an amorphous or microcrystalline silicon-based semiconductor material is deposited on a metal substrate is applied to solar cells and the like. Such solar cells include amorphous silicon solar cells. This is due to processability,
It is one of the most promising solar cells in terms of mass productivity and low cost.
このような太陽電池では、従来第３図に示すように、金
属基板３１上にｎ型半導体層３３．１型半導体層３４お
よびｐ型半導体層３５を順次堆積させた後に、その上に
透明導電膜３６を堆積させた０層側光入射構造が多く採
用されている。Conventionally, in such a solar cell, as shown in FIG. 3, an n-type semiconductor layer 33, a 1-type semiconductor layer 34, and a p-type semiconductor layer 35 are sequentially deposited on a metal substrate 31, and then a transparent conductive layer is deposited thereon. A 0-layer side light incident structure in which a film 36 is deposited is often adopted.
一方、金属基板上にｐ型、１型およびｎ型の半導体膜を
順次積層させたｎ層側光入射構造の太陽電池も従来存在
するが、これが使用される場合は少ない。この理由は、
０層側光入射構造の方か電子よりも移動度が小さく再結
合中心による捕獲断面積が大きい正孔の、走行距離を短
くてき、ｎ層側光入射構造よりも高効率、高信頼な太陽
電池を得ることができるからである。On the other hand, solar cells with an n-layer side light incidence structure in which p-type, 1-type, and n-type semiconductor films are sequentially laminated on a metal substrate also exist, but these are rarely used. The reason for this is
The 0-layer side light incidence structure shortens the traveling distance of holes, which have a smaller mobility than electrons and a larger capture cross section by recombination centers, and is more efficient and reliable than the n-layer side light incidence structure. This is because batteries can be obtained.
さらに、０層側光入射構造の太陽電池において、ｎｉｐ
接合を二層ないし三層積層させた積層型太陽電池も数多
く検討されている。第４図に、ｎｉｐ接合を三層積層さ
せた太陽電池を示す。この太陽電池では、金属基板１の
上に、ｎ型非晶質水素化シリコン（ｎ型膜−３ｔ：Ｈ）
層３、ｌ型非晶質水素化シリコンゲルマニウム（ｉ型膜
−８ｉＧｅ：Ｈ）層７およびｎ型非晶質水素化シリコン
（ｐ型膜−８ｉ：Ｈ）層８が順次堆積され、その上にｎ
型微結晶シリコン（ｎ型１ｌｃ−３ｉ：Ｈ）層９、ｉ型
外晶質水素化シリコン（ｌ型膜−８ｉ：Ｈ）層１０およ
びｐ型膜−８ｉ：Ｈ層１１が順次堆積され、さらにその
上にｎ型μｃ−３ｉ：Ｈ層１２、ｉ型膜−８ｉ：Ｈ層１
３およびｐ型膜−８ｉｃ：Ｈ層１４が順次堆積され、最
後に透明導電膜６が堆積されている。このような積層型
太陽電池では光の波長分布を考慮した光の有効利用およ
び１層膜厚の低減を図ることができることから、高効率
化および高信頼化に有力な素子構造を形成することがで
きる。Furthermore, in a solar cell with a 0-layer side light incidence structure, nip
Many stacked solar cells in which two or three layers of junctions are stacked are also being studied. FIG. 4 shows a solar cell in which three layers of nip junctions are laminated. In this solar cell, an n-type amorphous hydrogenated silicon (n-type film-3t:H) is formed on a metal substrate 1.
Layer 3, l-type amorphous silicon germanium hydride (i-type film-8iGe:H) layer 7 and n-type amorphous silicon hydride (p-type film-8i:H) layer 8 are sequentially deposited; ni n
A layer 9 of microcrystalline silicon (n-type 1lc-3i:H), a layer 10 of exocrystalline silicon hydride (l-8i:H), and a layer 11 of p-8i:H are sequentially deposited. Furthermore, on top of that, n-type μc-3i:H layer 12, i-type film-8i:H layer 1
3 and p-type film-8ic:H layer 14 are sequentially deposited, and finally transparent conductive film 6 is deposited. In such a stacked solar cell, it is possible to effectively utilize light by considering the wavelength distribution of light and to reduce the thickness of one layer, so it is possible to form a device structure that is effective for increasing efficiency and reliability. can.
［発明が解決しようとする課題］
しかしなから、金属基板上に形成する従来の９層側光入
射構造太陽電池では、半導体膜が金属基板から剥離しや
すいという欠点があった。特に、金属基板としてよく使
用されるステンレス基板で、このような剥離が発生する
ため、大きな問題となっていた。また、ｉ型層として非
晶質水素化シリコンゲルマニウム（ａ−３ｉ Ｇｅ ：
Ｈ）を用いた場合には、非晶質水素化シリコン（ａ−
８ｔ：Ｈ）あるいは、非晶質水素化シリコンカーボン（
ａＳ ｉ Ｃ： Ｈ）を１型層として用いた場合に比べ
、膜中の応力の違いによりこのような剥離の発生頻度が
高まる。ステンレス基板などの金属基板上にｎ１ｐｎｉ
ｐあるいはｎ１ｐｎｉｐｎｉｐ接合を形成する積層型太
陽電池の最下部ｉ層には、長波長光感度向上ためにａ−
８ｉＧｅ：Ｈを用いる場合があるが、上述したように、
剥離の発生頻度が高まるので、太陽電池の安定化の上で
問題となっていた。[Problems to be Solved by the Invention] However, the conventional nine-layer side light incident structure solar cell formed on a metal substrate has a drawback in that the semiconductor film is easily peeled off from the metal substrate. Particularly, such peeling occurs with stainless steel substrates that are often used as metal substrates, which has been a big problem. In addition, amorphous silicon germanium hydride (a-3i Ge:
H), amorphous hydrogenated silicon (a-
8t:H) or amorphous hydrogenated silicon carbon (
Compared to the case where aS i C: H) is used as a type 1 layer, such peeling occurs more frequently due to the difference in stress in the film. n1pni on a metal substrate such as a stainless steel substrate
The lowest i layer of a stacked solar cell that forms a p or n1pnipnip junction has a-
8iGe:H may be used, but as mentioned above,
Since the frequency of peeling increases, this has been a problem in terms of stabilizing the solar cell.
また、金属基板以外で、ガラスなどの絶縁性透光基板、
アルミナなどの絶縁性非透光基板あるいは絶縁性透光板
に透明導電膜を堆積した基板を用いた場合においても、
その上にｎ型あるいはｉ型の非晶質、微結晶または多結
晶のシリコン系半導体を堆積し、さらに半導体膜を堆積
した薄膜太陽電池およびその他の薄膜半導体装置では、
基板から半導体膜の剥離が起こる場合が多く、薄膜半導
体装置の安定化に関し問題があった。In addition to metal substrates, insulating transparent substrates such as glass,
Even when using an insulating non-transparent substrate such as alumina or a substrate with a transparent conductive film deposited on an insulating transparent plate,
In thin-film solar cells and other thin-film semiconductor devices in which an n-type or i-type amorphous, microcrystalline, or polycrystalline silicon-based semiconductor is deposited thereon, and a semiconductor film is further deposited,
The semiconductor film often peels off from the substrate, which poses a problem in stabilizing the thin film semiconductor device.
それゆえに、この発明の目的は、上述したような金属基
板または絶縁性の基板に透明導電膜を堆積した基板の上
に、非晶質、微結晶または多結晶のシリコン系半導体を
堆積して形成される薄膜半導体装置において、基板から
半導体膜が剥離しないような薄膜半導体装置を提供する
ことにある。Therefore, an object of the present invention is to form an amorphous, microcrystalline, or polycrystalline silicon-based semiconductor by depositing it on a metal substrate or an insulating substrate as described above on which a transparent conductive film is deposited. An object of the present invention is to provide a thin film semiconductor device in which a semiconductor film does not peel off from a substrate.
［課題を解決するための手段］
この発明は、導電性を有する基板と、基板の上に堆積さ
れるシリコン系半導体材料による複数の層とを備える薄
膜半導体装置において、複数の層が基板の上に形成され
るｐ型シリコン系半導体材料による第１の層と、第１の
層の上に第１の層とオーム性接触となるよう形成される
ｎ型シリコン系半導体材料による第２の層とを備える薄
膜半導体装置である。[Means for Solving the Problems] The present invention provides a thin film semiconductor device including a conductive substrate and a plurality of layers made of a silicon-based semiconductor material deposited on the substrate, in which the plurality of layers are deposited on the substrate. a first layer made of a p-type silicon-based semiconductor material formed on the first layer, and a second layer made of an n-type silicon-based semiconductor material formed on the first layer so as to be in ohmic contact with the first layer; A thin film semiconductor device comprising:
この発明に従う導電性を有する基板として、たとえば、
金属基板、絶縁性透光基板に透明導電膜を堆積したもの
、絶縁性非透光基板に透明導電膜を堆積したものおよび
絶縁性透光板に透明導電膜を堆積した基板等を用いるこ
とができる。As the conductive substrate according to the present invention, for example,
A metal substrate, a transparent conductive film deposited on an insulating transparent substrate, a transparent conductive film deposited on an insulating non-transparent substrate, a transparent conductive film deposited on an insulating transparent plate, etc. can be used. can.
また、この発明に従うシリコン系半導体として非晶質、
微結晶または多結晶のものを用いることにより、発明の
目的をより効果的に達成することができる。Further, as the silicon-based semiconductor according to the present invention, amorphous,
By using microcrystalline or polycrystalline materials, the objects of the invention can be more effectively achieved.
［作用］
この発明では、導電性を有する基板の上に、まずｐ型シ
リコン系半導体材料による第１の層が堆積され、その上
にシリコン系半導体材料による層かさらに堆積されてい
る。ｐ型シリコン系半導体材料による第１の層と導電性
を有する基板との密着性は高く、基板と半導体材料との
間の剥離は抑止される。このように密着性が高まる原因
は、必ずしも明確になっていないが、ｐ型膜が硼素原子
を添加されていること、膜中の水素含有量が少ないこと
およびエツチングされにくい性質を有することなどが関
係していると考えられる。[Operation] In the present invention, a first layer made of a p-type silicon-based semiconductor material is first deposited on a conductive substrate, and a layer made of a silicon-based semiconductor material is further deposited thereon. Adhesion between the first layer made of a p-type silicon-based semiconductor material and the conductive substrate is high, and peeling between the substrate and the semiconductor material is suppressed. The reasons for this increased adhesion are not necessarily clear, but include the addition of boron atoms to the p-type film, the low hydrogen content in the film, and the fact that it is resistant to etching. It is thought that they are related.
またこの発明は、ｐ型シリコン系半導体材料による第１
の層の上に、ｎ型シリコン系半導体祠料による第２の層
が堆積され、かつ、第１の層と第２の層とはオーム性接
触となっている。このようにオーム性接触となることで
、第１の層と第２の層との間の整流性はなくなり、導電
性を有する基板と半導体材料による層の関係は、導電性
を有する基板の上に直接ｎ型シリコン系半導体材料を堆
積させた場合と実質的に変わらなくなる。その上で、上
述したように密着性が高まり、剥離が防止される。Further, the present invention provides a first method using a p-type silicon-based semiconductor material.
A second layer of n-type silicon-based semiconductor material is deposited on the layer, and the first layer and the second layer are in ohmic contact. By forming ohmic contact in this way, the rectifying property between the first layer and the second layer disappears, and the relationship between the conductive substrate and the layer made of semiconductor material is different from that on the conductive substrate. This is substantially the same as when an n-type silicon-based semiconductor material is directly deposited on the surface. In addition, as described above, adhesion is enhanced and peeling is prevented.
また、オーム性接触とすることで、たとえば太陽電池の
場合、導電性を有する基板の上にｐ型をまず堆積しても
、その上にｎ型、ｉ型およびｐ型を順次堆積していき、
０層側光入射構造とすることができ、高効率、高信頼な
ものにすることができる。In addition, by using ohmic contact, for example, in the case of solar cells, even if p-type is first deposited on a conductive substrate, n-type, i-type, and p-type are sequentially deposited on top of it. ,
It is possible to have a light incident structure on the 0-layer side, and it is possible to achieve high efficiency and high reliability.
［実施例コ
（実施例１）
第１図に、この発明に従う実施例１の薄膜半導体装置を
示す。第１図に示されるように、この薄膜半導体装置は
、ステンレスなどの金属基板１上に、約１００人のｐ型
ａ−８ｉ：Ｈ層２、約１０００人のｎ型ａ−３ｉ：Ｈ層
３、約３０００人のｉ型ａ−３ｉＧｅ：Ｈ層４および約
１．００人のｐ型ａ−８ｉＣ：Ｈ層５が順次堆積され、
さらにその上に透明導電膜６が堆積されている。[Example 1] FIG. 1 shows a thin film semiconductor device of Example 1 according to the present invention. As shown in FIG. 1, this thin film semiconductor device consists of approximately 100 p-type a-8i:H layers 2 and approximately 1000 n-type a-3i:H layers on a metal substrate 1 made of stainless steel or the like. 3. About 3000 I-type a-3iGe:H layers 4 and about 1.00 p-type A-8iC:H layers 5 are sequentially deposited;
Furthermore, a transparent conductive film 6 is deposited thereon.
上記薄膜半導体装置において、半導体膜はアモルファス
太陽電池等の製造に用いられる一般的な装置によって形
成された。形成の際のモノシランガス（ＳｉＨ２）およ
び不純物ガス等の流量、チャンバー内の圧力、高周波の
条件ならびに基板温度は第１表に示すとおりであった。In the thin film semiconductor device described above, the semiconductor film was formed by a general apparatus used for manufacturing amorphous solar cells and the like. The flow rates of monosilane gas (SiH2), impurity gas, etc., pressure in the chamber, high frequency conditions, and substrate temperature during the formation were as shown in Table 1.
（以下余白）
第 １
表
このようにして形成された、第１図に示される薄膜半導
体装置において、ｐ型ａ−８ｔ：Ｈ層２と、ｎ型ａ−３
ｉ：Ｈ３層との間はオーム性接触となっていた。また、
第１図に示される薄膜半導体装置では、形成直後および
形成後数か月を経ても上述したような剥離は認められな
かった。(Left below) Table 1 In the thin film semiconductor device shown in FIG. 1 formed in this manner, p-type a-8t:H layer 2 and n-type a-3
There was ohmic contact with the i:H3 layer. Also,
In the thin film semiconductor device shown in FIG. 1, the above-mentioned peeling was not observed immediately after formation and even after several months after formation.
一方、対照として同じステンレスなどの金属基板上に、
ｎ型ａ−３ｉ：Ｈ，ｉ型ａ−３ｉＧｅ：Ｈおよびｐ型ａ
−８ｉＣ：Ｈ層を第１表と同じ条件で順次堆積した後、
透明導電膜をその上に堆積させた薄膜半導体装置を形成
した。この薄膜半導体装置では、形成直後に基板全面に
渡る剥離が発生するものや、形成後徐々に剥離が発生し
、数日後はとんど剥離するものが認められた。On the other hand, as a control, on the same metal substrate such as stainless steel,
n-type a-3i:H, i-type a-3iGe:H and p-type a
After sequentially depositing -8iC:H layers under the same conditions as in Table 1,
A thin film semiconductor device was formed on which a transparent conductive film was deposited. In these thin film semiconductor devices, it was observed that in some cases, peeling occurred over the entire surface of the substrate immediately after formation, and in some cases, peeling occurred gradually after formation, and in some cases, peeling occurred only after a few days.
なお、この発明に従って形成された第１図に示す薄膜半
導体装置および対照として形成された薄膜半導体装置は
、太陽電池として機能し、それらの能力は同等であった
。Note that the thin film semiconductor device shown in FIG. 1 formed according to the present invention and the thin film semiconductor device formed as a control functioned as solar cells, and their abilities were equivalent.
さらにこの発明に従うｐ型シリコン系半導体材料として
、微結晶シリコン（μｃ−８ｉ：Ｈ）あ０
るいは微結晶シリコンカーボンを用いることができる。Further, as the p-type silicon-based semiconductor material according to the present invention, microcrystalline silicon (μc-8i:H) or microcrystalline silicon carbon can be used.
（実施例２）
第２図に、この発明に従う実施例２の薄膜半導体装置を
示す。第２図に示されるように、この薄膜半導体装置は
、ステンレスなどの金属基板１の上に、約１００人のｐ
型ａ−８ｉ：Ｈ層２が堆積され、その上にｎｉｐ接合が
３個堆積されている。(Example 2) FIG. 2 shows a thin film semiconductor device of Example 2 according to the present invention. As shown in FIG. 2, this thin film semiconductor device is made of about 100 people on a metal substrate 1 made of stainless steel or the like.
Type a-8i: H layer 2 is deposited, on which three nip junctions are deposited.
すなわち、ｐ型ａ−８ｔ：Ｈ層２の上に、約１０００Ａ
のｎ型ａ−８ｉ：Ｈ層３、約２５００Ａのｉ型ａ−３ｉ
Ｇｅ：Ｈ層７および約５０人のｐ型ａ−３ｉ：Ｈ層８が
堆積され、さらにその上に約５０人のｎ型μｃ−８ｉ：
Ｈ層９、約３０００人のｉ型ａ−８ｉ：Ｈ層１０および
約５０人のｐ型ａ−８ｉ：Ｈ層１１が堆積され、さらに
約５０人のｎ型、［ＺＣ−３ｉ：Ｈ層１２、約４００Ａ
のｉ型ａ−８ｉ：Ｈ層１３および、約１００人のｐ型ａ
ＳｉＣ：Ｈ層１４が堆積され、最後に透明導電膜６が堆
積されている。That is, on the p-type a-8t:H layer 2, about 1000A
n-type a-8i: H layer 3, about 2500A i-type a-3i
A Ge:H layer 7 and about 50 p-type a-3i:H layer 8 are deposited, on top of which about 50 n-type μc-8i:
H layer 9, about 3000 I-type a-8i:H layer 10 and about 50 p-type a-8i:H layer 11 are deposited, plus about 50 n-type, [ZC-3i:H layer 12, about 400A
I type a-8i: H layer 13 and about 100 p type a
A SiC:H layer 14 is deposited, and finally a transparent conductive film 6 is deposited.
このような薄膜半導体装置において、半導体膜１
は、実施例］と同じ装置を用いて形成され、その形成条
件は、ｐ型ａ−３ｉ：Ｈ層２．８および１１、ｎ型ａ−
８ｉ：Ｈ層３、ｉ型ａ−８ｉＧｅ：Ｈ層７ならびにｐ型
ａ−８ｉＣ：Ｈ層１４について実施例１と同じであり、
ｉ型ａ−８ｉ：Ｈ層１０および１３ならびにｎ型μｃ−
３ｉ：Ｈ層９および１２については、第２表に示すとお
りてあった。In such a thin film semiconductor device, the semiconductor film 1 is formed using the same apparatus as in Example], and the formation conditions are as follows: p-type a-3i:H layers 2.8 and 11, n-type a-
8i:H layer 3, i-type a-8iGe:H layer 7 and p-type a-8iC:H layer 14 are the same as in Example 1,
I-type a-8i: H layers 10 and 13 and n-type μc-
3i:H layers 9 and 12 were as shown in Table 2.
（以下余白）
２
第 ２
表
このようにして形成された薄膜半導体装置は、実施例１
と同様剥離が発生しなかった。一方、対照としてｐ型層
を最初に堆積することなく、基板の上にそのままｎｉｐ
接合を上記と同じ条件で３個堆積させ、その上に透明導
電膜を積んだものを形成したが、これには剥離が発生し
た。(The following is a blank space) 2 Table 2 The thin film semiconductor device thus formed is shown in Example 1.
Similarly, no peeling occurred. On the other hand, as a control, we nip the p-type layer directly onto the substrate without first depositing the p-type layer.
Three junctions were deposited under the same conditions as above, and a transparent conductive film was stacked thereon, but peeling occurred.
実施例において、基板上に堆積される半導体層の厚みお
よびその形成条件を具体的に示したが、これらは目的に
応じて当然変えることができる。In the examples, the thickness of the semiconductor layer deposited on the substrate and the conditions for its formation are specifically shown, but these can of course be changed depending on the purpose.
なお、その際に基板の上に形成されるｎ型半導体層とそ
の上に形成されるｎ型半導体層とがオーム性接触となる
よう留意しなければならない。At this time, care must be taken so that the n-type semiconductor layer formed on the substrate and the n-type semiconductor layer formed thereon are in ohmic contact.
また、実施例において、この発明に従う導電性を有する
基板として、ステンレスなどの金属基板を用いたが、そ
の代わりにガラスなどの絶縁性透光基板に透明導電膜を
堆積させたもの、アルミナなどの絶縁性非透光基板に透
明導電膜を堆積したものおよびその他の絶縁性透光板に
透明導電膜を堆積した基板などを用いても同様の効果を
奏することができる。In addition, in the examples, a metal substrate such as stainless steel was used as the conductive substrate according to the present invention, but instead, a transparent conductive film was deposited on an insulating transparent substrate such as glass, or a transparent conductive film was deposited on an insulating transparent substrate such as alumina. Similar effects can be achieved by using an insulating non-light-transmitting substrate with a transparent conductive film deposited thereon, or another insulating light-transmitting plate with a transparent conductive film deposited thereon.
３
］ ４
また、実施例において得られた薄膜半導体装置は特に太
陽電池として有用なものである。しかし、この発明に従
って得られる薄膜半導体装置は、特に太陽電池に限定さ
れるものではなく、たとえば、イメージセンサなどにお
いても剥離が防止されたものとして十分効果を発揮する
ものである。3 ] 4 Furthermore, the thin film semiconductor devices obtained in the examples are particularly useful as solar cells. However, the thin film semiconductor device obtained according to the present invention is not particularly limited to solar cells, but can also be used, for example, in image sensors, etc., where peeling is prevented and the thin film semiconductor device is sufficiently effective.
［発明の効果］
以上説明したように、この発明によれば、導電性を有す
る基板上にｐ型シリコン系半導体材料による層を形成し
、その上に複数の半導体材料による層を堆積していくこ
とで、基板からの半導体層の剥離が抑止される。したが
って、この発明に従って得られる薄膜半導体装置を太陽
電池やイメージセンサなどに使用すれば、長期に渡って
安定した特性を維持することができる。[Effects of the Invention] As explained above, according to the present invention, a layer made of a p-type silicon-based semiconductor material is formed on a conductive substrate, and layers made of a plurality of semiconductor materials are deposited thereon. This prevents the semiconductor layer from peeling off from the substrate. Therefore, if the thin film semiconductor device obtained according to the present invention is used in solar cells, image sensors, etc., stable characteristics can be maintained over a long period of time.
第１図は、この発明に従う実施例１の薄膜半導体装置を
示す断面図である。
第２図は、この発明に従う実施例２の薄膜半導体装置を
示す断面図である。
５
第３図は、従来の薄膜半導体装置の一例を示す断面図で
ある。
第４図は、従来の薄膜半導体装置のもうひとつの例を示
す断面図である。
の例を示す断面図である。
図において、１および３１は金属基板、２はｐ型ａ−３
ｉ：Ｈ層、３はｎ型ａ−８ｔ：Ｈ層、４はｉ型ａ−８ｉ
Ｇｅ：Ｈ層、５はｐ型ａ−８ｉＣ：Ｈ層、６および３６
は透明導電膜、７はｉ型ａＳｉＧｅ：Ｈ層、８はｐ型ａ
−８ｉ：Ｈ層、９はｎ型μｃ−８ｉ：Ｈ層、１０はｉ型
ａ−８ｉ：Ｈ層、１１はｐ型ａ−８ｔ：Ｈ層、］２はｎ
型μｃ−５ｉ：Ｈ層、１３はｉ型ａ−８ｉ：Ｈ層、１４
はｐ型ａ−８ｉＣ：Ｈ層、３３はｎ型半導体層、３４は
ｉ型半導体層、３５はｐ型半導体層を示す。FIG. 1 is a sectional view showing a thin film semiconductor device of Example 1 according to the present invention. FIG. 2 is a sectional view showing a thin film semiconductor device of Example 2 according to the present invention. 5. FIG. 3 is a sectional view showing an example of a conventional thin film semiconductor device. FIG. 4 is a sectional view showing another example of a conventional thin film semiconductor device. It is a sectional view showing an example. In the figure, 1 and 31 are metal substrates, 2 is a p-type a-3
i: H layer, 3 is n-type a-8t: H layer, 4 is i-type a-8i
Ge:H layer, 5 is p-type a-8iC:H layer, 6 and 36
is a transparent conductive film, 7 is an i-type aSiGe:H layer, and 8 is a p-type a
-8i:H layer, 9 is n-type μc-8i:H layer, 10 is i-type a-8i:H layer, 11 is p-type a-8t:H layer, ]2 is n
Type μc-5i: H layer, 13 is i type a-8i: H layer, 14
3 is a p-type a-8iC:H layer, 33 is an n-type semiconductor layer, 34 is an i-type semiconductor layer, and 35 is a p-type semiconductor layer.
Claims (1)
リコン系半導体材料による複数の層とを備える薄膜半導
体装置において、 前記複数の層が、 前記基板の上に形成されるｐ型シリコン系半導体材料に
よる第１の層と、 前記第１の層の上に形成され、前記第１の層とオーム性
接触となるｎ型シリコン系半導体材料による第２の層と
、を備える薄膜半導体装置。[Claims] A thin film semiconductor device comprising a conductive substrate and a plurality of layers made of a silicon-based semiconductor material deposited on the substrate, wherein the plurality of layers are formed on the substrate. a first layer made of a p-type silicon-based semiconductor material; and a second layer made of an n-type silicon-based semiconductor material formed on the first layer and in ohmic contact with the first layer. A thin film semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2062440A JP2632736B2 (en) | 1990-03-12 | 1990-03-12 | Thin film semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2062440A JP2632736B2 (en) | 1990-03-12 | 1990-03-12 | Thin film semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03262166A true JPH03262166A (en) | 1991-11-21 |
| JP2632736B2 JP2632736B2 (en) | 1997-07-23 |
Family
ID=13200265
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2062440A Expired - Fee Related JP2632736B2 (en) | 1990-03-12 | 1990-03-12 | Thin film semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2632736B2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5638873A (en) * | 1976-09-29 | 1981-04-14 | Rca Corp | Semiconductor device with amorphous silicon layer |
| JPS58196061A (en) * | 1982-05-10 | 1983-11-15 | Sharp Corp | Electrode formation for thin film semiconductor device |
-
1990
- 1990-03-12 JP JP2062440A patent/JP2632736B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5638873A (en) * | 1976-09-29 | 1981-04-14 | Rca Corp | Semiconductor device with amorphous silicon layer |
| JPS58196061A (en) * | 1982-05-10 | 1983-11-15 | Sharp Corp | Electrode formation for thin film semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2632736B2 (en) | 1997-07-23 |
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