JPH0325935B2 - - Google Patents

Info

Publication number
JPH0325935B2
JPH0325935B2 JP61127783A JP12778386A JPH0325935B2 JP H0325935 B2 JPH0325935 B2 JP H0325935B2 JP 61127783 A JP61127783 A JP 61127783A JP 12778386 A JP12778386 A JP 12778386A JP H0325935 B2 JPH0325935 B2 JP H0325935B2
Authority
JP
Japan
Prior art keywords
film carrier
jig
integrated circuit
bumps
gold balls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61127783A
Other languages
Japanese (ja)
Other versions
JPS62283638A (en
Inventor
Kimihiko Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindo Denshi Kogyo KK
Original Assignee
Shindo Denshi Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindo Denshi Kogyo KK filed Critical Shindo Denshi Kogyo KK
Priority to JP61127783A priority Critical patent/JPS62283638A/en
Publication of JPS62283638A publication Critical patent/JPS62283638A/en
Publication of JPH0325935B2 publication Critical patent/JPH0325935B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/11001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform

Description

【発明の詳細な説明】 産業上の利用分野 この発明は、フイルムキヤリア上にICやLSI等
の集積回路を実装する実装方法に関する。詳しく
は、フイルムキヤリアのリード先端にバンプを形
成し、それらのバンプをそれぞれ集積回路チツプ
のアルミニウム電極に固着し、フイルムキヤリア
上に集積回路を実装する実装方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to a mounting method for mounting integrated circuits such as ICs and LSIs on film carriers. More specifically, the present invention relates to a mounting method in which bumps are formed at the leading ends of a film carrier, each of the bumps is fixed to an aluminum electrode of an integrated circuit chip, and an integrated circuit is mounted on the film carrier.

従来の技術 従来、この種の実装方法では、集積回路チツプ
のアルミニウム電極上にバリアメタルを蒸着して
その上にメツキ法により金バンプを形成し、それ
にそれぞれフイルムキヤリアのリード先端を固着
し、フイルムキヤリア上に集積回路を実装してい
た。
Conventional technology Conventionally, in this type of mounting method, a barrier metal is vapor-deposited on the aluminum electrode of an integrated circuit chip, gold bumps are formed thereon by a plating method, the lead ends of a film carrier are fixed to each bump, and the film is An integrated circuit was mounted on the carrier.

発明が解決しようとする問題点 ところが、このような従来の実装方法では、 1)工数がかかり、高価となる、 2)歩留りが悪い、 などの問題点があつた。The problem that the invention aims to solve However, with this traditional implementation method, 1) It takes a lot of man-hours and is expensive. 2) Poor yield; There were other problems.

そこで、この発明の目的は、フイルムキヤリア
の実装方法にあつて、このような従来の問題点を
解消し、工数を少なくし、安価とするとともに、
歩留りを良好とすることにある。
SUMMARY OF THE INVENTION It is therefore an object of the present invention to solve such conventional problems in a film carrier mounting method, to reduce the number of man-hours, to reduce the cost, and to
The objective is to improve the yield.

問題点を解決するための手段 そのため、この発明によるフイルムキヤリアの
実装方法では、たとえば以下の図示実施例に示す
とおり、治具10の位置決め穴11…に入れてあ
らかじめその治具10上に金ボール12…を配列
し、それら金ボール12…にそれぞれフイルムキ
ヤリア13のリード14…先端を位置合わせして
熱圧接し、それら金ボール12…を該リード14
…先端に転写してそこにバンプ16…を形成し、
しかる後それらバンプ16…をICチツプ17等
の集積回路チツプのアルミニウム電極18…に熱
圧着して前記フイルムキヤリア13に集積回路を
実装することを特徴とする。
Means for Solving the Problems Therefore, in the film carrier mounting method according to the present invention, for example, as shown in the illustrated embodiment below, gold balls are placed in the positioning holes 11 of the jig 10 and placed on the jig 10 in advance. 12... are arranged, and the ends of the leads 14 of the film carrier 13 are aligned and heat-pressed to the gold balls 12..., respectively, and the gold balls 12 are attached to the leads 14.
...is transferred to the tip and a bump 16 is formed there,
Thereafter, the integrated circuit is mounted on the film carrier 13 by thermocompression bonding the bumps 16 to aluminum electrodes 18 of an integrated circuit chip such as an IC chip 17.

作 用 そして、フイルムキヤリア13側にバンプ16
…を形成し、そのバンプ16…をそれぞれ集積回
路チツプのアルミニウム電極18…に固着し、フ
イルムキヤリア13上にICやLSI等の集積回路を
実装するものである。
Effect: Then, bump 16 is formed on the film carrier 13 side.
... are formed, and the bumps 16 are fixed to the aluminum electrodes 18 of the integrated circuit chip, respectively, and an integrated circuit such as an IC or LSI is mounted on the film carrier 13.

実施例 以下、図面に示す実施例に基づき、この発明に
ついてさらに詳細かつ具体的に説明する。
Embodiments Hereinafter, the present invention will be described in more detail and specifically based on embodiments shown in the drawings.

この発明による実装方法では、第1図および第
2図に示す治具10を用い、まずあらかじめその
治具10の複数の位置決め穴11…内にそれぞれ
第3図に示す如く金ボール12…を挿入する。位
置決め穴11…は、治具10の表面に等しい大き
さの半球状の穴を複数あけて形成し、それを後述
するフイルムキヤリアのリードに対応してたとえ
ば第1図に示すように四角く並べて設け、そこに
収納する金ボール12…を位置決めする。挿入さ
れる金ボール12…は、第4図から判るとおりそ
れらの下部を各位置決め穴11…内に収納してな
り、結局治具10上でフイルムキヤリアのリード
に対応してたとえば実施例の如く四角に配列され
ることとなる。そして、好ましくはそれら各金ボ
ール12…の頂部を第5図に示すように平面状に
つぶし、径が多少不揃いであつても治具10の表
面からの高さhを等しくし、後述するフイルムキ
ヤリアのリード先端への転写を容易とする。
In the mounting method according to the present invention, a jig 10 shown in FIGS. 1 and 2 is used, and gold balls 12 are first inserted into a plurality of positioning holes 11 of the jig 10 as shown in FIG. 3, respectively. do. The positioning holes 11 are formed by drilling a plurality of hemispherical holes of equal size on the surface of the jig 10, and are arranged in a square arrangement, for example, as shown in FIG. 1, corresponding to the leads of the film carrier described later. , position the gold balls 12 to be stored there. As can be seen from FIG. 4, the gold balls 12 to be inserted have their lower portions accommodated in the respective positioning holes 11, and are eventually placed on the jig 10 in correspondence with the leads of the film carrier, for example, as in the embodiment. They will be arranged in a square. Preferably, the tops of the gold balls 12 are crushed into a flat shape as shown in FIG. Facilitates transfer to the carrier lead tip.

さて、上述の如く治具10上に配列した金ボー
ル12…には、第6図に示すように、それぞれフ
イルムキヤリア13のリード14…先端を対向し
位置合わせする。しかして、第7図に示すように
ボンデイングツール15で各リード14…の先端
をそれぞれ対向する金ボール12…に押し当て、
熱圧接してそれら金ボール12…を各リード14
…の先端に一括転写する。そして、第8図に示す
ように、各リード14…の先端にバンプ16…を
形成する。
Now, as shown in FIG. 6, the gold balls 12 arranged on the jig 10 as described above are aligned with the leading ends of the leads 14 of the film carrier 13 facing each other. Then, as shown in FIG. 7, the tips of the leads 14 are pressed against the opposing gold balls 12 using the bonding tool 15,
The gold balls 12 are connected to each lead 14 by heat pressure welding.
Transfer all at once to the tip of... Then, as shown in FIG. 8, bumps 16 are formed at the tips of the leads 14.

しかる後、たとえば第9図に示すように、それ
ら転写した金ボール12…で形成されるバンプ1
6…をそれぞれICチツプ17のアルミニウム電
極18…に一時に熱圧着し、フイルムキヤリア1
3にICを実装してなる。
After that, as shown in FIG. 9, for example, bumps 1 formed by the transferred gold balls 12 are formed.
6... to the aluminum electrodes 18... of the IC chip 17 at the same time, and the film carrier 1
3 has an IC mounted on it.

実施例では、フイルムキヤリア13にICを実
装する例を示すが、ICに限らずLSIを実装しても
もちろんよう。
In the embodiment, an example is shown in which an IC is mounted on the film carrier 13, but it is of course possible to mount an LSI instead of an IC.

発明の効果 したがつて、この発明によれば、 1 フイルムキヤリアに対する集積回路の実装工
程を著しく単純化し、工数を少なくとも、価格
の低減を図ることができる。
Effects of the Invention Therefore, according to the present invention: 1. The process of mounting an integrated circuit on a film carrier can be significantly simplified, and at least the number of man-hours can be reduced and the cost can be reduced.

2 フイルムキヤリア側にバンプを形成するの
で、従来のように不良チツプにバンプを形成す
るようなことはなく、歩留りを向上することが
できる。
2. Since the bumps are formed on the film carrier side, there is no need to form bumps on defective chips as in the conventional method, and the yield can be improved.

3 メツキではなく、純粋な金のボールでバンプ
を形成するから、良好な品質を確保することが
できる。
3. Good quality can be ensured because the bumps are formed using pure gold balls instead of metal plating.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明によるフイルムキヤリアの実
装方法で使用する治具の斜視図、第2図はその縦
断面図、第3図はその治具の位置決め穴内に金ボ
ールを挿入した状態における縦断面図、第4図は
その1つの金ボール挿入部分の拡大縦断面図、第
5図ないし第9図はこの発明による実装方法を示
す工程図である。 10……治具、11……位置決め穴、12……
金ボール、13……フイルムキヤリア、14……
リード、16……バンプ、17……集積回路チツ
プの一例であるICチツプ、18……アルミニウ
ム電極。
Fig. 1 is a perspective view of a jig used in the film carrier mounting method according to the present invention, Fig. 2 is a longitudinal sectional view thereof, and Fig. 3 is a longitudinal sectional view of the jig with the gold ball inserted into the positioning hole. 4 are enlarged longitudinal sectional views of one of the gold ball insertion portions, and FIGS. 5 to 9 are process diagrams showing the mounting method according to the present invention. 10... Jig, 11... Positioning hole, 12...
Gold ball, 13...Film carrier, 14...
Lead, 16... Bump, 17... IC chip which is an example of an integrated circuit chip, 18... Aluminum electrode.

Claims (1)

【特許請求の範囲】[Claims] 1 治具の位置決め穴に入れてあらかじめその治
具上に金ボールを配列し、それら金ボールにそれ
ぞれフイルムキヤリアのリード先端を位置合わせ
して熱圧接し、それら金ボールを該リード先端に
転写してそこにバンプを形成し、しかる後それら
バンプを集積回路チツプのアルミニウム電極に熱
圧着して前記フイルムキヤリアに集積回路を実装
してなる、フイルムキヤリアの実装方法。
1 Arrange the gold balls in advance on the jig by placing them in the positioning holes of the jig, align the lead tips of the film carrier with the gold balls and heat-press them, and transfer the gold balls to the lead tips. 2. A method for mounting a film carrier, comprising: forming bumps thereon, and then thermocompression bonding the bumps to aluminum electrodes of an integrated circuit chip to mount an integrated circuit on the film carrier.
JP61127783A 1986-06-02 1986-06-02 Mounting method for film carrier Granted JPS62283638A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61127783A JPS62283638A (en) 1986-06-02 1986-06-02 Mounting method for film carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61127783A JPS62283638A (en) 1986-06-02 1986-06-02 Mounting method for film carrier

Publications (2)

Publication Number Publication Date
JPS62283638A JPS62283638A (en) 1987-12-09
JPH0325935B2 true JPH0325935B2 (en) 1991-04-09

Family

ID=14968570

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61127783A Granted JPS62283638A (en) 1986-06-02 1986-06-02 Mounting method for film carrier

Country Status (1)

Country Link
JP (1) JPS62283638A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57152147A (en) * 1981-03-16 1982-09-20 Matsushita Electric Ind Co Ltd Formation of metal projection on metal lead

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57152147A (en) * 1981-03-16 1982-09-20 Matsushita Electric Ind Co Ltd Formation of metal projection on metal lead

Also Published As

Publication number Publication date
JPS62283638A (en) 1987-12-09

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