JPH03255641A - Film carrier tape - Google Patents

Film carrier tape

Info

Publication number
JPH03255641A
JPH03255641A JP2054111A JP5411190A JPH03255641A JP H03255641 A JPH03255641 A JP H03255641A JP 2054111 A JP2054111 A JP 2054111A JP 5411190 A JP5411190 A JP 5411190A JP H03255641 A JPH03255641 A JP H03255641A
Authority
JP
Japan
Prior art keywords
film carrier
hole
carrier tape
leads
olb
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2054111A
Other languages
Japanese (ja)
Other versions
JP2503711B2 (en
Inventor
Toyoichi Ichikawa
市川 豊一
Yoichiro Takuma
詫摩 陽一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2054111A priority Critical patent/JP2503711B2/en
Publication of JPH03255641A publication Critical patent/JPH03255641A/en
Application granted granted Critical
Publication of JP2503711B2 publication Critical patent/JP2503711B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent completely the deformation of leads as well as to widen the intervals between outer lead bondings(OLBs) to prevent the generation of a shortcircuit by a method wherein pads for OLB use are provided on the rear of a film carrier tape instead of outer lead bonding(OLB) leads. CONSTITUTION:A film carrier tape 6b is provided with sprocket holes 1b, a device hole 3b and leads 4. A semiconductor chip 2b is bonded to the leads 4b via bumps 7b provided on electrode terminals and the leads 4b are connected to OLB pads 14b on the rear of the tape 6b via through hole 13b in the tape 6. The pads 14b are arranged in two rows in a zigzag form and are alternately arranged in such a way as to face each other holding the holes 13b arranged in two rows between them. The pads 14b formed in one row of the two rows are formed between the hole 3b and the hole 13b and are respectively provided at positions, through which lead patterns located on the opposite surface, the tape 6b surface, pass.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はフィルムキャリア半導体装置用のフィルムキャ
リアテープに関し、特に多数リード用のフィルムキャリ
アテープに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a film carrier tape for a film carrier semiconductor device, and particularly to a film carrier tape for multiple leads.

〔従来の技術〕[Conventional technology]

従来のフィルムキャリアテープを用いた半導体装置の製
造方法は、第7図の平面図及び第1図の断面図に示す如
く、搬送及び位置決め用のスゲロケットホールlaと半
導体チップ2aが入る開孔部であるデバイスホール3a
を有するポリイミド等の絶縁フィルム上に銅等の金属箔
を接着し、との金属箔をエツチング等により所望の形状
のり−ド4aと電気選別の為のパッド5aとを形成した
フィルムキャリアテープ6aを準備し、又、あらかじめ
電極端子上に金属突起物であるバンプ7aを設けた半導
体テップ2aを別に準備し、次にこれらフィルムキャリ
アテープ6aのリード4aと半導体チップ2aのバンブ
7aとを熱圧着法筐たは共晶法等によりインナーリード
ボンディング(以下ILB)L、フィルムキャリアテー
プ状態で電気選別用パッド5a上に接触子を接続させて
電気選別やバイアス試験をすることにより完成する。
As shown in the plan view of FIG. 7 and the cross-sectional view of FIG. 1, the conventional method of manufacturing a semiconductor device using a film carrier tape includes a sedge rocket hole la for transportation and positioning and an opening into which the semiconductor chip 2a is inserted. The device hole 3a is
A film carrier tape 6a is prepared by bonding a metal foil such as copper on an insulating film such as polyimide having a . In addition, a semiconductor chip 2a in which bumps 7a, which are metal protrusions, are provided on the electrode terminals, is separately prepared, and then the leads 4a of the film carrier tape 6a and the bumps 7a of the semiconductor chip 2a are bonded by thermocompression bonding. The case is completed by inner lead bonding (hereinafter referred to as ILB) L using a eutectic method or the like, and by connecting a contactor on the electrical selection pad 5a in a film carrier tape state and conducting electrical selection and bias testing.

ここでリード4aの変形防止用として、絶縁フィルムの
枠であるサスペンダー8aをあらかじめフィルムキャリ
アテープに設けることや信頼性向上及び機械的保護のた
め、第9図の断面図に示すように樹脂9aをボッティン
グして樹脂封止を行なう場合もある。
Here, in order to prevent deformation of the lead 4a, suspenders 8a, which are frames of an insulating film, are provided on the film carrier tape in advance, and in order to improve reliability and mechanical protection, a resin 9a is applied as shown in the cross-sectional view of FIG. In some cases, resin sealing is performed by botting.

上記のようなフィルムキャリア半導体装置を実装する場
合は、リード4aを所望の長さに切断し、ついで第10
図の断面図に示すように、例えばプリント基板11a上
に接着剤10aにより半導体チップ2aを固着後、リー
ド4aをプリント基板上のボンディングパッド12aに
アウターリードボンディング(以下0LB)l、て実装
している。
When mounting the film carrier semiconductor device as described above, the leads 4a are cut to a desired length, and then the 10th lead 4a is cut to a desired length.
As shown in the cross-sectional view of the figure, for example, after fixing the semiconductor chip 2a onto the printed circuit board 11a with an adhesive 10a, the leads 4a are mounted on the bonding pads 12a on the printed circuit board by outer lead bonding (hereinafter referred to as 0LB). There is.

これらのフィルムキャリア半導体装置の製造方法は、ボ
ンディングがリード数と無関係に一度で可能であるため
、ボンディングスピードが速いこと、フィルムキャリア
テープを使用するため作業の自動化が容易であること等
の利点を有している。
These film carrier semiconductor device manufacturing methods have advantages such as high bonding speed because bonding can be done at once regardless of the number of leads, and easy automation of work because film carrier tape is used. have.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のフィルムキャリア半導体装置は、OLB
するためのリードが細く薄いため、リード変形が生じ易
く実装が難しいという欠点がある。
The conventional film carrier semiconductor device described above is an OLB.
Since the leads used for this purpose are thin and thin, there is a drawback that lead deformation easily occurs and mounting is difficult.

特に多数リードの半導体装置は、リードピッチが狭いた
め半田による接合の場合は半田ブリッジによるショート
等があり、実装をさらに困難にしている。
In particular, semiconductor devices with a large number of leads have narrow lead pitches, so if they are joined by solder, short circuits may occur due to solder bridges, making mounting even more difficult.

現状半田による実装は、一般に0.5簡のリードピッチ
が安定して可能となる限界といわれているが、200〜
300ピン以上の多数リード半導体装置に対し、0.5
6のリードピッチを適用した場合は半導体装置の面積が
大きくなり、実装密度を小さくできないことになる。最
近の半導体装置は、その能力増加にともなって多数リー
ド化が著しいが、上述した実装密度の問題があり特にフ
ィルムキャリア半導体装置は、ILBが多数リード化に
対応し易いのに対し、OLB側の制約により実装密度の
点では他のパッケージと同一であり、さらにリードが薄
いため実装がむずかしいという欠点がある。
It is generally said that the current limit for mounting with solder is that a lead pitch of 0.5 strands is stably possible, but
0.5 for multi-lead semiconductor devices with 300 pins or more
If a lead pitch of 6 is applied, the area of the semiconductor device becomes large, and the packaging density cannot be reduced. In recent semiconductor devices, the number of leads has increased significantly as their capacity has increased, but due to the above-mentioned problem of packaging density, film carrier semiconductor devices in particular can easily accommodate the number of leads on the OLB side, whereas ILBs can easily handle the number of leads. Due to restrictions, the mounting density is the same as other packages, and the leads are thin, making mounting difficult.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は少なくとも搬送及び位置決め用のスプロケット
ホールと半導体チップが入るデバイスホールとデバイス
ホール内に一端を突出させた複数のリードとを有するフ
ィルムキャリアテープにおいて、前記リードの他端がス
ルーホールを介してフィルムキャリアテープの反対面に
設けられたアウターリードボンディング用パッドと接続
され、且つこのアウターリードボンディング用パッドが
前記スルーホール列をはさんで向い合わせに交互に配列
された構造を有するフィルムキャリアテープである。
The present invention provides a film carrier tape having at least a sprocket hole for conveyance and positioning, a device hole into which a semiconductor chip is inserted, and a plurality of leads each having one end protruding into the device hole, the other end of the lead being connected through a through hole. A film carrier tape that is connected to outer lead bonding pads provided on the opposite side of the film carrier tape, and has a structure in which the outer lead bonding pads are alternately arranged facing each other across the through hole rows. be.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図及び第2図は本発明の一実施例であυ、それぞれ
フィルムキャリヤ半導体装置の表面と裏面の平面図であ
る。
FIGS. 1 and 2 are plan views of the front and back surfaces of a film carrier semiconductor device, respectively, showing an embodiment of the present invention.

第1図及び第2図に示すように、フィルムキャリアテー
プ6bはスプロケットホールlb、デバイスホール3b
及びリード4bが設けられている。
As shown in FIGS. 1 and 2, the film carrier tape 6b has a sprocket hole lb and a device hole 3b.
and a lead 4b.

半導体チップ2bは電極端子上に設けられたバンプ7b
を介してリード4bとボンディングされてかり、リード
4bはフィルムキャリアテープ上にあるスルーホール1
3bを介して、第2図に示すようにフィルムキャリアテ
ープ裏面のOLBバッド14bに接続されている。
The semiconductor chip 2b has bumps 7b provided on the electrode terminals.
The lead 4b is bonded to the through hole 1 on the film carrier tape.
3b, it is connected to the OLB pad 14b on the back side of the film carrier tape, as shown in FIG.

OLBパッド14bは千鳥状に2列に配列されて釦り、
かつ2列のスルーホール13bをはさんで向かい合わせ
た交互に配列され、2列のうち1列ハチバイスホール3
bとスルーホール13bの間に形成されていて、反対面
のフィルムキャリアテープ表面にあるリードパターンの
通る位置に設けられている。
The OLB pads 14b are arranged in two rows in a staggered manner and have buttons.
They are arranged alternately facing each other with two rows of through holes 13b in between, and one row of the two rows of bevel vice holes 3
b and through hole 13b, and is provided at a position through which the lead pattern on the surface of the film carrier tape on the opposite side passes.

本実施例のフィルムキャリア半導体装置の製造方法を以
下に示す。
The method for manufacturing the film carrier semiconductor device of this example is shown below.

1ず、第1図及び第2図に示したように、スプロケット
ホールlb、デバイスホール3btlしたポリイミド等
からなる絶縁フィルムの表面に、デバイスホール内に一
端を突出させたリード4bが設けられ、かつそのリード
の他端がスルホール13bに接続され、スルホール13
bを介して絶縁フィルムの裏面にOLB用パッド14b
を設けたフィルムキャリアテープ6bを準備する。OL
B用パッド14bは、前記の如くスルホール13bに対
し向かい合わせに交互に配列されている。
1. As shown in FIGS. 1 and 2, a lead 4b with one end protruding into the device hole is provided on the surface of an insulating film made of polyimide or the like with a sprocket hole lb and a device hole 3btl, and The other end of the lead is connected to the through hole 13b, and the through hole 13
OLB pad 14b is attached to the back side of the insulating film through b.
A film carrier tape 6b is prepared. OL
The B pads 14b are alternately arranged facing the through holes 13b as described above.

このような両面にパターンを有するフィルムキャリアテ
ープ6bは、米国3M社よυ市販されているグランドテ
ープ等の応用で容易に製作することができる。例えば、
最初に、ポリイぐドフィルムを選択的エツチングしてス
ルホールを形威し、無電解めっきにてボリイぐドフィル
ム両面にCuを薄く被覆後、次にリードやOLBパッド
等のパターン部のみを選択的にCuの電解めっきにより
パターン形成及びスルホールめっきを行ない、さらにC
uを薄くエツチングすることによりパターン間に残され
た不要な薄いCuを除去する。ついで、スプロケットホ
ールやデバイスホールを選択的にポリイミドフィルムの
エツチングにより形威し、Au+8n等のめっきをパタ
ーン部に施して完成する。
Such a film carrier tape 6b having patterns on both sides can be easily manufactured by applying a ground tape commercially available from 3M Company in the United States. for example,
First, the polyimide film is selectively etched to form through holes, and then both sides of the polyimide film are thinly coated with Cu by electroless plating, and then only the pattern areas such as leads and OLB pads are selectively etched. Pattern formation and through-hole plating are performed by electrolytic plating of Cu, and further C
By etching u thinly, unnecessary thin Cu remaining between patterns is removed. Next, sprocket holes and device holes are selectively etched into the polyimide film, and the patterned portions are plated with Au+8n or the like to complete the process.

次に、従来と同様に電極端子上にバンブ7bを設けた半
導体チップ2bと、フィルムキャリアテープ6bのり−
ド4bとをボンディング後、必要があれば樹脂封止全行
なう。次に電気選別をフィルムキャリアテープ6bの鼻
面にあるOLBバッド14bに接触子をあてて行なう。
Next, the semiconductor chip 2b with the bumps 7b provided on the electrode terminals and the film carrier tape 6b are glued together as in the conventional case.
After bonding with the lead 4b, resin sealing is performed if necessary. Next, electrical selection is performed by applying a contact to the OLB pad 14b on the nose surface of the film carrier tape 6b.

尚、電気選別については、従来と同様にフィルムキャリ
アテープ表面に別Vこ電気選別用バッドを設けて実施し
てもよい。
Incidentally, electrical sorting may be carried out by providing a separate V electrical sorting pad on the surface of the film carrier tape as in the conventional method.

このようにして完成したフィルムキャリア半導体装置の
実装方法は、実装基板上に設けられたボンディングパッ
ドと上記フィルムキャリア半導体装置のフィルム裏面に
設けられたOLB用パッドとの間に異方導電性接着シー
トをはさみ、フィルム表面からツールにより加熱加圧す
ることにより容易に実施することができる。例えば、日
経マイ、i長な1988ゆ1゜カッ1、紹第5ゎ、い、
8立化威工業の異方導電性シートであれば、約150℃
で接着可能であり、ポリイミドフィルムの耐熱性に対し
十分低い温度で実施可能である。
The method for mounting the film carrier semiconductor device completed in this way is to use an anisotropic conductive adhesive sheet between the bonding pad provided on the mounting board and the OLB pad provided on the back surface of the film of the film carrier semiconductor device. This can be easily carried out by sandwiching the film and applying heat and pressure from the surface of the film using a tool. For example, Nikkei My, i-long 1988 Yu1゜Kat1, Introduction 5ゎ, I,
8 Ritsukai Kogyo's anisotropic conductive sheet is approximately 150℃
It can be bonded at a temperature sufficiently low compared to the heat resistance of polyimide film.

上記の異方導電性シートでの接続信頼性を向上させる場
合、又は圧力をかけることによって導通をとる異方導電
性ゴムを使用する場合等は、フィルムキャリア半導体装
置のOLBパッドに金属の突起物を設けると有効である
When improving the connection reliability with the above-mentioned anisotropically conductive sheet, or when using anisotropically conductive rubber that establishes conduction by applying pressure, metal protrusions may be placed on the OLB pad of the film carrier semiconductor device. It is effective to provide

第3図は本実施例の一応用例を示す断面図で、金属の突
起物を設けた例であり、その形成方法は、特開昭54−
2662.特開昭60−194543.USP4,44
2,967等で紹介されているように、ワイヤーボンデ
ィングにおけるAuポール15bのみをOLB用バッド
14b上に形成したものである。
FIG. 3 is a sectional view showing an application example of this embodiment, in which a metal protrusion is provided, and the method of forming it is described in
2662. JP-A-60-194543. USP4,44
2,967, etc., only the Au pole 15b for wire bonding is formed on the OLB pad 14b.

第4図は第3図で示した半導体装置の実装状態を示す断
面図であり、ボンディングパッド12bみ込み、Auボ
ール15bの反対面から押し付ければ導通がとれ容易に
実装出来る。
FIG. 4 is a cross-sectional view showing the mounting state of the semiconductor device shown in FIG. 3. By inserting the bonding pad 12b and pressing from the opposite side of the Au ball 15b, conduction can be established and the device can be easily mounted.

上記のようなフィルムキャリア半導体装置は、OLHの
リードパターンに代ってOLBバッドがフィルムキャリ
アテープ上にあるため、リード変形等の不良は皆無であ
り、また、2列にOLBパッドが配置されているため実
装上必要な十分なOLBパッドピッチを保ちながら、か
つ1列分がリードパターンのエリアを利用しているので
実装面積を増加させることがないという効果を有する。
In the above film carrier semiconductor device, OLB pads are placed on the film carrier tape instead of the OLH lead pattern, so there are no defects such as lead deformation, and OLB pads are arranged in two rows. This has the effect of maintaining a sufficient OLB pad pitch necessary for mounting, and since the lead pattern area for one row is used, the mounting area is not increased.

第5図は本発明の他の応用例の断面図である。FIG. 5 is a sectional view of another application example of the present invention.

前記応用例と同様に、千鳥状に配列されたOLBパッド
14c上に、フォトマスク法により選択的に半田めっき
を約10μm以上施して半田突起17Cを形成する。
Similarly to the application example described above, solder projections 17C are formed by selectively applying solder plating to a thickness of about 10 μm or more on the OLB pads 14c arranged in a staggered manner using a photomask method.

第6図はその実装状態を示す断面図であυ、半田突起1
7cを溶融してプリント基板11C上に接続する。この
応用例では、前記応用例のような導電性ゴム等の材料が
不要となり、又、ピン数に関係なく一括して製造できる
利点がある。
Figure 6 is a cross-sectional view showing the mounting state υ, solder protrusion 1
7c is melted and connected onto the printed circuit board 11C. This application example eliminates the need for materials such as conductive rubber as in the above application example, and has the advantage that it can be manufactured all at once regardless of the number of pins.

〔発明の効果〕〔Effect of the invention〕

以上説明した様に本発明は、OLBのリードの代わりに
OLB用パッドをフィルムキャリアテープの裏面に設け
ることにより、従来問題となっていたリード変形を完全
に防止するとともに、リードとしてのOLB用のパッド
を千鳥状に配列することによりOLBの間隔を広げられ
、ショートを防止することができる。
As explained above, the present invention completely prevents lead deformation, which has been a problem in the past, by providing an OLB pad on the back side of the film carrier tape in place of the OLB lead, and also provides an OLB pad as a lead. By arranging the pads in a staggered manner, the spacing between the OLBs can be increased and short circuits can be prevented.

又、スルーホールをはさんでOLB用パ、ドを向かい合
わせに配置する事により、OLB用バ。
Also, by arranging OLB pads and dots facing each other across the through-hole, OLB pads can be made.

ドを反対面のリードパターン下に設けることができ、実
装密度を小さくすることができる効果がある。
The lead pattern can be provided under the lead pattern on the opposite side, which has the effect of reducing the packaging density.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図はそれぞれ本発明の一実施例の平面図、
第3図はその応用例の断面図、第4図はその実装状態を
示す断面図、第5図は他の応用例を示す断面図、第6図
はその実装状態を示す断面図、第7図は従来のフィルム
キャリア半導体装置の平面図、第8図、第9図はそれぞ
れその断面図、第10図はその実装状態を示す断面図で
ある。 1a、1b・・・・・・スプロケットホール、2a、2
b。 2 C−・・・半導体チップ、3a 、3b・・・・・
・デバイスホール、4a 、4b・・・・・・リード、
5a・・・・−・電気選別用パッド、5a、5b、5c
・・・・・・フィルムキャリアテープ、7a、7b・・
・・・・バンプ、8a・・・・・・サスペンダー 9a
 、9b 、9cm−−−樹脂、lla。 1 l b 、 11 C・−・°・プリント基板、1
2a、12b、12c・パ・・・ボンディングパッド、
13b、13C・・・・・・スルーホール、14b、1
4c・・・・・・OLBパッド、15b・・・・・・A
uボール、16b・・・・・・異方導電性ゴム、17c
・・・・・・半田突起。
FIG. 1 and FIG. 2 are plan views of an embodiment of the present invention, respectively;
FIG. 3 is a sectional view of the application example, FIG. 4 is a sectional view showing its mounting state, FIG. 5 is a sectional view showing another application example, FIG. 6 is a sectional view showing its mounting state, and FIG. The figure is a plan view of a conventional film carrier semiconductor device, FIGS. 8 and 9 are sectional views thereof, and FIG. 10 is a sectional view showing the mounting state thereof. 1a, 1b... Sprocket hole, 2a, 2
b. 2 C-...Semiconductor chip, 3a, 3b...
・Device hole, 4a, 4b...Lead,
5a...Electric screening pad, 5a, 5b, 5c
...Film carrier tape, 7a, 7b...
...Bump, 8a...Suspender 9a
, 9b, 9cm --- resin, lla. 1 l b, 11 C・-・°・Printed circuit board, 1
2a, 12b, 12c・Pa...bonding pad,
13b, 13C...Through hole, 14b, 1
4c...OLB pad, 15b...A
u ball, 16b... Anisotropic conductive rubber, 17c
...Solder protrusion.

Claims (2)

【特許請求の範囲】[Claims] (1)少なくとも搬送及び位置決め用のスプロケットホ
ールと半導体チップが入るデバイスホールとデバイスホ
ール内に一端を突出させた複数のリードとを有するフィ
ルムキャリアテープにおいて、前記リードの他端がスル
ーホールを介してフィルムキャリアテープの反対面に設
けられたアウターリードボンディング用パッドと接続さ
れ、且つこのアウターリードボンディング用パッドが前
記スルーホール列をはさんで向い合わせに交互に配列さ
れた構造を有することを特徴とするフィルムキャリアテ
ープ。
(1) In a film carrier tape having at least a sprocket hole for conveyance and positioning, a device hole into which a semiconductor chip is inserted, and a plurality of leads with one end protruding into the device hole, the other end of the lead is connected through a through hole. It is connected to outer lead bonding pads provided on the opposite side of the film carrier tape, and has a structure in which the outer lead bonding pads are alternately arranged facing each other across the through hole rows. film carrier tape.
(2)アウターリードボンディング用パッド上に実装基
板のボンディングパッドと接続するための金属突起物が
設けられた請求項(1)記載のフィルムキャリアテープ
(2) The film carrier tape according to claim (1), wherein a metal protrusion for connection to a bonding pad of a mounting board is provided on the outer lead bonding pad.
JP2054111A 1990-03-05 1990-03-05 Film carrier tape Expired - Lifetime JP2503711B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2054111A JP2503711B2 (en) 1990-03-05 1990-03-05 Film carrier tape

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2054111A JP2503711B2 (en) 1990-03-05 1990-03-05 Film carrier tape

Publications (2)

Publication Number Publication Date
JPH03255641A true JPH03255641A (en) 1991-11-14
JP2503711B2 JP2503711B2 (en) 1996-06-05

Family

ID=12961485

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2054111A Expired - Lifetime JP2503711B2 (en) 1990-03-05 1990-03-05 Film carrier tape

Country Status (1)

Country Link
JP (1) JP2503711B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5883432A (en) * 1995-11-30 1999-03-16 Ricoh Company, Ltd. Connection structure between electrode pad on semiconductor device and printed pattern on printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5883432A (en) * 1995-11-30 1999-03-16 Ricoh Company, Ltd. Connection structure between electrode pad on semiconductor device and printed pattern on printed circuit board

Also Published As

Publication number Publication date
JP2503711B2 (en) 1996-06-05

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