JPH03252566A - Detecting method for short circuit between power sources - Google Patents
Detecting method for short circuit between power sourcesInfo
- Publication number
- JPH03252566A JPH03252566A JP2051530A JP5153090A JPH03252566A JP H03252566 A JPH03252566 A JP H03252566A JP 2051530 A JP2051530 A JP 2051530A JP 5153090 A JP5153090 A JP 5153090A JP H03252566 A JPH03252566 A JP H03252566A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- short
- circuit
- check
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 11
- 238000012360 testing method Methods 0.000 claims abstract description 29
- 238000001514 detection method Methods 0.000 claims abstract description 16
- 238000010586 diagram Methods 0.000 description 7
- 238000002360 preparation method Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概 要〕
少なくとも二系統以上の電源回路を有して成るプリント
板等の被試験体に適用される電源間ショートの検出方法
に関し、
電源回路のショート検出作業の効率化を目的とし、
被試験体上に設けられた各電源回路の電源端子とグラン
ド端子間にショート検出用の電圧計を接続すると共に、
これら各電源回路に対して順次テスト電圧を印加する構
成を特徴とする。[Detailed Description of the Invention] [Summary] Regarding a method for detecting a short circuit between power supplies applied to a test object such as a printed circuit board having at least two or more power supply circuits, the present invention relates to the efficiency of short detection work of power supply circuits. For the purpose of
The present invention is characterized by a configuration in which a test voltage is sequentially applied to each of these power supply circuits.
本発明は、少なくとも二系統以上の電源回路を有して成
るプリント板等の被試験体に適用される電源間ショート
の検出方法に関する。The present invention relates to a method for detecting short-circuits between power supplies, which is applied to a test object such as a printed board having at least two or more power supply circuits.
第３図は従来の電源間ショート検出装置（以下試験装置
と呼ぶ）の−構成例を示す回路図である。FIG. 3 is a circuit diagram showing an example of the configuration of a conventional short-circuit detection device between power supplies (hereinafter referred to as a test device).
３系統の電源回路り、 Ｖｚ、 Ｖ３を備えた被試験体
２０のショートチエツクを行うこの試験装置５０は、前
記被試験体２０の各電源回路Ｖ＋、 Ｖｚ、 Ｖ：Ｉの
電源端子Ｖとグランド端子Ｇにそれぞれ接続された切換
スイッチ３１〜ＳＩ！と、試験電圧供給用の電源装置３
０と、電圧計３１とを装備している。This test apparatus 50 performs a short check on a device under test 20 equipped with three power supply circuits, Vz and V3. Changeover switches 31 to SI! are connected to terminal G, respectively. and a power supply device 3 for supplying test voltage.
0 and a voltmeter 31.
この試験装置５０を用いてショートチエツクを行う際の
手順は以下のとおりである。The procedure for performing a short check using this testing device 50 is as follows.
（１）〔準備工程〕
先ず被試験体２０がわの電源回路り、 Ｖｚ、 Ｖ３の
各電源端子■とグランド端子Ｇに、試験装置５０がわの
切換スイッチＳ、〜５１２を第３図に示す如く接続する
。(1) [Preparation process] First, connect the changeover switches S, ~512, located next to the test device 50 to the power supply terminals Vz, V3, and the ground terminal G of the power circuit on the side of the test object 20, as shown in Fig. 3. Connect as shown.
（２）〔各電源回路の内部ショートチエツク３次に各電
源回路Ｖ、、 Ｖ、、 Ｖ、の内部ショートチエツクを
行う。なお以下の記述においては、ｖｌの電源端子をＶ
、Ｖ、
Ｖ、のグランド端子をｖｌＧ、
ｖ２の電源端子をν２■、
ｖ２のグランド端子をｖｚＧ、
■、の電源端子をｖ、■、
ｖ３のグランド端子をｖ３Ｇ、と記す。(2) [Internal short check of each power supply circuit 3 Next, perform an internal short check of each power supply circuit V, , V, , V. In the following description, the power supply terminal of vl is referred to as V
, V, the ground terminal of V is written as vlG, the power supply terminal of v2 is written as ν2■, the ground terminal of v2 is written as vzG, the power supply terminal of (2) is written as v, ■, and the ground terminal of v3 is written as v3G.
■、ｖ１の内部ショートチエツク
このシ１■対シ、Ｇ間のショートチエツクは、例えば切
換スイッチＳ、と３４のみをＯＮにして行う。この時、
電圧計３１が電源装置３０からの供給電圧値を指示すれ
ばＯＫである。(2) Internal short check of V1 This short check between S1 and S and G is performed by turning on only the changeover switches S and 34, for example. At this time,
It is OK if the voltmeter 31 indicates the supply voltage value from the power supply device 30.
■、 Ｖｚの内部ショートチエツク
このショートチエツクは、例えば切換スイッチＳ、とＳ
、のみをＯＮにして行う。この時、電圧計３１が供給電
圧値を指示すればＯＫである。■ Internal short check of Vz This short check is performed, for example, by switching
, only with ON. At this time, it is OK if the voltmeter 31 indicates the supply voltage value.
■、ｖ３の内部ショートチエツク
このチエツクは、例えば切換スイッチＳ、と３１□のみ
をＯＮにして行う。この時、電圧計３１が供給電圧値を
指示すればＯＫである。(2) Internal short check of v3 This check is performed by turning ON only the selector switch S and 31□, for example. At this time, it is OK if the voltmeter 31 indicates the supply voltage value.
（２）〔各電源回路間のショートチエツク３次は各電源
回路Ｖ、、 Ｖ、、 Ｖ、相互間のショートチエツクを
行う。(2) [Short check between each power supply circuit In the third stage, a short check is performed between each power supply circuit V, V, V, and each other.
■、ｖ、対ｖ２間のショートチエツク
このチエツクは、例えばＳ２とＳ、のみをＯＮにして行
う。この時、電圧計３１が供給電圧値を指示すればＯＫ
である。(2) Short check between v and v2 This check is performed by turning on only S2 and S, for example. At this time, if the voltmeter 31 indicates the supply voltage value, it is OK.
It is.
■、■、対ｖ３間のショートチエツク
このチエツクは、例えばＳｌとＳＩＯのみをＯＮにして
行う。この時、電圧計３１が供給電圧値を指示すればＯ
Ｋである。(2), (2), Short check between v3 and V3. This check is performed, for example, with only Sl and SIO turned on. At this time, if the voltmeter 31 indicates the supply voltage value, O
It is K.
■、 Ｖｚ対Ｖ１間のショートチエツクこのチエツクは
、例えばＳ５と５１０のみをＯＮにして行う。この時、
電圧計３１が供給電圧値を指示すればＯＫである。(2) Short check between Vz and V1 This check is performed by turning on only S5 and 510, for example. At this time,
It is OK if the voltmeter 31 indicates the supply voltage value.
この従来のショートチエツク方式は、各電源回路Ｖ、、
ＶアおよびＶ、の電源端子■とグランド端子Ｇ対応に
配置された切換スイッチ８１〜ＳＩｚをその都度操作す
る必要があることから作業が煩雑化し、屡々作業ミスが
発生する。また、この試験装置５０は、被試験体２０が
わの各電源回路系の設置数対応に切換スイッチを装備す
る必要があるので試験装置の整備費用が嵩むことになる
。In this conventional short check method, each power supply circuit V, .
Since it is necessary to operate the changeover switches 81 to SIz arranged corresponding to the power supply terminals VA and V and the ground terminal G each time, the work becomes complicated and work errors often occur. Furthermore, the test apparatus 50 needs to be equipped with changeover switches corresponding to the number of power supply circuit systems installed on the test object 20, which increases the maintenance cost of the test apparatus.
本発明はこれらの問題を解決するためになされたもので
、切換スイッチを使用せずにショートチエツクを行い得
る構成にその特徴がある。The present invention has been made to solve these problems, and its feature lies in the structure that allows short checks to be made without using a changeover switch.
本発明による電源間ショートの検出方法（以下ショート
検出方法と呼ぶ）は、第１図に示すように、被試験体２
０上に設けられた各電源回路Ｖｌｌ ＶＺ。As shown in FIG.
Each power supply circuit Vll VZ provided on 0.
ｖ３の各電源端子Ｖとグランド端子Ｇ間にショート検出
用の電圧計ＶＩＬ 、 ＶＭｚ 、 ＶＨ２をそれぞれ
接続すると共に、これら各独立電源回路Ｖ、、 Ｖ、、
Ｖ３に対して順次テスト電圧発生部１０を接続する構
成になっている。Voltmeters VIL, VMz, and VH2 for short-circuit detection are connected between each power supply terminal V of v3 and the ground terminal G, and each of these independent power supply circuits V, V, ,
The test voltage generating section 10 is sequentially connected to V3.
このショート検出方法は、各電源回路Ｌ＋ Ｖｚ。 This short circuit detection method applies to each power supply circuit L+Vz.
ｖ３の電源端子Ｖとグランド端子Ｇ間にショート検出用
の電圧計ＶＭ、 、νＰｈ 、 ＶＨ２をそれぞれ接続
すると共に、これら各電源回路Ｖ、、 Ｖ、、 Ｖ、に
対して順次テスト電圧発生部１０を接続するだけでショ
ートを検出し得る構成になっていることから、ショート
チエツク作業が従来の切換スイッチ方式に比して著しく
効率化される。Voltmeters VM, , νPh, and VH2 for short-circuit detection are connected between the power supply terminal V and the ground terminal G of V3, respectively, and a test voltage generation unit 10 is sequentially applied to each of these power supply circuits V, V, V, respectively. Since the structure is such that a short circuit can be detected simply by connecting the switch, the short check operation is significantly more efficient than the conventional changeover switch method.
以下実施例図に基づいて本発明の詳細な説明する。 EMBODIMENT OF THE INVENTION The present invention will be described in detail below based on embodiment figures.
第１図は本発明の一実施例を示す模式的回路図、第２図
（ａ）と（ｂ）はショートの検出事例を示す模式的回路
図であるが、前記第３図と同一部分には同一符号を付し
ている。FIG. 1 is a schematic circuit diagram showing one embodiment of the present invention, and FIGS. 2(a) and (b) are schematic circuit diagrams showing an example of short-circuit detection. are given the same reference numerals.
第１図に示すように、このショート検出方法は、被試験
体２０上に設けられた各電源回路Ｖ、、 Ｖ、、 Ｖ。As shown in FIG. 1, this short circuit detection method applies to each power supply circuit V, V, V provided on the object under test 20.
の各電源端子Ｖとグランド端子０間に、ショート検出用
の電圧計ＶＭ＋ 、 Ｖ）ｂ 、 ＶＭ：ｌをそれぞれ
接続すると共に、これら各電源回路ｖ、、 ｖｚ、 Ｖ
３に対して順次テスト電圧発生部１０を接続して行くこ
とによって各電源回路内のショートチエツクと各電源回
路間のショートチエツクを行う構成になっている。Voltmeters VM+, V)b, VM:l for short circuit detection are connected between each power supply terminal V and ground terminal 0 of , and each of these power supply circuits v,, vz, V
By sequentially connecting the test voltage generating section 10 to the power supply circuits 3 and 3, short checks are performed within each power supply circuit and between each power supply circuit.
以下本発明方法によるショートチエツクの実施手順とシ
ョートの検出事例について述べる。The short check implementation procedure and short circuit detection examples using the method of the present invention will be described below.
（１）〔準備工程〕 被試験体２０がわに設けられた電源回路り、 Ｖｚ。(1) [Preparation process] A power supply circuit provided beside the test object 20, Vz.
■、の各電源端子■と各グランド端子０間に電圧計Ｖｌ
’Ｌ 、 ＶＭｚ 、 ＶＭ３をそれぞれ第１図に示す
如く接続する。■ Voltmeter Vl between each power terminal ■ and each ground terminal 0 of
'L, VMz, and VM3 are connected as shown in FIG.
（２）〔電源回路Ｖ、の内部ショートチエツクと、当該
電源回路ｖ１と他の電源回路Ｖ、、 Ｖ、間のショート
チエツク〕
テスト電圧発生部１０をＶ、Ｖ （！：Ｖ、Ｇ間に第１
図に示す如く接続する。そしてこれらシ、ＶとＶ、Ｇ間
に約０．２ボルト程度の電流を流す。この時、 ＶＭ、
の針が第２図（ａ）に示す如く振れればν１の内部ショ
ートは無いことになる。しかしながら、この時、もしも
ｖ２ｖとｖ２Ｇ間に接続されているＶＭ、の針が振れた
とすれば、■、とｖ２間が例えば点線の矢印で示す〔第
２図Ｔｂ）参照〕ようにショートしていることになる。(2) [Internal short check of the power supply circuit V, and short check between the power supply circuit v1 and other power supply circuits V, V] Connect the test voltage generating section 10 between V, V (!: V, G) 1st
Connect as shown. A current of approximately 0.2 volts is then passed between these V and V and G. At this time, VM,
If the needle swings as shown in FIG. 2(a), there is no internal short circuit in ν1. However, at this time, if the needle of the VM connected between v2v and v2G swings, there will be a short circuit between ■ and v2 as shown by the dotted arrow (see Figure 2 Tb). There will be.
（３）〔電源回路ｖ２の内部ショートチエツクと、当該
ｖ２とＶ１間のショートチエツク〕
この時はｖ２ｖとＶｚＧ間にテスト電圧発生部１０を第
１図中９点線で示す如く接続してこれに約０．２ボルト
程度の電流を流す。この時、 ＶＭｚＯ針が振れればｖ
２の内部ショートが無いのは前記ｖ１の場合と同様であ
る。また、この時、 ＶＭ３の針が振れなければ■２と
Ｖ１間にはショートが無いことになる。(3) [Internal short check of power supply circuit v2 and short check between v2 and V1] At this time, connect the test voltage generator 10 between v2v and VzG as shown by the 9 dotted line in Figure 1. A current of about 0.2 volts is passed. At this time, if the VMzO needle swings, v
Similar to the case of v1, there is no internal short circuit in v2. Also, at this time, if the needle of VM3 does not swing, there is no short circuit between ■2 and V1.
以上の説明によって明らかなように、このショート検出
方法は、電源回路間がショートしている場合、当該電源
回路の一方に電圧を印加してやれば、他方の電源回路に
電圧が見えてくるという原理を応用したもので、試験に
際して回路切換用のスイッチを操作する必要が無いので
作業が著しく簡素化される。As is clear from the above explanation, this short circuit detection method is based on the principle that if there is a short circuit between power supply circuits, if voltage is applied to one of the power supply circuits, the voltage will be visible in the other power supply circuit. This greatly simplifies the work as there is no need to operate a circuit changeover switch during testing.
なお、上記実施例は電源回路が３系統になっているが、
本発明方式は電源回路の系統数とは無関係に適用が可能
である。また、本発明によるショート検出方法は、単に
電源回路のみならず、系統の異なる回路間のショートチ
エ７りに適用しても好結果が得られる。Although the above embodiment has three power supply circuits,
The method of the present invention can be applied regardless of the number of power supply circuits. Furthermore, the short circuit detection method according to the present invention can be applied not only to power supply circuits but also to short circuits between circuits of different systems with good results.
Ｃ発明の効果〕
以上の説明から明らかなように、本発明によるショート
検出方法は、試験に際して回路切換用のスイッチを操作
する必要が無いことから、ショートチエツク作業が著し
く効率化される。C. Effects of the Invention] As is clear from the above description, the short-circuit detection method according to the present invention does not require operating a circuit changeover switch during testing, and therefore short-checking work is significantly made more efficient.
第１図は本発明の一実施例を示す模式的回路図、第２図
（ａ）と（ｂ）はショートの検出事例を示す模式第３図
は従来の試験装置の一構成例を示す模式的回路図である
。
図において、ｌＯはテスト電圧発生部、２０は被試験体
、
３０は電源装置、
３１は電圧計、
ｖｌとｖ２とｖ３は電源回路、
ＶＭＩ とＶＭｚ とＶＭ３は電圧計、■は電源端子、
Ｇはグランド端子、
Ｓ ｌ ”” Ｓ ｌ ２は切換スイッチ、（Ｑ）
（ｂ）
第３
図Fig. 1 is a schematic circuit diagram showing an embodiment of the present invention, Fig. 2 (a) and (b) are schematic diagrams showing an example of detection of a short circuit, and Fig. 3 is a schematic diagram showing an example of the configuration of a conventional test device. This is a typical circuit diagram. In the figure, lO is the test voltage generator, 20 is the object under test, 30 is the power supply device, 31 is the voltmeter, vl, v2, and v3 are the power supply circuits, VMI, VMz, and VM3 are the voltmeters, ■ is the power supply terminal, G is the ground terminal, S l ”” S l 2 is the changeover switch, (Q) (b) Fig. 3
Claims (1)
ト板等の被試験体（２０）に適用される電源回路間のシ
ョート検出方法であって、 前記被試験体（２０）上に設けられた各電源回路（Ｖ＿
１，Ｖ＿２，Ｖ＿３）の電源端子（Ｖ）とグランド端子
（Ｇ）間にショート検出用の電圧計（ＶＭ＿１，ＶＭ＿
２，ＶＭ＿３）を接続すると共に、これら各電源回路（
Ｖ＿１，Ｖ＿２，Ｖ＿３）に対して順次テスト電圧を印
加するようにしたことを特徴とする電源間ショートの検
出方法。[Scope of Claims] A short-circuit detection method between power supply circuits applied to a test object (20) such as a printed circuit board having at least two or more power supply circuits, the method comprising: Each power supply circuit (V_
Connect a voltmeter (VM_1, VM_3) between the power supply terminal (V) and ground terminal (G) of
2, VM_3), and each of these power supply circuits (
1. A method for detecting a short circuit between power supplies, characterized in that a test voltage is sequentially applied to V_1, V_2, V_3).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2051530A JPH03252566A (en) | 1990-03-01 | 1990-03-01 | Detecting method for short circuit between power sources |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2051530A JPH03252566A (en) | 1990-03-01 | 1990-03-01 | Detecting method for short circuit between power sources |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03252566A true JPH03252566A (en) | 1991-11-11 |
Family
ID=12889577
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2051530A Pending JPH03252566A (en) | 1990-03-01 | 1990-03-01 | Detecting method for short circuit between power sources |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03252566A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103529354A (en) * | 2013-10-31 | 2014-01-22 | 京东方科技集团股份有限公司 | Circuit testing method and circuit testing system |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01308975A (en) * | 1988-03-19 | 1989-12-13 | Fujitsu Ltd | Printed circuit board tester |
-
1990
- 1990-03-01 JP JP2051530A patent/JPH03252566A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01308975A (en) * | 1988-03-19 | 1989-12-13 | Fujitsu Ltd | Printed circuit board tester |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103529354A (en) * | 2013-10-31 | 2014-01-22 | 京东方科技集团股份有限公司 | Circuit testing method and circuit testing system |
| CN103529354B (en) * | 2013-10-31 | 2016-10-05 | 京东方科技集团股份有限公司 | A kind of circuit testing method and circuit test system |
| US9746509B2 (en) | 2013-10-31 | 2017-08-29 | Boe Technology Group Co., Ltd. | Circuit testing method and circuit testing system |
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