JPH03250665A - Semiconductor device - Google Patents

Abstract

PURPOSE:To fix substrate potential so as to remove minority carriers generated without imposing a large limitation to wiring by coupling semiconductor layers on an insulating film and taking substrate potentials of a plurality of transistors through a single contact. CONSTITUTION:In an MIS semiconductor device formed on a semiconductor layer on an insulating substrate, an N<+> diffusion region 1 and a P<+> diffusion region 3 are isolated from each other by a gate electrode 2 and a plurality of gate electrodes 2 are coupled by the P<+> diffusion region 3. The P<+> diffusion region 3 which has been heavily doped in P type is low in a resistance value and can be used in internal wiring, so that substrate potential of a plurality of transistors can be taken from at a contact 6 between one substrate and aluminum. Thus it is not necessary to have contacts for fixing the substrate potential for the respective transistors thereby relaxing the limitation in wiring and enabling a semiconductor device stable in transistor characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to stable operation of a Mis-type semiconductor device formed in a semiconductor layer on an insulating substrate.

[Conventional technology]

The basic structure of a Mis-type transistor formed in a semiconductor layer on an insulating substrate is shown in FIG. In the figure, 1 is an N'' diffusion region, 2 is a gate electrode of an N-type transistor, 3 is a P'' diffusion region, 4 is a contact portion between the N+ diffusion region 1 and aluminum, 5 is a contact portion between the gate electrode 2 and aluminum, 6 is a contact portion between the substrate and aluminum.

A semiconductor crystal layer is provided on an insulating film, a gate insulating film and a gate electrode 2 are formed on the semiconductor crystal, and a source/drain diffusion region 1 is formed in self-alignment with the gate electrode.

Next, the operation will be explained.

In a MIS type transistor formed in a semiconductor layer on an insulating film, a high electric field is generated near the drain due to the potential difference between the source and drain, similar to a MIS type transistor formed in a bulk single crystal semiconductor layer. Carriers accelerated by this high electric field generate a large number of electron-hole pairs through interaction with the semiconductor crystal. These generated electrons flow into the drain N diffusion layer and become part of the drain current, but the holes accumulate in the channel region and increase the channel potential, causing undesirable characteristics such as kink effect in the drain current characteristics. bring about The kink effect is, for example, IEE Electron Device Letters 1.
988, Vol. 9, No. 2, pp. 97-99 (IEEE E
lectron Device LettersV.

1.9. No, 2. pp, 97-99. (1988
)). For this reason, in MIS type transistors formed in a semiconductor layer on an insulating film, attempts have been made to fix the substrate potential directly under the channel and establish a substrate contact in order to remove the generated minority carriers.

[Problems to be Solved by the Invention] In a conventional MIS transistor formed in a semiconductor layer on an insulating film, in order to remove minority carriers generated by fixing the substrate potential directly under the channel, the method shown in FIG. Thus, a contact portion 6 with the substrate is required for each transistor, which poses problems such as severe restrictions on wiring.

This invention was made in order to solve the above-mentioned problems.In a semiconductor device formed in a semiconductor layer on an insulating film, the small number of defects that occur by fixing the substrate potential can be avoided without imposing major restrictions on wiring. An object of the present invention is to provide a semiconductor device that can remove carriers.

[Means to solve the problem]

In the semiconductor device according to the present invention, semiconductor layers on an insulating film are connected, and the substrate potential of a plurality of transistors is taken at one contact point.

[Effect]

In the semiconductor device of the present invention, since the substrate potentials of a plurality of transistors can be obtained through one contact, a semiconductor device with fewer wiring restrictions can be obtained.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing the configuration of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a diagram showing the cross-sectional structure of FIG. The N diffusion region constituting the drain region is formed, for example, by doping a silicon single crystal layer with N type impurities at a high concentration. 2 is N
A gate electrode of a type transistor is connected to a low concentration P type silicon single crystal film 8 serving as a channel region via a gate insulating film 9 . 3 is P formed on the insulating substrate 7.
4 is the contact portion between the N diffusion region 1 and aluminum, 5 is the contact portion between the gate electrode 2 and aluminum, 6 is the contact portion between the insulating substrate 7 and aluminum, 7 is the insulation under the semiconductor layer 8 is a silicon single crystal film, and 9 is a gate insulating film.

In this embodiment, the N'' diffusion region 1 and the P'' diffusion region 3 are separated by the gate electrode 2, and the gate electrodes 2 of a plurality of transistors are connected by the P'' diffusion region 3. This P
The P diffusion region 3, which is heavily doped in the mold, has a low resistance value;
Since it can be used for internal wiring, the substrate potential of a plurality of transistors can be taken at the contact portion 6 between one substrate and aluminum.

Therefore, in this embodiment, there is no need to make a contact for fixing the substrate potential for each individual transistor as in the prior art, there are no major restrictions on wiring, and a semiconductor device with stable transistor characteristics can be obtained.

In the above embodiment, an N-type MISI- transistor is shown, but a P-type MI S +- transistor in which the N-type impurity and the P-type impurity are exchanged may be used.

〔Effect of the invention〕

As described above, according to the present invention, since the substrate potential of a plurality of transistors formed in a semiconductor layer on an insulating substrate can be taken at one contact point, there is no need to impose major restrictions on wiring. This has the effect of providing a semiconductor device with stable transistor characteristics.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a diagram showing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a diagram showing a cross section of the semiconductor device in FIG. FIG. 1 is a diagram showing a semiconductor device. 1 is the N-diffusion region, 2 is the gate electrode of the N-type transistor, 3 is the P-diffusion region, 4 is the contact between the N-diffusion region and aluminum, 5 is the contact between the gate electrode and aluminum, and 6 is the contact between the substrate and aluminum. , 7 is an insulator under the semiconductor layer, 8
9 is a silicon single crystal film, and 9 is a gate insulating film. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] (1) An MIS type semiconductor device formed in a semiconductor layer on an insulating substrate, in which the substrate potentials of a plurality of the semiconductor devices are connected by a highly doped semiconductor layer, and the plurality of semiconductor devices are connected by a highly doped semiconductor layer. A semiconductor device characterized in that the substrate potential of the device is taken from the semiconductor layer at one contact point.