JPH0324698B2 - - Google Patents

Info

Publication number
JPH0324698B2
JPH0324698B2 JP15626881A JP15626881A JPH0324698B2 JP H0324698 B2 JPH0324698 B2 JP H0324698B2 JP 15626881 A JP15626881 A JP 15626881A JP 15626881 A JP15626881 A JP 15626881A JP H0324698 B2 JPH0324698 B2 JP H0324698B2
Authority
JP
Japan
Prior art keywords
memory
cpu
time
shared memory
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15626881A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5858667A (ja
Inventor
Tetsuo Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15626881A priority Critical patent/JPS5858667A/ja
Publication of JPS5858667A publication Critical patent/JPS5858667A/ja
Publication of JPH0324698B2 publication Critical patent/JPH0324698B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
JP15626881A 1981-10-02 1981-10-02 メモリ共有方式 Granted JPS5858667A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15626881A JPS5858667A (ja) 1981-10-02 1981-10-02 メモリ共有方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15626881A JPS5858667A (ja) 1981-10-02 1981-10-02 メモリ共有方式

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP5035886A Division JPS6237761A (ja) 1986-03-10 1986-03-10 メモリ共有方式

Publications (2)

Publication Number Publication Date
JPS5858667A JPS5858667A (ja) 1983-04-07
JPH0324698B2 true JPH0324698B2 (ko) 1991-04-03

Family

ID=15624092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15626881A Granted JPS5858667A (ja) 1981-10-02 1981-10-02 メモリ共有方式

Country Status (1)

Country Link
JP (1) JPS5858667A (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4595951A (en) * 1983-11-29 1986-06-17 Rca Corporation Teletext decoder using a common memory
JPH02115962A (ja) * 1988-10-26 1990-04-27 K S D:Kk コンピュータ装置とその周辺装置との接続方式
FR2769727B1 (fr) 1997-10-09 2000-01-28 St Microelectronics Sa Procede et systeme de controle d'acces partages a une memoire vive

Also Published As

Publication number Publication date
JPS5858667A (ja) 1983-04-07

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