JPH0324698B2 - - Google Patents
Info
- Publication number
- JPH0324698B2 JPH0324698B2 JP15626881A JP15626881A JPH0324698B2 JP H0324698 B2 JPH0324698 B2 JP H0324698B2 JP 15626881 A JP15626881 A JP 15626881A JP 15626881 A JP15626881 A JP 15626881A JP H0324698 B2 JPH0324698 B2 JP H0324698B2
- Authority
- JP
- Japan
- Prior art keywords
- memory
- cpu
- time
- shared memory
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 claims description 11
- 230000000737 periodic effect Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 11
- 230000001360 synchronised effect Effects 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 230000001629 suppression Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000004260 weight control Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Multi Processors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15626881A JPS5858667A (ja) | 1981-10-02 | 1981-10-02 | メモリ共有方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15626881A JPS5858667A (ja) | 1981-10-02 | 1981-10-02 | メモリ共有方式 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5035886A Division JPS6237761A (ja) | 1986-03-10 | 1986-03-10 | メモリ共有方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5858667A JPS5858667A (ja) | 1983-04-07 |
JPH0324698B2 true JPH0324698B2 (ko) | 1991-04-03 |
Family
ID=15624092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15626881A Granted JPS5858667A (ja) | 1981-10-02 | 1981-10-02 | メモリ共有方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5858667A (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4595951A (en) * | 1983-11-29 | 1986-06-17 | Rca Corporation | Teletext decoder using a common memory |
JPH02115962A (ja) * | 1988-10-26 | 1990-04-27 | K S D:Kk | コンピュータ装置とその周辺装置との接続方式 |
FR2769727B1 (fr) | 1997-10-09 | 2000-01-28 | St Microelectronics Sa | Procede et systeme de controle d'acces partages a une memoire vive |
-
1981
- 1981-10-02 JP JP15626881A patent/JPS5858667A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5858667A (ja) | 1983-04-07 |
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