JPH03245576A - Manufacture of pressure sensor - Google Patents
Manufacture of pressure sensorInfo
- Publication number
- JPH03245576A JPH03245576A JP4305790A JP4305790A JPH03245576A JP H03245576 A JPH03245576 A JP H03245576A JP 4305790 A JP4305790 A JP 4305790A JP 4305790 A JP4305790 A JP 4305790A JP H03245576 A JPH03245576 A JP H03245576A
- Authority
- JP
- Japan
- Prior art keywords
- recess
- plasma etching
- gauge
- grinding
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000000034 method Methods 0.000 claims abstract description 21
- 238000001020 plasma etching Methods 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 239000004065 semiconductor Substances 0.000 claims abstract description 9
- 239000012535 impurity Substances 0.000 claims abstract description 5
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 abstract description 9
- 230000001681 protective effect Effects 0.000 abstract description 3
- 238000005530 etching Methods 0.000 description 12
- 235000012431 wafers Nutrition 0.000 description 9
- 238000003754 machining Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 230000003746 surface roughness Effects 0.000 description 4
- 238000000866 electrolytic etching Methods 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005247 gettering Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 239000005297 pyrex Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Measuring Fluid Pressure (AREA)
- Pressure Sensors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体片に形成されたダイヤフラム部にゲー
ジ抵抗を有し、ダイヤフラム部の変形によって生ずるゲ
ージ抵抗の変化によって生ずる圧力を検出する圧力セン
サの製造方法に関する。Detailed Description of the Invention [Industrial Field of Application] The present invention provides a pressure sensor that has a gauge resistance in a diaphragm portion formed in a semiconductor piece, and detects pressure generated by a change in gauge resistance caused by deformation of the diaphragm portion. The present invention relates to a method of manufacturing a sensor.
ダイヤフラム部の変形を利用した圧力センサにおいて、
数%以下の高い圧力検出精度を得るためには、ダイヤフ
ラムの厚さは数十−にしなければならない、圧力センサ
の最近の動向としては、ダイヤフラムを形成する半導体
基板に、主要素のゲージのほかに、増幅回路、補償回路
などをICプロセスにより集積した小形、高性能センサ
へと移りつつある。ICプロセスにおいては、膜形成。In pressure sensors that utilize deformation of the diaphragm,
In order to obtain high pressure detection accuracy of several percent or less, the thickness of the diaphragm must be several tens of tens of cents. Recent trends in pressure sensors include the use of a semiconductor substrate that forms the diaphragm, in addition to the main element gauge. In recent years, there has been a shift toward compact, high-performance sensors that integrate amplifier circuits, compensation circuits, etc. using the IC process. In the IC process, film formation.
膜剥離、エツチングあるいはイオン注入等の工程で、高
熱あるいは機械的ひずみを多く受けるため、ダイヤフラ
ム形成のための凹加工は、それらの工程を終えたのち、
半導体基体の反対側から行うのが一般的である。Because it is exposed to a lot of heat and mechanical strain during processes such as film peeling, etching, and ion implantation, the concave machining for forming the diaphragm is done after these processes are completed.
This is generally done from the opposite side of the semiconductor substrate.
第2図1m1〜+61は、従来の圧力センサ製造工程を
示し、−面側にドーパントの濃度、抵抗値の異なるエッ
チストップ層11を有するシリコン板lの上に埋込層2
を介してエピタキシ中ル層3を積層し、この層に異なる
導電形のゲージ抵抗4および増幅回路、補償回路素子5
1.52を集積し、表面を配線保護膜6で覆う (第2
図+al)、次いで、反対面に酸化膜、窒化膜、金、ピ
ッチあるいはレジスト等の単体あるいは複合層からなる
マスク71.ゲージ面側に同様の材料あるいはワックス
によりはりつけられたガラス等よりなるゲージ面保護用
のマスり72を形成する (第1図(bl)、そしてぶ
つ酸1硝酸または強アルカリ等を用いたウェットエツチ
ング法で層11までのストップエツチングを行い、凹部
8を形成する (第1図(C1)、このあと、マスク7
1.72を除去し、シリコン板lの面にAu、 Cr、
TI等よりなるメタライズ層9を被着し (第1図(
d))、同様にメタライズ層9を被着した台座10の上
にはんだ12を用いて接合する (第1図1el)、凹
部8形成のためのストップエツチングには、シリコンを
陽極とし、ぶつ酸溶液を用いて陽極酸化により電解エツ
チングを行う方法もある0通常、このような凹部8は1
枚のSIウェハに複数形成し、分割して個々のセンサチ
ップを得る。FIG. 2 1m1 to +61 shows a conventional pressure sensor manufacturing process, in which a buried layer 2 is placed on a silicon plate 1 having an etch stop layer 11 with different dopant concentrations and resistance values on the negative side.
A layer 3 of epitaxial medium is laminated through the layer 3, and a gauge resistor 4 of different conductivity type, an amplifier circuit, and a compensation circuit element 5 are formed on this layer.
1.52 is integrated and the surface is covered with a wiring protection film 6 (second
Then, on the opposite side, a mask 71 consisting of a single or composite layer of oxide film, nitride film, gold, pitch, resist, etc. A mask 72 for protecting the gauge surface is formed on the gauge surface side by using a similar material or glass glued with wax (Fig. 1 (bl)), and wet etching using butic acid, nitric acid, strong alkali, etc. Stop etching is performed up to the layer 11 by the method to form the recess 8 (FIG. 1 (C1), after this, the mask 7
1.72 was removed and Au, Cr,
A metallized layer 9 made of TI etc. is deposited (see Fig. 1).
d)) Similarly, the metallized layer 9 is bonded to the base 10 using the solder 12 (FIG. 1 1el). For the stop etching to form the recess 8, silicon is used as an anode and There is also a method of performing electrolytic etching by anodic oxidation using a solution.Normally, such a recess 8 is 1
A plurality of sensor chips are formed on a single SI wafer and divided to obtain individual sensor chips.
第2図に示したようにダイヤフラムを形成するための凹
部8を加工することは、通常のウェーハプロセスにおけ
るマスクバターニング等のエツチングと異なり、Slウ
ェーハ厚さに対し90%近い数百μの深いエツチングで
あるため、バターニングマスク71の材料の選定および
形成の方法が複雑であるばかりでなく、すでに形成され
たゲージ4の表面の保護にもそれ以上配慮しなければな
らない。As shown in FIG. 2, processing the recess 8 for forming the diaphragm is different from etching such as mask buttering in a normal wafer process. Since etching is used, not only is the material selection and formation method for the patterning mask 71 complicated, but additional consideration must be given to protecting the surface of the gauge 4 that has already been formed.
そのほか、エツチング停止層11の形成も事前に必要で
あり、工程の管理が容5でない、ストップエツチングに
陽極酸化による電解エツチング法を適用する場合には、
より工程が複雑になる。In addition, it is necessary to form the etching stop layer 11 in advance, and when applying electrolytic etching using anodic oxidation to stop etching, the process control is difficult.
The process becomes more complicated.
さらに、ウェットエツチング法、電解エツチング法の基
本的な問題として、形成する凹部が深くなるに従い、凹
部内の発生気体の影響を受けやすいことと、凹部不均一
という問題も発生するため、凹部開口寸法の限界値が大
きく、台座との接合面が小さくなるという問題もある。Furthermore, a basic problem with wet etching and electrolytic etching is that as the recesses formed become deeper, they are more susceptible to the effects of gas generated within the recesses, and unevenness of the recesses also occurs. There is also the problem that the limit value of is large and the joint surface with the pedestal becomes small.
本発明の目的は、上述の問題を解決し、半導体基体の一
面から任意の開口寸法をもつ均一な深さの四部を確実に
形成してゲージ抵抗を備えた所期の厚さのダイヤフラム
部を残す圧力センサの製造方法を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, and to reliably form four parts of uniform depth with arbitrary opening dimensions from one surface of a semiconductor substrate, thereby producing a diaphragm part of a desired thickness and having a gauge resistance. It is an object of the present invention to provide a method for manufacturing a pressure sensor that leaves no problems.
上述の目的を達成するために、本発明は、半導体基板の
一面から不純物を導入して、ゲージ抵抗および付属集積
回路を形成したのち、基板の他面側から研削および研摩
して所定の厚さにし、次いでその面からのプラズマエツ
チングにより凹加工をし、ゲージ抵抗を備えたダイヤフ
ラム部を形成するものとする。To achieve the above object, the present invention introduces impurities from one side of a semiconductor substrate to form a gauge resistor and an attached integrated circuit, and then grinds and polishes the other side of the substrate to a predetermined thickness. Then, a recess is formed by plasma etching from that surface to form a diaphragm portion provided with a gauge resistance.
ゲージ抵抗、付属集積回路形成のためのウェーハプロセ
ス終了後半導体基体を研削して所定の厚さに薄くするこ
とにより、−船釣なプラズマエツチング装置を用いても
、圧力が数百m Torrのプラズマエッチモード下で
、高周波電力、ガス種、ガス混合比、圧力、温度、電極
間隔等のパラメータおよびマスク形状の最適化を行うこ
とにより、等方性エツチングで形状の均一かつ再現性よ
く凹部を精度よく形成することができる。また、IC作
成のウェーハプロセスでは、不純物ゲッタリングを目的
として基板裏面にダメージエツチングが行われているた
め、その面に欠陥、が多く、凹加工時に異常エツチング
の発生のおそれがあり、また面粗度が大きいため凹部底
面の荒れが発生する。しかし、基板を薄くするための研
削により欠陥層が除去され、それにつづく研摩により面
粗度が改善されるため、プラズマエツチングによる凹底
面内の均一性が良くなる1以上の作用により、従来適用
されなかったプラズマエツチングによって圧力センサの
ダイヤフラム形成のための凹加工が可能となり、開口寸
法を小さくできるため、台座との接合面積を大きくとる
ことができる。After completing the wafer process for forming gauge resistors and attached integrated circuits, the semiconductor substrate is ground and thinned to a predetermined thickness. By optimizing parameters such as high-frequency power, gas type, gas mixture ratio, pressure, temperature, electrode spacing, and mask shape under etch mode, isotropic etching is performed to precisely form recesses with uniform shape and reproducibility. Can be formed well. In addition, in the wafer process for IC production, damage etching is performed on the back surface of the substrate for the purpose of gettering impurities, so there are many defects on that surface, and there is a risk of abnormal etching occurring during concave processing, and surface roughness. Due to the high degree of roughness, the bottom surface of the recess becomes rough. However, since the defect layer is removed by grinding to thin the substrate, and the surface roughness is improved by the subsequent polishing, plasma etching improves the uniformity within the concave bottom surface. Plasma etching, which was not previously used, makes it possible to form a recess for forming the diaphragm of the pressure sensor, and because the opening size can be made smaller, it is possible to increase the bonding area with the pedestal.
第1図(al〜+61は本発明の一実施例の製造工程を
示し、第2図と共通の部分には同一の符号が付されてい
る。先ず、均一な不純物濃度のシリコン板lの上に埋込
層2を介してエピタキシャル層3を積層し、この層に異
なる導電形のゲージ抵抗4および増幅回路、補償回路素
子51.52を集積し、表面を配線保護膜6で覆う (
第1図(al) 、 Si板1の裏面は不純物ゲッタリ
ングなどのために粗面工3が形成されている。このS1
1の裏面側の層14を平面研削などにより研削する (
第1図(bl)、研削後の厚さは、研削時の破損と後工
程の破損を防ぐために200μ以上にする。研削面15
は、研削により生ずる表面の歪層の除去と、台座との接
合とのため面粗度の確保と、プラズマエツチングによる
凹底面の均一性を得るため、5〜15.n程度の研摩に
より10n@rs+s以下の面粗度に仕上げる0次に、
M。FIG. 1 (al~+61 shows the manufacturing process of an embodiment of the present invention, and the same parts as in FIG. 2 are given the same reference numerals. An epitaxial layer 3 is laminated on the substrate via a buried layer 2, a gauge resistor 4 of different conductivity type, an amplifier circuit, and a compensation circuit element 51, 52 are integrated in this layer, and the surface is covered with a wiring protective film 6 (
As shown in FIG. 1(al), a rough surface 3 is formed on the back surface of the Si plate 1 for impurity gettering and the like. This S1
Grind the layer 14 on the back side of 1 by surface grinding or the like (
In FIG. 1 (bl), the thickness after grinding is set to 200μ or more to prevent damage during grinding and damage in subsequent processes. Grinding surface 15
Steps 5 to 15 were performed to remove the strained layer on the surface caused by grinding, to ensure surface roughness for bonding to the pedestal, and to obtain uniformity of the concave bottom surface by plasma etching. Zero-order finishing to a surface roughness of 10n@rs+s or less by polishing about n,
M.
Cu、 Au等の金属あるいはStO,等を蒸着、スパ
ッタリング、CVD等により成膜し、フォトリソグラフ
ィ等により所望のパターンのプラズマエツチング用マス
ク7を形成する (第1図(C))。次いで、CF□S
P&、01等のガスを用い、高周波電力、圧力。A film of metal such as Cu, Au, or StO is formed by vapor deposition, sputtering, CVD, etc., and a plasma etching mask 7 having a desired pattern is formed by photolithography or the like (FIG. 1(C)). Then, CF□S
Using gas such as P&, 01, high frequency power, pressure.
温度、電極間隔等のパラメータの最適条件下でプラズマ
エツチングを行い、凹部8を形成し、ダイヤフラムを所
望の厚さに仕上げる (第1図td))。Plasma etching is performed under optimal parameters such as temperature and electrode spacing to form the recess 8 and finish the diaphragm to the desired thickness (FIG. 1 td)).
1枚の基板から複数のセンサチップを得るために設ける
複数の凹部8の均一性を良くするためには、凹開口寸法
とマスク開口寸法の差の半分を凹深さで割った値である
エツチングファクタが0.5以上の等方性エツチングが
有効である。第3図は厚さを変えたStウェーハの一面
からプラズマエツチングして50−の厚さのダイヤフラ
ム部を残す凹加工をした場合の凹加工時間および凹深さ
のばらつきを示す。ウェーハ厚さが厚くなり、加工深さ
bが深くなるに従い、凹加工時間aは非線形で増加し、
それにより凹深さのばらつきAは非線形で増加する。凹
加工精度、すなわちダイヤフラムのウェーハ面内厚さ精
度は、ある程度価々のセンサチップのゲージ出力の増幅
率等で補償可能であるが、高機能化センサの場合、小型
化を維持するためにはある値以下に抑えなければならぬ
、第3図から、50μのダイヤフラムをA5μ以下、す
なわち面内精度10%以下で形成するには、ウェーハ厚
さが350β麟以下であることが必要なことがわかる。In order to improve the uniformity of the plurality of recesses 8 provided in order to obtain a plurality of sensor chips from one substrate, the etching value is calculated by dividing half of the difference between the recess opening dimension and the mask opening dimension by the recess depth. Isotropic etching with a factor of 0.5 or more is effective. FIG. 3 shows the variations in the recess processing time and recess depth when plasma etching was performed on one side of St wafers having different thicknesses to leave a diaphragm portion with a thickness of 50 mm. As the wafer thickness increases and the machining depth b increases, the concave machining time a increases nonlinearly,
As a result, the variation A in recess depth increases non-linearly. The concave processing accuracy, that is, the in-wafer thickness accuracy of the diaphragm, can be compensated to some extent by the amplification factor of the gauge output of the sensor chip, etc., but in the case of highly functional sensors, it is necessary to maintain miniaturization. Figure 3 shows that in order to form a 50μ diaphragm with an A5μ or less, that is, an in-plane accuracy of 10% or less, the wafer thickness must be 350β or less. Recognize.
凹加工後は、ゲージ面にレジスト等からなる保護膜61
を被着し、マスク7を除去したのち、Siと熱膨脹係数
の近いパイレックスガラス等からなる台座10と接合す
る (第1図(e)) この場合、Si板lの接合
面はlonsrms以下の面粗度となっているため、台
座10と静電接合等により直接接合することができ、メ
タライズ処理やはんだ使用の必要がない。After the recess machining, a protective film 61 made of resist etc. is applied to the gauge surface.
After removing the mask 7, it is bonded to a pedestal 10 made of Pyrex glass, etc., which has a coefficient of thermal expansion similar to that of Si (Fig. 1(e)). Because of its roughness, it can be directly bonded to the pedestal 10 by electrostatic bonding or the like, and there is no need for metallization or soldering.
(発明の効果〕
本発明によれば、ゲージ抵抗形成および付属回路集積の
ためのウェーハプロセスは反りを防ぐため厚い状態で行
った半導体基体を、研削、研摩を行って薄くすることに
より、従来のウェット方式に比して非常に簡素なプラズ
マエツチングによる凹加工を適用することができ、工数
低減1歩留向上の効果が従来と同等の加工精度で得られ
た。また、開口寸法を小さくすることができることによ
るセンサチップの台座との接合面積の拡大により、より
一層の歩留まり向上と高信軒性化を図ることが可能にな
った。さらに、センサチップに台座と直接接合可能な接
合面が得られることにより、直接接合適用による信鯨性
の向上も工程の大きな増加なく期待できる。(Effects of the Invention) According to the present invention, the wafer process for forming gauge resistors and integrating auxiliary circuits is performed by grinding and polishing the semiconductor substrate, which is made thick to prevent warping, to make it thinner. Concave machining using plasma etching, which is extremely simple compared to the wet method, can be applied, and the effect of reducing man-hours and improving yield can be achieved with the same machining accuracy as conventional methods.In addition, the opening size can be made smaller. By increasing the bonding area between the sensor chip and the pedestal, it has become possible to further improve yield and improve reliability.Furthermore, the sensor chip has a bonding surface that can be directly bonded to the pedestal. Therefore, it is possible to improve reliability through direct bonding without significantly increasing the number of processes.
第1図は本発明の一実施例の圧力センサ製造工程を(8
)〜Telの順に示す断面図、第2図は従来の圧力セン
サ製造工程を(al〜talの順に示す断面図、第3図
は被加工シリコンウェーへの厚さとプラズマエツチング
時の凹加工時間および凹深さばらつきとの関係線図であ
る。
1:シリコン板、3:エピタキシャル層、4:ゲージ抵
抗、51.527集積回路素子、7:プラズマエツチン
グ用マスク、8:凹部、1o:台座。
\−′二二、〆
術1
図
属2閃Figure 1 shows the manufacturing process of a pressure sensor according to an embodiment of the present invention (8
) to Tel, FIG. 2 is a cross-sectional view showing the conventional pressure sensor manufacturing process in the order of (al to tal), and FIG. 3 shows the thickness of the silicon wafer to be processed, the concave processing time during plasma etching, and It is a relationship diagram with the variation in the depth of the recess. 1: silicon plate, 3: epitaxial layer, 4: gauge resistor, 51.527 integrated circuit element, 7: mask for plasma etching, 8: recess, 1o: pedestal. -'22, 〆jutsu 1 illustration 2 flash
Claims (1)
抗および付属集積回路を形成したのち、基板の他面側か
ら研削および研摩して所定の厚さにし、次いでその面か
らのプラズマエッチングにより凹加工をし、ゲージ抵抗
を備えたダイヤフラム部を形成することを特徴とする圧
力センサの製造方法。1) After introducing impurities from one side of the semiconductor substrate to form a gauge resistor and an attached integrated circuit, the other side of the substrate is ground and polished to a predetermined thickness, and then a recess is formed by plasma etching from that side. A method for manufacturing a pressure sensor, comprising processing to form a diaphragm portion provided with a gauge resistance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2043057A JP2676962B2 (en) | 1990-02-23 | 1990-02-23 | Manufacturing method of pressure sensor |
Applications Claiming Priority (1)
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JP2043057A JP2676962B2 (en) | 1990-02-23 | 1990-02-23 | Manufacturing method of pressure sensor |
Publications (2)
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JPH03245576A true JPH03245576A (en) | 1991-11-01 |
JP2676962B2 JP2676962B2 (en) | 1997-11-17 |
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JP2043057A Expired - Fee Related JP2676962B2 (en) | 1990-02-23 | 1990-02-23 | Manufacturing method of pressure sensor |
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JP (1) | JP2676962B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06140640A (en) * | 1992-10-29 | 1994-05-20 | Fujikura Ltd | Manufacture of semiconductor pressure sensor |
EP1167280A3 (en) * | 2000-06-23 | 2002-03-27 | Randox Laboratories Ltd. | Production of diaphragms |
JP2008051825A (en) * | 2007-11-05 | 2008-03-06 | Texas Instr Japan Ltd | Pressure sensor |
CN100456007C (en) * | 2005-06-27 | 2009-01-28 | 株式会社电装 | Pressure sensor |
JP2015064293A (en) * | 2013-09-25 | 2015-04-09 | 株式会社デンソー | Pressure sensor |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110589756B (en) * | 2019-08-02 | 2020-11-10 | 南方科技大学 | Preparation method of curved surface nano structure |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62108526A (en) * | 1985-11-06 | 1987-05-19 | Fuji Electric Co Ltd | Working method for semiconductor plate |
JPS63122278A (en) * | 1986-11-12 | 1988-05-26 | Fuji Electric Co Ltd | Manufacture of semiconductor pressure sensor |
JPS63271976A (en) * | 1987-04-28 | 1988-11-09 | Sony Corp | Manufacture of pressure sensor |
JPH01125872A (en) * | 1988-06-15 | 1989-05-18 | Hitachi Ltd | Manufacture of semiconductor device equipped with pressure sensing element |
JPH01150832A (en) * | 1987-12-08 | 1989-06-13 | Fuji Electric Co Ltd | Semiconductor pressure sensor |
-
1990
- 1990-02-23 JP JP2043057A patent/JP2676962B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62108526A (en) * | 1985-11-06 | 1987-05-19 | Fuji Electric Co Ltd | Working method for semiconductor plate |
JPS63122278A (en) * | 1986-11-12 | 1988-05-26 | Fuji Electric Co Ltd | Manufacture of semiconductor pressure sensor |
JPS63271976A (en) * | 1987-04-28 | 1988-11-09 | Sony Corp | Manufacture of pressure sensor |
JPH01150832A (en) * | 1987-12-08 | 1989-06-13 | Fuji Electric Co Ltd | Semiconductor pressure sensor |
JPH01125872A (en) * | 1988-06-15 | 1989-05-18 | Hitachi Ltd | Manufacture of semiconductor device equipped with pressure sensing element |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06140640A (en) * | 1992-10-29 | 1994-05-20 | Fujikura Ltd | Manufacture of semiconductor pressure sensor |
EP1167280A3 (en) * | 2000-06-23 | 2002-03-27 | Randox Laboratories Ltd. | Production of diaphragms |
US6551851B2 (en) | 2000-06-23 | 2003-04-22 | Randox Laboratories Limited | Production of diaphragms over a cavity by grinding to reduce wafer thickness |
CN100456007C (en) * | 2005-06-27 | 2009-01-28 | 株式会社电装 | Pressure sensor |
JP2008051825A (en) * | 2007-11-05 | 2008-03-06 | Texas Instr Japan Ltd | Pressure sensor |
JP2015064293A (en) * | 2013-09-25 | 2015-04-09 | 株式会社デンソー | Pressure sensor |
Also Published As
Publication number | Publication date |
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JP2676962B2 (en) | 1997-11-17 |
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