JPH03241855A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a channel cut and a field oxide film to be formed in a self-aligned manner so as to lessen them in positional deviation and to enable an element isolation to take place stably by a method wherein impurities are introduced into a base film through the intermediary of an opening provided to a first film, and an insulating film is etched using a second film left inside the opening as a mask. CONSTITUTION:An insulating film 2 and a first film 3 different from the film 2 in etching selection ratio are successively formed on a base film 1, the first film 3 is etched to provide an opening 4 where the insulating film 2 is exposed, impurities are introduced into the base film 1 through the opening 4 using the first film 3 as a mask to form a channel cut 5, a second film 6 different from the insulating film 2 and the first film 2 in etching selection ratio is formed on the first film 3 so as to cover the opening 4, the second film 6 is etched so as to be left unremoved only inside the opening 4, and the first film 3 and the insulating film 2 are etched using the second film 6 as a mask to form an element region 8.

Description

[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a semiconductor device, a channel cut and a field oxide film can be formed in a self-aligned manner, and positional deviation between the channel cut and the field oxide film can be eliminated to stabilize device isolation. The purpose of the present invention is to provide a method for manufacturing a semiconductor device that can be carried out, and includes a step of sequentially forming an insulating film and a first film having an etching selectivity different from that of the insulating film on a base film; A channel is formed by etching the insulating film to form an opening and exposing the insulating film within the opening, and introducing an impurity into the underlying film through the opening using the first film as a mask. a step of forming a cut, a step of forming the second film having a different etching selectivity than the insulating film and the first film on the first film so as to cover the opening; etching the film so that it remains only in the opening, and etching the first film and the insulating film using the second film as a mask to form an element region. .

[Industrial application field]

The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device.
In C, the present invention relates to a method of manufacturing a semiconductor device that can form a fine element isolation region.

In recent years, as ICs have become more highly integrated, element isolation has also been required to become increasingly finer. In addition, it can respond to the recent severe miniaturization, and the channel cut and field oxide film can be formed using self-line, eliminating misalignment of the channel cut and field oxide film to achieve stable device isolation. There is a need for a method of manufacturing a semiconductor device that can achieve this.

[Conventional technology]

A conventional technique using an element isolation method using LOGO3 will be described below.

FIGS. 3(a) to 3(e) are diagrams illustrating an example of a conventional method for manufacturing a semiconductor device.

In this figure, 31 is a P-type substrate made of St, etc., 32 is a silicon oxide film made of 5TOZ, etc., 33 is a silicon nitride film made of Si, N, etc., and 34 is an opening formed in the silicon nitride film 33. 35 is a p-type channel cut, 36 is a field oxide film as an element isolation region made of Sin, etc., and 37 is an element region.

Next, the manufacturing method will be explained.

First, as shown in FIG. 3(a), a silicon oxide film 32 made of Sin is formed on a substrate 31 by, for example, thermal oxidation.

Next, as shown in FIG. 3(b), S! is applied onto the silicon oxide film 32 by, for example, the CVD method. After depositing 2N4 to form a silicon nitride film 33, the silicon nitride film 33 is selectively etched by RIE, for example, so that the silicon nitride film 33 remains only in the element region to form an opening 34, and also to form an opening 34. The silicon oxide film 32 is exposed in the inside 34.

Next, as shown in FIG. 3C, a channel cut 35 is formed by introducing B'- into the substrate 31 through the opening 4 using the silicon nitride film 33 as a mask by ion implantation of B or the like. . The channel cut 35 is intended to improve electrical insulation between elements, and specifically, by diffusing impurities of the same conductivity type as the substrate 31 into the surface of the substrate 31 under the field oxide film 36, This is done to increase the concentration and increase the threshold voltage vth of the field transistor.

Next, as shown in FIG. 3(d), the silicon nitride film 33
Using this as a mask, the substrate 31 is selectively thermally oxidized to form a field oxide film 36 made of Sin as an element isolation region. At this time, the impurity (B9) in the channel cut 35 is activated by the heat treatment during thermal oxidation, and the channel cut 35 becomes a P' type diffusion layer.

Next, after removing the silicon nitride 11133 used as a mask using, for example, phosphoric acid, the silicon oxide film 32 is removed by, for example, wet etching to expose the substrate 31, thereby forming an element as shown in FIG. 3(e). Region 37 can be obtained.

Then, after forming a gate insulating film in the element region 37 and forming a gate electrode, a source/drain diffusion layer is formed,
Next, a semiconductor layer is completed by forming a glabellar insulating film, a contact hole, a wiring layer, etc.

The conventional semiconductor device manufacturing method using the element isolation method called LOGO3 described above utilizes the strong oxidation resistance of the silicon nitride film 33 to selectively remove the silicon substrate 31 using the silicon nitride film 33 as a mask. Element isolation is performed by thermally oxidizing and forming a thick field oxide film 36.

Since the field oxide film 36 formed by LOGO3 has a smooth thickness change, there is an advantage that disconnection does not easily occur when a wiring layer such as Af is formed on the field oxide film 36. However, the peripheral part of the field oxide film 36, which becomes the element isolation region, tends to spread toward the element area (this part is called a bird's beak because of its shape), which has the disadvantage of reducing the element area. .

Specifically, for example, if the field oxide film 36 is formed to a thickness of 6000 mm, a bird's beak on one side will be formed with a bird's beak length of 700 mm, and an element region with a width of 1400 mm will be sacrificed on both sides. For this reason, as elements become finer, a problem arises in that the element region becomes narrower by the width of the bird's beak, or conversely the element isolation region becomes narrower. As described above, when the device area becomes narrower, the gate width of the transistor becomes effectively shorter, resulting in narrow channel effects, short channel effects, reductions in various design margins related to contacts, etc., and when the device isolation region becomes narrower. A decrease in the threshold voltage of the field transistor, an increase in leakage current, etc. occur. Therefore, it is necessary to ensure a certain width of the element region or the element isolation region, making it difficult to miniaturize the element.

A conventional technique for solving the problem of narrowing the device area due to the bird's beak is the field shield method.

Hereinafter, a detailed explanation will be given using the drawings.

FIGS. 4(a) to 4(f) are diagrams illustrating another example of the conventional method for manufacturing a semiconductor device.

In this figure, 41 is a p-type substrate made of Si, etc., 42 is a silicon oxide film made of Sin, etc., 43 is a resist film, 44 is an opening formed in the resist [43 for forming a channel cant, 45 46 is a field oxide film as an element isolation region made of, for example, a p-type channel cut, 47 is a resist film, 48 is an opening formed in the resist film 47, and 49 is an element region.

Next, the manufacturing method will be explained.

First, as shown in FIG. 4(a), a silicon oxide film 42 of 5 iOz is formed on a substrate 41 by, for example, thermal oxidation.

Next, as shown in FIG. 4(b), the silicon oxide film 42
After applying a resist on top to form a resist film 43 1
The resist film 43 is patterned by exposure and development to form an opening 44 for forming a channel cut, and the silicon oxide film 42 is exposed in the opening 44. Next, the resist film 43 is patterned by ion implantation of B or the like. After forming a channel cut 45 by introducing B into the substrate 41 through the opening 44 using as a mask, as shown in FIG.
As shown in FIG. 3, the resist film 43 used as a mask is removed.

Next, as shown in FIG. 4(d), the substrate 4 is heated by thermal oxidation.
1 is oxidized to form a field oxide film 46. At this time, the impurity (B') in the channel cut 45 is activated by the heat treatment during thermal oxidation, and the channel cut 45 becomes a p' type diffusion layer.

Next, as shown in FIG. 4(e), the field oxide film 4
After forming a resist film 47 by applying a resist on 6, the resist film 47 is patterned by exposure and development so that the resist film 47 remains only in the region on the field oxide film 46 corresponding to the channel cut 45, and an opening is formed. At the same time, a field oxide film 4 is formed in the opening 48.
Expose 6.

Next, the field oxide film 46 and silicon oxide film 42 in the opening 48 are selectively etched by, for example, RIE using the resist film 47 as a mask to expose the substrate 41, as shown in FIG. 4(f). An element region 49 like this can be obtained.

Then, the resist film 47 is removed, a gate insulating film is formed in the element region 49, and a gate electrode is formed.
A semiconductor device is completed by forming a drain diffusion layer, and then forming a glabellar insulating film, a contact hole, a wiring layer, etc.

The conventional method of manufacturing a semiconductor device using the field shield method described above has the advantage of being able to solve the problem of a bird's beak occurring due to LOGO3 and narrowing the element area.

[Problem to be solved by the invention]

However, in the conventional semiconductor device manufacturing method using the field shield method described above, it was not possible to form the channel cut 45 and the field oxide film 46 in a self-aligned manner. Specifically, first, as shown in FIG. 4(b), the cyst film 43 is patterned once, and then ions are implanted to form the channel cut 45. As shown in FIG. 4(e), (
As shown in f), the resist film 47 is patterned again and then the field oxide film 46 is etched using the resist film 47 as a mask. Alignment is performed by two photolithography steps using separate resist masks. There is a problem in that the channel cut 45 and the field oxide film 46 are easily misaligned due to misalignment caused by the process, making it difficult to perform element isolation stably. This becomes more noticeable as the device is miniaturized, and in the worst case, it results in poor element isolation and leakage current.

Therefore, the present invention provides a method for manufacturing a semiconductor device in which a channel cut and a field oxide film can be formed in a self-aligned manner, and device isolation can be performed stably by eliminating positional deviation between the channel cut and the field oxide film. It is intended to.

[Means to solve the problem]

In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention includes the steps of sequentially forming an insulating film and a first film having an etching selectivity different from that of the insulating film on a base film, and etching the first film. forming an opening, exposing the insulating film in the opening, and introducing an impurity into the underlying film through the opening using the first film as a mask to cut the channel. forming the second film having a different etching selectivity from the insulating film and the first film on the first film so as to cover the opening; The second film is used as a mask to etch the first film and the insulating film to form an element region.

[Effect]

In the present invention, as shown in FIGS. 1(a) to (f), a substrate 1
A field oxide film 2 and a silicon nitride film 3 are sequentially formed on the silicon nitride film 3, and the silicon nitride film 3 is etched to form an opening 4, and the field oxide film 2 is exposed in the opening 4, and the silicon nitride film 3 is etched. After a channel cut 5 is formed by introducing impurities into the substrate 1 through the opening 4 using 3 as a mask, a resist film 6 is formed on the silicon nitride film 3 so as to cover the opening 4.
After resist film 6 is etched so as to remain only in opening 4, silicon nitride film 3 and field oxide film 2 are etched using resist film 6 as a mask to form element region 8.

In this way, in the present invention, the channel cut 5 is formed by ion implantation through the opening 4 formed in the silicon nitride film 3 as shown in FIG.
As shown in FIG. 3, a field oxide film 2 is formed by patterning using a resist film 6 buried in an opening 4 formed in a silicon nitride film 3 as a mask. That is, the channel cut 5 and the field oxide film 2 can be formed using self-aligned lines.

〔Example] Hereinafter, the present invention will be explained based on the drawings.

FIGS. 1(a) to 1(g) are diagrams illustrating an embodiment of a method for manufacturing a semiconductor device according to the present invention.

In this figure, 1 is a P-type substrate made of Si or the like, 2 is a field oxide film made of 5i02, etc., and 3 is a Si
A silicon nitride film made of 3N4 or the like, 4 an opening formed in the silicon nitride film 3, 5 a channel cut, 6 a resist film, 7 an opening formed in the resist film 6, and 8 an element region.

Next, the manufacturing method will be explained.

First, as shown in FIG. 1(a), a group Fi is formed by thermal oxidation.
1 is selectively oxidized so that the film thickness is, for example, 1500.
A field oxide film 2 consisting of , is formed.

Next, as shown in FIG. 1(b), Si and N are deposited on the field oxide film 2 by, for example, the CVD method to form a silicon nitride film 3 having a thickness of, for example, 1500 Å, and then by, for example, RIE. The silicon nitride film 3 is etched to form an opening 4 and the field oxide film 2 is exposed within the opening 4. Note that the thickness of the silicon nitride film 3 is appropriately set so that impurities are implanted only into the substrate 1 which becomes the element region within the opening 4 during ion implantation for forming a channel cut. Then, for example, 60 keV,
A channel cut 5 is formed by introducing B into the substrate 1 through the opening 4 using the silicon nitride film 3 as a mask by ion implantation of B (or BF) or the like using IXIO "ci-".

Next, as shown in FIG. 1(c), a positive type film having a viscosity of 12 cp, for example, is coated on the silicon nitride film 3 so as to cover the opening 4.
A resist film 6 having a film thickness of, for example, 6,000 is formed by applying a resist of 6,000 to 6,000.

Next, as shown in FIG. 1(d), for example, 02 gas, 0
．． The resist film 6 is etched back by RIE at 0.5 Torr and 500 Torr so that it remains only in the opening 4. At this time, the resist film 6 is buried only in the opening 4, and the silicon nitride film 3 is exposed.

Next, as shown in FIG. 1(e), for example, CF.

RI of gas 102 gas, 1.5 Torr, l k-
Using resist film 6 as a mask, silicon nitride film 3 is
is etched to form opening 7 and expose field oxide M2 within opening 7.

Next, as shown in FIG. 1(f), for example, CF4 gas/
CHF x gas, 1.8 Torr, 1 kW t
By etching the field oxide film 2 with E using the resist film 6 as a mask and exposing the substrate 1, an element region 8 as shown in FIG. 1(f) can be obtained. Next, as shown in FIG. 1(g), after removing the resist film 6, heat treatment is performed at 850°C in a N2 gas atmosphere to activate B' of the channel cut 5, thereby forming the channel cut 5. Make it a diffusion layer.

Then, as in the conventional method, a gate insulating film is formed in the element region 8, a gate electrode made of poly-Si or the like is formed, a source/drain diffusion layer (which may have an LDD structure) is formed, and then a BPSC; A semiconductor device is completed by forming a glabellar insulating film made of A1, etc., a contact hole, a wiring layer made of A1, etc.

That is, in the above embodiment, the channel cut 5 is formed by ion implantation through the opening 4 formed in the silicon nitride film 3 as shown in FIG.
), the field oxide film 2 is formed by patterning using the resist film 6 embedded in the opening 4 formed in the silicon nitride film 3 as a mask, so the channel cut 5 and the field oxide film 2 are formed by self-line. Can be done. In this way, alignment by the photolithography process is only necessary when forming the opening 4 in the silicon nitride I13, and alignment by the photolithography process is not required when forming the channel cut 5 and the field oxide film 2. , channel cut 5
By eliminating misalignment of field oxide film 2, element isolation can be performed stably. In addition, bird's beaks do not occur, and it is possible to eliminate inhibition of miniaturization due to misalignment between the channel cut 5 and the field oxide film 2.

In addition, in the above embodiment, a case was described in which the heat treatment for diffusing impurities in the channel cut 5 and making the channel cut 5 a diffusion layer is performed after the resist film 6 is removed.
The present invention is not limited to this. For example, the channel cut 5 may be formed by ion implantation and then heat treated immediately after.

Further, in the above embodiment, the channel cut 5 and the resist film 6 mask are formed, and the single layer silicon nitride 11 in which the opening 4 is formed! Although the present invention is not limited to this, as shown in FIGS. 2(a) and 2(b), the present invention is not limited to this. A silicon nitride film 3 having a thickness of, for example, 1,000 and a silicon oxide film 11 having a thickness of, for example, 1,000 made of CVD SiOz are formed.
It may also be carried out using a layered film. In this case, when removing the silicon oxide film 11 and the silicon nitride film 3 by etching (the silicon oxide film 11 is etched with a hydrochloric acid solution or CF,
gas/CHF, gas), the resist film 6 and the field oxide film 2 can be made less likely to be thinned than when etching the particularly thick single layer silicon nitride film 3 of the above embodiment. Specifically, when the silicon nitride film 3 of the above embodiment is thick, the resist film 6 is likely to be thinned or changed in quality when the silicon nitride film 3 is removed (and the silicon nitride film 3 may be easily thinned or changed in quality). Since the etching selectivity (approximately 0.4) for the field oxide film 2 is small, the field oxide film 2 may be thinned or the isolation width may increase due to lateral side etching. By forming a two-layer film of the film 11 and the silicon nitride film 3, and making the silicon nitride film 3 appropriately thin to about 500 layers, etching can be completed without variations depending on the position within the wafer.

Furthermore, in each of the above embodiments, the channel cut 5 is formed by removing the resist used for forming the opening 4 and 12, and then masking the silicon nitride film 3 or the silicon oxide film 11 and the silicon nitride film 3. However, the present invention is not limited to this, and the resist and the silicon nitride film 3, or the resist and the silicon oxide film are formed without removing the resist used for forming the opening 4.12. 11
Alternatively, the silicon nitride film 3 may be used as a mask. Note that if the dose is too large and the resist deteriorates, making it difficult to remove the resist, it is preferable to remove the resist before ion implantation.Also, if there is a resist, its function as a mask will improve accordingly, so it is better to remove the resist. If it is easy to do so, it is preferable to perform ion implantation without removing the resist.

〔Effect of the invention〕

According to the present invention, a channel cut and a field oxide film can be formed in a self-aligned manner, and there is an advantage that misalignment between the channel cut and the field oxide film can be eliminated and fine element isolation can be stably performed.

FIG. 3 is a diagram for explaining an example of a conventional manufacturing method, and FIG. 4 is a diagram for explaining another example of a conventional manufacturing method.

■・・・・・・Board, 2...Field oxide film, 3... Silicon nitride film, 4...opening, 5...Channel cut, 6...Resist film, 8...Element area.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining the manufacturing method of one embodiment of the semiconductor device manufacturing method according to the present invention. FIG. 2 is a diagram for explaining the manufacturing method of another embodiment, and FIG. 2 is a diagram for explaining the manufacturing method of another embodiment. Figure 1: Diagram explaining the manufacturing method of one example of the conventional example Figure 2: Diagram explaining the manufacturing method of another example of the conventional example Figure 2: Diagram explaining the manufacturing method of one example of the conventional example Diagram explaining the manufacturing method

Claims (1)

[Claims] (1) An insulating film (2) on the underlying film (1) and the insulating film (
2) sequentially forming a first film (3) having a different etching selectivity from etching selectivity; etching the first film (3) to form an opening (4); channel cutting by exposing the insulating film (2) inside the insulating film (2) and introducing impurities into the underlying film (1) through the opening (4) using the first film (3) as a mask; (5) on the first film (3) so as to cover the opening (4), the insulating film (2) and the first film (3) have different etching selectivity; forming the second film (6); etching the second film (6) so that it remains only in the opening (4); and masking the second film (6). A method of manufacturing a semiconductor device, comprising: etching the first film (3) and the insulating film (2) to form an element region (8). (2) The method for manufacturing a semiconductor device according to claim 1, wherein the base film (1) is made of a silicon substrate. (3) The method of manufacturing a semiconductor device according to claim 1 or 2, wherein the insulating film (2) is made of a silicon oxide film. (4) The method of manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the first film (3) is made of a silicon nitride film. (5) The method for manufacturing a semiconductor device according to any one of claims 1 to 4, wherein the second film (6) is made of a resist film. (6) Manufacturing a semiconductor device according to any one of claims 1, 2, 3, and 5, wherein the first film (3) is made of a two-layer film including an upper layer of a silicon oxide film and a lower layer of a silicon nitride film. Method.