JPH0323998U - - Google Patents
Info
- Publication number
- JPH0323998U JPH0323998U JP8353389U JP8353389U JPH0323998U JP H0323998 U JPH0323998 U JP H0323998U JP 8353389 U JP8353389 U JP 8353389U JP 8353389 U JP8353389 U JP 8353389U JP H0323998 U JPH0323998 U JP H0323998U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- wiring board
- mounting structure
- shield plate
- external electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 6
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
第１図〜第４図は実施例を示し、第１図はＩＣ
チツプの実装構造を示す正面図、第２図はその要
部拡大断面図、第３図はシールド板の正面図、第
４図はその拡大正面図、第５図は従来の実装構造
を示す正面図である。
１０……配線基板、１１……ＩＣチツプ、１２
……シールド板、１４……電極ピン、１５……接
続突起、１６……絶縁膜。
1 to 4 show examples, and FIG. 1 is an IC
A front view showing the chip mounting structure, Fig. 2 is an enlarged sectional view of the main part thereof, Fig. 3 is a front view of the shield plate, Fig. 4 is an enlarged front view thereof, and Fig. 5 is a front view showing the conventional mounting structure. It is a diagram. 10...Wiring board, 11...IC chip, 12
... Shield plate, 14 ... Electrode pin, 15 ... Connection projection, 16 ... Insulating film.
Claims (1)
置の外部電極を接続して前記半導体装置を前記配
線基板に実装する半導体装置の実装構造において
、 前記配線基板と前記半導体装置の間に前記配線
基板との接触を防ぐ絶縁膜を介在させてシールド
板を配置するとともに、このシールド板の一部分
を前記半導体装置のアース用の外部電極と共に前
記配線基板のグランド用の配線パターンに接合し
たことを特徴とする半導体装置の実装構造。[Claims for Utility Model Registration] A mounting structure for a semiconductor device in which an external electrode of a semiconductor device is connected to a wiring pattern formed on a wiring board and the semiconductor device is mounted on the wiring board, comprising: the wiring board and the semiconductor device; A shield plate is arranged with an insulating film interposed therebetween to prevent contact with the wiring board, and a part of the shield plate is connected to a ground wiring pattern of the wiring board together with an external electrode for grounding of the semiconductor device. A mounting structure for a semiconductor device characterized by bonding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8353389U JPH0323998U (en) | 1989-07-18 | 1989-07-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8353389U JPH0323998U (en) | 1989-07-18 | 1989-07-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0323998U true JPH0323998U (en) | 1991-03-12 |
Family
ID=31631278
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8353389U Pending JPH0323998U (en) | 1989-07-18 | 1989-07-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0323998U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006126995A (en) * | 2004-10-27 | 2006-05-18 | Taiko Device Techno & Co Ltd | Monitoring sensor device |
-
1989
- 1989-07-18 JP JP8353389U patent/JPH0323998U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006126995A (en) * | 2004-10-27 | 2006-05-18 | Taiko Device Techno & Co Ltd | Monitoring sensor device |