JPH03238948A - Branch circuit - Google Patents

Abstract

PURPOSE:To attain normal branch service even when the circuit is used for a ring shaped LAN by providing much more areas in a frame so as to make transmission and reception of data. CONSTITUTION:With an input data 7 inputted, speed conversion is implemented by a speed conversion circuit 6 and sent to an AND circuit 2 as a conversion data 13. Moreover, an input data 8 is branched, the speed is restored by the speed conversion circuit 6 and only a data in a reception area in a frame corresponding to a connected external device is outputted as an output data 10 and sent also to an OR circuit 5. Simultaneously, a control signal 11 outputting '1' when an area used by its own station comes and a control signal 11 outputting '0' when not are generated by a memory 4 and a control circuit 3. The OR circuit 5 ORs the control signal 11 and the input data 8 from the LAN. New input data 12 being the output of the OR circuit and converted data 13 are ANDed by an AND circuit 2 and an output data 9 is sent. Thus, normal branch service is implemented.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a ring-type L A N (Local Ar
This invention relates to a branch circuit for providing branch services in EA Net-work).

[Prior Art] Conventionally, there has been a device of this type as shown in FIG. FIG. 4 is a configuration diagram for explaining the operation of a conventional branch circuit shown in NTT's "Technical Reference Materials for High-Speed Digital Transmission Services" (Page 30, second edition published July 17, 1988). In this figure, 101a to 101
201a to 201c are DSUs (digital line termination units), and 202 is an MJE (branch connection unit).

FIG. 5 is a diagram showing the contents of the MJE 202, and in this diagram, 2a is an AND circuit.

FIG. 6 is a diagram showing an example of a frame structure flowing through a high-speed digital line. In this figure, 400 is a frame consisting of 789 bits, 401 at to 401ass are time slots (hereinafter abbreviated as TS) each consisting of 8 bits, 402 is a frame header such as a service channel and a frame synchronization bit. In this example, TS40
1a I-T B401a+ is allocated as a communication area 403 for broadcast communication from station A 101a to station 8 101b and station 0 101c and communication from station 8 101b to station A 101a shown in FIG. TS401aI+
1 to TS401a96 are A station 101a to 8 stations 101b
Broadcast communication to 0 station 101C and A from 0 station 101c
Allocated as a communication area 404 for communication to the station 101a, TS401a at, TS401a
ea is unused.

FIG. 7 is a simplified configuration diagram of FIG.
0a is from station A 101a, frame 40ob is from station 8 10
1b, frame 400C indicates a frame issued from station 0 101c, frame 400m is sent to station A 101a, frame 40On is sent to station 8 101b, and frame 400C is issued from station 0 101c.
0 indicates a frame coming into the 0 station 101C.

Furthermore, FIG. 8(a) is a modification of FIG. 7 into a ring type LAN, and 601a to 601C are branch circuits. Also, 400d, 400e, 400f, 400g,
400p, 400q, 400r.

400s are all frames, frame 400a.

400d is from the A station 101a to the branch circuit 601a, and frames 400b and 400e are from the 8th station 101b to the branch circuit 6.
To 01b, frames 400c and 400f are 0 station 101
C from the branch circuit 601c, and the frame 4
00q, 400t are in station A 101a, frame 400g
+400r is 8 stations 101b, 7 rams 400p, 4
00s is a frame that enters the 0 station 101c from the LAN.

Next, the operation will be explained.

First, a frame 400a with data 403a=Al and data 404a=A2 is sent from the A station 101a, and a frame 400a with data 403=B1. Data 404b =aI2I2
．． Frame 400b of "1" receives data 403C from station 0 101c = aI2I2 "1" data 404
Frame 400C with c=C1 is output, branch service control is performed by MJE 202, and data 4 is sent from MJE 202.
03m=Bl, data 404m=frame 400 of C1
m to the A station 101a, data 403n=A1. data 4
Frame 400n of 04n=A2 is sent to 8 stations 101b, and data 403°=A1. Frame 400o with data 404°=A2 is sent to station 0 101C. Of these, 8 stations 10
Frame 400n that enters station 1b and frame 400o that enters station 0 101C are frame 4 from station A 101a.
The same as 00a is sent. On the other hand, station A 10
1a has 8 stations 101 with AND circuit 2a in MJE202
Frame 400b from b and 4 from station 0 101c
00c is ANDed, data 403m=81. Data 404m = CI frame 400m as station A 101
sent to a.

Here, considering the contents of the frame, 1. data 403o
is Al, which is equal to data 403a, and data 4
04o is equal to data 404a and is A2. Similarly,
Data 403n is also Al, same as data 403a,
Furthermore, the data 404n is also A2, which is the same as the data 404a.

However, data 403m becomes B1 by ANDing data 403b=B1 and data 403c=aI2n "1", and data 404m becomes C1 by ANDing data 404c=c1 and data 404b=aI2I2 "1".

In this way, the branch service is realized by transmitting the data Al and A2 to the 8th station 101b and the 0th station 101c, and transmitting the data B1 and C1 to the A station 101a.

Next, the operation of the ring type LAN shown in FIG. 8 will be explained.

When the A station 101a sends out the frame 400a, the branch circuit 601b outputs it as is to the 8th station 101b, and also sends the frame 400b sent out from the 8th station 101b onto the LAN as a frame 400p. The branch circuit 601c transfers this frame 400p directly to the 0 station 101.
At the same time, the frame 400c sent from the 0 station 101C is sent onto the LAN as a frame 400q. The branch circuit 601a outputs this frame 400q as it is to the A station 101a, performs an AND operation with the frame 400d output from the A station 101a, and sends the result onto the LAN as a frame 400r. If we consider the same way below, each data will become as shown in FIG. 8(b).

[Problem to be solved by the invention 1 Since the conventional branch circuit is configured as described above, when the network is ring-shaped as shown in FIG. 8(a), the LA
The data in the frame flowing on N is rewritten every time it passes through the branch circuit 601a, and although the data from station 0 101c can be received by station A 101a, it cannot be received by station 8 101b, and normal communication cannot be performed. There was a problem.

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a branch circuit that can perform normal branch services even in a ring type LAN.

[Means to solve the problem]

The branch circuit according to the present invention sets the rate of frames received from the network to 1/n, selects and outputs data in a reception area in the frame corresponding to a connected external device,
For data input from external devices, the speed is n
A speed conversion circuit that doubles the speed, sets it in the corresponding transmission area, and generates conversion data with other areas set to specific logical values, and a transmission data that corresponds to the connected external device in the frame received from the network. a conversion circuit that generates new input data with a specific logic value in the region of 'It is prepared.

[Effect]

In this invention, at the time of reception, the speed conversion circuit
The speed of frames received from the network is set to 1/n, and only the data in the reception area of the corresponding frame is selected and output to the connected external device.

Also, at the time of transmission, the speed conversion circuit multiplies the speed of data input from an external device by n times, sets it in the corresponding transmission area, and converts data with specific logical values in other areas, An AND circuit performs an AND with new input data in which the corresponding transmission area in a frame received from the network is set to a specific logical value by the conversion circuit, and the output is transmitted.

[Example 1 The present invention will be explained in detail below.

FIG. 1 is a configuration diagram showing an embodiment of a branch circuit of the present invention. Further, FIG. 2 is a diagram for explaining the operation of the branch circuit of the present invention, and FIG. 3 is a diagram showing the frame configuration used in the present invention. In these figures, 1.1a
, lb, 1c are branch circuits, 2 is AN as an AND circuit
D circuit, 3 is a control circuit, 4 is a memory that stores the area used by the local station, and 5 is an OR circuit. (here, the A station 101a,
A conversion circuit is configured to generate new input data in which the transmission area corresponding to the DTE in the 8th station 101b and the C station 101C is set to a specific logical value (here, "1"). 6 is a speed conversion circuit that changes the speed of frames received from the network by 1/
n (in this case, 1/2), select and output the data in the reception area in the frame that corresponds to the connected external device, and increase the speed by n times for data input from the external device. (double here), set it in the corresponding area for transmission, and set the other areas to a specific logical value (here °°
1"). 7 is input data from outside, 8 is input data from LAN, 9 is output data to LAN, 10 is output data to outside, 11 is a control signal, 12 is New input data 13 is converted data.

In addition, 400i and 4001 are from the branch circuit 1a to the A station 10.
Frame 1a enters, 400h, 400 has branch circuit 1
This is a frame that enters the 0 station 101c from c. 300 and 30Qa to 300f are frames flowing on the LAN, 301 and 301a to 301f are areas for speed converting and storing data sent from the A station 101a to the B station 101b and 0 station 101c, and 302 and 302a to 302
f is an area 303 and 303a to 303f where data from the 8th station 101b to the A station 101a is speed-converted and stored;
Also, from the A station 101a to the 8th station 101b and the 0th station 101
Areas 304 and 304a to 304f for speed converting and storing data sent to C are from station 0 101c to station A 101.
This is an area where the speed of data sent to a is converted and stored.

Next, the operation of the branch circuit 1 shown in FIG. 1 will be explained.

First, when the frame 400 shown in FIG. 6 is input as input data 7 from an external device, this frame 4
00 undergoes speed conversion by the speed conversion circuit 6 and is sent to the AND circuit 2 as converted data 13. Also, LAN
The input data 8 is branched and the speed is returned to the original speed by the speed conversion circuit 6, and only the data in the reception area in the frame corresponding to the connected external device is output data 10.
In addition to being output as , it is also sent to the OR circuit 5. At the same time, memory 4. The control circuit 3 generates a control signal 11 that outputs °゛1°゛ when the area used by the local station is reached, and otherwise outputs °゛O''.This control signal 11 and input data from the LAN 8 is ORed by the OR circuit 5, and the output of the new input data 12 and the converted data 13 are ANDed by the AND circuit 2, and the output data 9 is
is sent onto the LAN.

Next, the frame 400a sent out from the A station 101a, the operation of which will be explained with reference to FIG.
and sent out on the LAN. In response to this, the branch circuit 1b outputs the frame 400g to the 8th station 101b. At the same time, the control signal 11 causes the frame 3 to be
Area 3 for transmission corresponding to 8 stations 101b of 00P
After setting 02a to aI2ff”1°°, frame 400 output from 8 stations 101b by internal AND circuit 2
B is ANDed with the frame converted by the speed conversion circuit 6 in the branch circuit 1b, and the frame 300b is sent to the LAN.
Output as . In response to this, branch circuit 1C is set to 0 stations 10
Output frame 400h to 1c. At the same time, after setting the area 304b as a transmission area corresponding to the 0 station 101c to aI2I2 "1" by the control signal 11, the AND circuit 2 transfers the frame 400c output from the 0 station 101C into the branch circuit 1C. AND is performed with the frame converted by the speed conversion circuit 6, and the result is sent out on the LAN as a frame 300c.

Similar operations are performed thereafter, but as shown in FIGS. 2(a) and 2(b), data 403a=AI, 404a=A2, 403d from the A station 101a to the 8th station 101b and the 0th station 101c.
=A3,404d=A4 matches the frames 400g and 400j that entered the 8th station 101b and the frames 400h and 400 that entered the 0th station 101c, so from the A station 101 to the 8th station 101b and the 0th station 101c. It turns out that communication is possible. In addition, from the 8th station 101b to the A station 101
Data addressed to a 403b=B 1゜403e-B3 is A
Since it matches the frames 400i and 4001 that entered the station 101a, it can be seen that communication is possible from the 8th station 101b to the A station 101a. Similarly, communication from station 0 101c to station A 101a is also possible.

In the above embodiment, the number of stations is 3 to simplify the explanation.
Although the present invention is limited to stations, it can be extended to communication between N stations by changing the data frame structure, speed conversion rate, and memory contents of each station, and even in that case, the same effect as the above embodiment can be achieved. . Further, in the above embodiment, the conversion circuit is configured with a memory, a control circuit, and an OR circuit, but the same effect can be achieved even if other circuit configurations are used.

[Effect of the invention 1] As explained above, the present invention sets the speed of frames received from the network to 1/n, selects and outputs data in the reception area of the frame corresponding to the connected external device. , a speed conversion circuit that multiplies the speed of data input from an external device by n, sets it in a corresponding transmission area, and generates converted data with other areas set to specific logical values; A conversion circuit that generates new input data in which the transmission area corresponding to the connected external device in the frame received from the network has a specific logical value, and the new input data generated by this conversion circuit and speed conversion. Since it is equipped with an AND circuit that takes the AND of the conversion data generated by the circuit,
As a result, more areas are provided within the frame for data transmission and reception, which allows normal branching services to be performed even when used in a ring-type LAN, and has the effect of not requiring complicated circuits. be.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the branch circuit of the present invention, FIG. 2 is an explanatory diagram of the operation of the branch circuit of the present invention,
Figure 3 is a diagram showing the frame configuration used in this invention, Figure 4 is a diagram showing the frame configuration used in this invention.
Figure 5 is a block diagram showing a conventional branch circuit, Figure 5 is a diagram showing the contents of the branch circuit in Figure 4, Figure 6 is a frame diagram of data flowing through a high-speed digital line, and Figure 7 is a diagram of a conventional device. FIG. 8 is an explanatory diagram of the operation when the conventional device is applied to a ring type LAN. In the figure, 1. la, 1b, lc are branch circuits, 2 is A
ND circuit, 3 is a control circuit, 4 is a memory, 5 is an OR circuit,
6 is a speed conversion circuit, 7 is input data from the outside, 8 is L
Input data from AN, 9 is output data to LAN, 1
0 is output data to the outside, 11 is a control signal, 12 is new input data, and 13 is conversion data. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] In a branch circuit connected between a digital line network where data communication is performed by sending and receiving frames and external equipment,
The speed of frames received from the network is reduced to 1/n, data in the reception area of the frame corresponding to the connected external device is selected and output, and data input from the external device is a speed conversion circuit that multiplies the speed by n, sets it in the corresponding transmission area, and generates conversion data with other areas set to specific logical values; A conversion circuit that generates new input data with a transmission area corresponding to an external device set to a specific logical value, the new input data generated by this conversion circuit, and the logic of the conversion data generated by the speed conversion circuit. A branch circuit comprising an AND circuit that takes a product.