JPH03236975A - Printing controller - Google Patents

Abstract

PURPOSE:To enable applying a character generator in the form of a vector character also to comparatively high speed printing by performing operations from reading the vector character generator of a microprocessor to writing in a temporary storage memory and transferring of data to the temporary storage memory and processing of the data simultaneously and in parallel. CONSTITUTION:A timing control circuit 14 is started by the signal(m) from a decoder circuit 15, generates a reading demand signal(o) out of control signals(f) to a temporary storage memory 3, generates a reading signal(p) when a reply signal(q) returns, generates a signal(r) to a register 9 and address counter 8, stores read data and updates a counted value. Data stored in the register 9 are supplied to an interpolation circuit 10 via signal(s) and reach an AND circuit 12 via signal(u) together with the output signal(t) of a net pattern memory 11. The timing control circuit 14 transmits a writing demand signal(v), a reply signal(x) and a writing signal(w) out of control signals(i) to and receives them from a page memory 5 and generates a signal(y) to an address counter 13 to update a counted value. These processes are conducted repeatedly so that data for one character are transferred from the temporary storage memory 3 to the page memory 5.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a dot matrix type printing device, and in particular uses a so-called vector character generator that expresses the amount of movement of an outline surrounding a character using vectors or coordinates. The present invention relates to a printing control device that can be applied to a printing device.

[Conventional technology]

Conventionally, in this type of printing device, a microprocessor or a vector character generator was used to express only the outline of the character as "]" and once it was written into the page memory, the microprocessor read out the page memory and horizontally A method was used in which the part sandwiched between ``1'' in the direction or vertical direction was changed to ``11'' and rewritten.

[Problem to be solved by the invention] In the conventional method described above, many processes are performed by a microprocessor, and due to the performance limitations of the microprocessor and the inability of a single microprocessor to perform parallel processing, relatively high-speed processing is not possible. The problem with printing devices was that the printing speed was slow.

[Means to solve the problem]

The printing control device according to the present invention includes at least one character 1--
a temporary storage memory that has a capacity for 200 ms and can be read and written by the microprocessor; and a first address counter that can set an initial value from the microprocessor and generates a read address for the temporary storage memory. , a register that temporarily stores read data from the temporary storage memory, and N OR circuits that are connected to an N-bit register output signal and output a signal of NHI~, where the number of bits of the second register is N. N logical negation four paths,
The microprocessor is connected to an interpolation circuit composed of N AND circuits and one flip-flop, and has a capacity equivalent to the dot matrix size of at least one character, and is connected to the address signal, data signal, and memory write signal of the microprocessor. a net pattern memory which can be written to and has N output signals; N AND circuits connected to each of the interpolation circuit and the pattern memory with N output signals; and N logic circuits whose initial values can be set from a microprocessor. A second address counter generates an address signal when N output signals of the AND circuits are written to the page memory, and a second address counter generates a read request signal to the temporary memory memory and generates a response signal from the temporary memory memory. A read signal is generated to the temporary memory, the read data from the temporary memory is stored in the register, and the first output signal is counted up by +1.Next, when a write request signal to the page memory is received, N AND circuits are activated. Write the N-bit output signal and increase the second output signal by +1 count l-.

and a tecoder circuit connected to the address signal of the microprocessor and the I10 write signal and generating pulses to the first address counter, the second address counter, and the timing control circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings. FIG. 1 is a schematic block diagram of a circuit of an embodiment of a printing control device according to the present invention. The microprocessor 1, vector character generator 2, and temporary storage memory 3 are connected through the microprocessor's address signals H, a, data signal line b, and control signal line C, respectively. The generator 2 can read data, and data can be written to the temporary storage memory 3. The address signal line a, data signal line b, and control signal line C of the microprocessor 1 are also connected to a data transfer circuit 4, and the data transfer circuit 4 shown in FIG.
Internal address counter A+8, address counter A2
13. Write to the mesh pattern memory 11 and start data transfer. The temporary storage memory 3 and the data transfer circuit 4 are connected by the address signal line d, the data signal line e, and the control signal line f, and the data transfer circuit 4, the page memory 5, and the print data sending circuit 6 are connected by the address signal line g, the data signal line signal line h,
They are connected to each other by a control signal line i.

The microprocessor 1 reads the contents of the vector character generator 2 and writes the outline of the character as [1] in the temporary storage memory 3. FIG. 2(a) shows an example of the contents of the character generator 2, which shows the coordinates of the vertices of the line segment in FIG. 2(b). Data is stored in which the black part in Figure (1:) ) is represented as [1J, and the white part is represented as "0". On the other hand, the data transfer circuit 4 reads out the temporary memory 3 and makes the part surrounded by the outline of the read character "1-", that is, black, and then applies a mesh pattern specified by the microphone 17 and processor 1 and stores it in the page memory 5. . FIG. 2(C) shows a state where only the part surrounded by the outline of the character is colored 111, that is, black, and FIG. 2(d) shows the data stored in the page memory 5 shaded by the data transfer circuit 4. show. The data stored in the page memory 5 is transferred to the print data sending circuit 6.
The data is read out by the printer, sent to the printing mechanism section 7, and printed.

Next, details of the data transfer circuit 4 will be explained using FIG. 3. As shown in FIG. 3, the data transfer circuit 4 includes an address counter 8, a register, an interpolation circuit 10, a network pattern memory 11, an AND circuit 12, and an address counter 1.
3, a timing control circuit 14, and a decoder circuit 15.

The address signal line a of the microprocessor 1 is connected to the input terminal and the address input terminal of the network pattern memory 11, the data signal line is connected to the input terminal of the network pattern memory 11, and the memory write signal j of the control signal C is connected to the network pattern memory 11.
Decoder circuit 1 is connected to the input terminal of I10 for the write signal.
5 input terminals, respectively. Decoder circuit 15
The output signals I, m, and n of the address counter 8 and the timing control circuit 14 . Since the address counter 8 is connected to the address counter 13, the microprocessor 1 is connected to the address counter 8.
．． 13, or set the initial value to the timing control circuit 14.
It is possible to start. The microprocessor 1 can also write and store an arbitrary mesh pattern in the mesh pattern memory ↑1. On the other hand, the timing control circuit 14 operates at Tekota times &! 15, it generates a read request signal 0 among the control signals f to the temporary storage memory 3, and when the response signal q is returned, it generates a read signal p and sends a signal to the register 9 and the address counter 8. It generates r, stores the read data, and updates the count value. address counter 8
The output signal d of the register 9 and the input signal e of the register 9 are connected to the address signal and data signal of the temporary storage memory, respectively. The data stored in the register 9 in this way is supplied to the storage circuit 10 via the signal S, and is sent to the network pattern memory l1.
along with the output signal t of the AND circuit 12 via the signal 1.
reach. As shown in FIG. 4, if the register 9 has N hits, the interpolation circuit 10 consists of N logic homologs H@], 6, N logic NOT circuits] 7, and N AND circuits 8 and 1.
As shown in the figure, only the bits sandwiched between "1"s are converted into rlJ and output. In FIG. 2, the change from (b) to (C) is due to the function of the interpolation circuit 10, and the change from (c) to (d) is due to the function of the AND circuit 12. The character data shaded with an arbitrary mesh pattern in this way is stored in the page memory 5.
A data signal is generated to the data signal. Also address signal 13
The output signal of is connected to the address signal g of the page memory 5. Here, the timing control circuit 14 is the page memory 5.
The write request signal V, response signal X, and write signal W of the control signal 1 are transmitted and received between the control signal 1 and the address counter 13, and when the address counter 13 receives the signal y, the count value is updated. The above process is repeated to transfer data for one character from the temporary storage memory 3 to the page memory 5. By similarly transferring data for several more characters, data for one page is stored in the page memory 5.

〔Effect of the invention〕

As explained above, in the printing control device 0 according to the present invention, it is possible to simultaneously parallelize the operations from reading the vector character generator of the microprocessor to writing to the temporary storage memory, and the transfer and processing of data to the temporary storage memory. Furthermore, since the data processing itself is implemented in hardware, it has the effect of being able to generate print data at high speed, and the effect that vector character format character generators can be applied to printing devices that print at relatively high speeds. There is.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a circuit of an embodiment of the printing control device according to the present invention, and FIGS. 3 is a circuit diagram of the data transfer circuit of the print control device of FIG. 1, and FIG. 4 is a detailed circuit diagram of the interpolation circuit of the data transfer circuit of FIG. 3. DESCRIPTION OF SYMBOLS 1... Microprocessor, 2... Vector character generator, 3... Temporary storage memory, 4... Data transfer circuit, 5... Page memory, 6... Print data sending circuit, 7... Printing Mechanism section, 8...Address counter Al, 9...Register, 10...Interpolation circuit,
11... Net pattern memory, 12... AND circuit,
]3 address counter A2. 14...timing control circuit, 15...tecoder circuit, 16...OR circuit, 17.logic NOT circuit, 18..AND circuit, 19.
·flip flop.

Claims (1)

[Scope of Claims] A vector character generator that indicates the amount of movement of an outline surrounding a character as a vector or coordinates, a page memory having a capacity of at least one screen of printing paper, and vector information read from the vector character generator. A microprocessor that interprets and writes an outline surrounding the character into the page memory and then writes an area surrounded by the outline surrounding the character, and a print data sending circuit that reads the page memory and sends it to the printing mechanism section. In the printing control device, the temporary storage memory has a capacity equivalent to the dot matrix size of at least one character and can be read and written by the microprocessor, and the temporary storage memory can be set with an initial value from the microprocessor. a first address counter that generates an address;
a register for temporarily storing read data from the temporary storage memory; an interpolation circuit for receiving the output signal of the register; and an address signal, data signal, and memory of the microprocessor having a capacity equivalent to the dot matrix size of at least one character. A mesh pattern memory to which a write signal is connected and is writable from the microprocessor, a logic circuit to which each output signal of the interpolation circuit and the mesh pattern memory is connected, and an output signal of the logic circuit is written to the page memory. a second address counter that generates an address signal when a response signal is received from the temporary memory; and a second address counter that generates a read signal to the temporary memory and stores read data from the temporary memory in the register; changes the content of the address counter of the page memory, generates a write request signal to the page memory, and upon receiving a response signal from the page memory, generates a write signal to the page memory to write the output signal of the logic circuit to the page memory. a timing control circuit for changing the contents of the second address counter; and an address signal of the microprocessor;
1. A print control device comprising: a decoder circuit to which a /O write signal is connected and which generates a pulse to the first address counter, the second address counter, and the timing control circuit.