JPH03227105A - Offset adjustment circuit for operational amplifier - Google Patents

Abstract

PURPOSE:To realize an offset adjustment circuit not subjected to the effect of a temperature change and precluding the possibility of unbalancing differential balance by varying a DC current in a couple of current source circuits provided with a couple of resistors and a couple of bias circuits. CONSTITUTION:When nothing is connected to a connection mid-point S (terminal pin T4) between voltage division resistors R5, R6 and resistance values r3, r4 of resistors R3, R4 are selected equal, emitter currents I3, I4 of transistors(TRs) Q7, Q10 are made equal to each other. Since a term of a base-emitter voltage VBE is not included in equation representing the current, even when the voltage VBE is changed due to temperature, both the currents are unchanged. Furthermore, even when the resistance values of resistors R1-R6 changes due to temperature, since they are formed in an IC, the combined resistance is unchanged. A voltage VS at the midpoint S is varied by a variable resistor R9 and a base voltage of the TRQ10 is changed, then the current I4 is changed. Thus, emitter currents I3, I4 of the TRs Q7, Q10 are increased in terms of gain by current mirrors 4, 5 based on an offset adjustment range to obtain adjustment currents I1, I2.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides an offset adjustment circuit for an operational amplifier that includes a constant current circuit connected to a transmitter and a load resistor connected to each collector of a pair of differential transistors. a pair of current source circuits that supply different direct currents to each load resistor of the differential transistor, and variable means for varying the direct current of at least one of the pair of current source circuits. The pair of current source circuits includes a pair of resistors having the same resistance value, a pair of transistors connected in series to the pair of resistors, and a base bias applied to each pair of transistors based on a reference voltage from a reference voltage source. By comprising a pair of bias circuits that apply voltage,
It is not easily affected by temperature changes, and there is no risk of disrupting the differential balance.

[Conventional technology]

In a DC amplifier circuit using an operational amplifier, the offset of the operational amplifier becomes a problem in the first stage amplifier circuit in an IC.

There are roughly two methods for adjusting the offset of an operational amplifier. One method is to adjust the emitter current of a transistor in a current mirror circuit that serves as an active load for the differential transistors that make up an operational amplifier, and the other method is to add a voltage that requires offset adjustment to the input signal. It's a method.

First, an operational amplifier to which the former method is applied will be described with reference to FIG. (2) indicates an operational amplifier,
This is formed as a part of the IC.

Further, T, ˜T, indicate the bin of the IC. QIIQ12
indicates a PNP type differential transistor, each emitter of which is connected to the positive power source 1B through a constant current circuit (8) and pin T7.
connected to. Each base of the transistor Q + + +Qlz is connected to an input terminal pin TI, T2, respectively, and each collector is a load (11), which will be described later.

Diode-connected NPN transistor Q + 3 and NP of current mirror circuit (7) constituting (12)
They are connected to the respective collectors of N-type transistors Q + a. Also, the collector of the transistor Q + t is connected to the output terminal pin T.

Each transistor Q of the current mirror circuit (7), 3°Q
Each emitter of +4 is connected to the negative power supply -B through resistors R7, R and bin T3, respectively. The transistor Q+3 and the resistor R1 constitute the load (11) of the transistor Q, and the transistor Q14
and resistor R9, the load of transistor Q, □ (
12) is constructed.

R9 is a variable resistor (potentiometer) for offset adjustment, which is an external component, and both ends of it are connected to pin T4,
Through T b, transistor Q r 3r Q +
4, and its movable terminal is resisted to the negative power supply -B.

In such an operational amplifier, the transistor Q + + +Q
Since the loads (11) and (12) of , 2 are active loads, that is, current mirror circuits (7), when there is no signal, the transistor Q + + + Q +
If one of the collector potentials of z increases or decreases, the other also increases or decreases, and both collector potentials become equal, so VIIE of transistor Q + I + Q + z
If they are equal, no offset occurs.

However, the transistor base-emitter voltage v1 is (where k is Boltzmann's constant and q is the electron charge.

■ is the emitter potential and IEO is the reverse saturation potential), so the transistor Q + + + Q +
In z, if any of T, IE, or IEO is different, each of the 1's will also be different.

Therefore, the input terminal bin T3. By adjusting the variable resistor R1, the transistor Q
+31 Adjust the emitter current of Q +4.

Next, referring to FIGS. 3A and 3B, an explanation will be given of an amplifier circuit using an operational amplifier in which the latter adjustment method is applied.

(2) shows an operational amplifier in the IC similar to that described in FIG. 2 above.

An input resistor RI3 is connected to an inverting input terminal pin T2 of the operational amplifier (2), and an input resistor R14 is connected to its non-inverting input terminal pin T. Further, a feedback resistor RI2 is connected between the inverting input terminal pin T2 and the output terminal bin 16, and a grounding resistor RIS is connected between the non-inverting input terminal pin T and ground.

Then, a variable resistor (potentiometer) R, , is connected between the positive power supply 1B and the negative power supply -3, and its movable terminal is connected through the resistor RII to the inverting input terminal pin T2 in FIG. 3A.
In FIG. 3B, they are connected to the non-inverting input terminal pin T, respectively, and a DC voltage that can vary between positive and negative power supply voltages is superimposed on the input voltage.

Also in this case, the variable resistor RIo is varied to adjust the offset of the operational amplifier (2).

(Problems to be Solved by the Invention) By the way, in the operational amplifier described with reference to FIG. 2 above, equivalently, the resistors R, , R inside the IC.

, the resistance of the variable resistor R1 will be adjusted using the external variable resistor R1, so the following three conditions must be satisfied: the difference between the temperature characteristics of the IC-based operational amplifier and the temperature characteristics of the variable resistor R1; Even if the offset is set to 0 by adjusting the variable resistor R1 under a certain temperature condition, an offset will occur in the operational amplifier due to the difference in temperature after the power is turned on and changes in the air temperature due to changes in the above three conditions. Furthermore, in order to connect the external variable resistor R9 to the IC operational amplifier (2), two terminal pins T, , T, are required.

Furthermore, in the amplifier circuit described with reference to FIG. 3 above, the voltage added to the input voltage to cancel the offset of the operational amplifier (2) increases (
fluctuate. Also, the peripheral resistor RI of the operational amplifier (2)!
'= If RI S is provided in the IC, the resistor R,,1
Yo these resistors RI Z - RI! If you don't use a resistor larger than +, the adjustment sensitivity will be too high.
It cannot be provided within the IC. Also, this resistor R11
If it is connected externally, an offset will occur due to temperature changes. Furthermore, when a DC voltage is superimposed on the input signal in this way, there is a risk that the differential balance of the operational amplifier (2) will be disrupted.

In view of this, the present invention is not easily affected by temperature changes,
This paper attempts to propose an offset adjustment circuit for an operational amplifier that does not cause the risk of disrupting the differential balance.

[Means to solve the problem]

The present invention provides a pair of differential transistors Q II + Q r
z, a constant current circuit (8) connected to each emitter thereof, and a -pair of differential transistors Q, QI! An operational amplifier (
2), a pair of current source circuits (5A) and (5B) that supply different DC currents to each load resistor R7, Rs of the differential transistor Q + + * Q lz, and the pair of current sources The pair of current source circuits (5^) and (5B) include a pair of resistors R2+R4 with equal resistance values, A pair of transistors Q,,Q, are connected in series to the pair of resistors,R,,R,. and a reference voltage source (10
), a pair of bias circuits BK, , BK, which respectively apply base bias voltages based on reference voltages from .

[Effect]

According to the present invention described above, a pair of resistors R3+R4 having the same resistance value, and a pair of transistors Q? connected in series to the pair of resistors Rs and Ra. ,Q. and its pair of transistors Q? A pair of bias circuits BK each apply a base bias voltage to the 1QI11 based on a reference voltage from a reference voltage source (10).

A pair of current source circuits (5^) comprising BKb,
Variable means R1 for at least one direct current of (5B)
Adjust the offset by varying the .

〔Example〕

Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG. 1. Parts corresponding to the operational amplifier (2) described in FIG. Duplicate explanations will be omitted. In this example, the operational amplifier (2)
An offset adjustment circuit (1) is formed in an IC having an offset adjustment circuit (1). This offset adjustment circuit (1) will be explained below.

(3) is a diode-connected NPN transistor Q.

and NPNPN type transistor Q, the collector of transistor Q is connected to positive power supply element B via a constant current source (9) and terminal pin T, and its emitter is a diode-connected PNP It is connected to the negative power supply -B through the emitter and collector of the PNP transistor Q2, the emitter and collector of the PNP transistor Q2, and the terminal pin T3. And transistor Q4
The collector of is connected to the positive power supply element B through the terminal pin T, and its emitter is connected to the current mirror circuit (4), which will be described later.
) and (5), each transistor Qs, Q6 and Q, ,Q
.

are commonly connected to each emitter of the

(10) is a reference voltage source consisting of a constant voltage power supply with good temperature characteristics consisting of a bandgap reference circuit, whose positive terminal is connected to the base of transistor Q1, and its negative terminal is connected to negative power supply -B through terminal pin T. There is. Further, the positive terminal of this reference voltage source (10) is connected through the terminal pin T,
One electrode is connected to the other electrode of a grounded capacitor C.

(5A) and (5B) are current source circuits having current mirror circuits (4) and (5), respectively, where the current mirror circuit (4) includes a diode-connected PNP transistor Q,
The current mirror circuit (5) is composed of a diode-connected PNPNP transistor Q and a PNP transistor Q. Diode-connected transistor Q6 of these current mirror circuits (4) and (5). Q, are resistors R3,
PNP through n=) transistor Qf+Q+.

are connected to each emitter of these transistors Q
? Each collector of +Q Io is connected to the negative power supply -B through a terminal pin T3. On the other hand, transistor Q6 of the current mirror circuits (4) and (5). Each collector of Q is connected to a current mirror circuit (7) of an operational amplifier (2).
) configuring the transistor Q + 31 Q + <
are connected to each emitter of the

The reference voltage V raf from this reference voltage source (10) is
For example, 1/
2, the voltage is divided into transistors Q,,Q,. is applied as a bias voltage to the base of

Further, the base of the transistor Q + o is connected to a movable terminal of an external offset adjustment variable resistor (potentiometer) R9 through a terminal pin T4. One end of this variable resistor R1 is connected to the above-mentioned terminal pin T6, and the other end is grounded.

The above-mentioned operational amplifier (2) and its offset adjustment circuit (
1) The base-emitter voltage of each transistor is ■1
and between each voltage dividing resistor R1 and R2 and between R9 and R6.
Let the potentials of the connection midpoints R and S between them be V, ,V, respectively, and the transistors Q, ,Q,. Each emitter current of 1. ．．
1. The collector currents of the transistors Q, ,Q, of the current mirror circuits (4) and (5) are respectively I, 1. Let the resistance value of each resistor R7 (n-1, 2,...) be rfi (n=1.2...,), and point A (emitter of transistor Q4) shown in the figure. Potential V8 can be expressed as follows.

V, = V, + I 3 r 3+ 2 V! I! =V
, +14r4+2V,, -... (1) and,
Since the potential V at point A is equal to the potential of transistor Q3, if the base-emitter voltage of transistors Q, .

Vm”Vraf±2■, ...(2) Therefore, it can be seen that V, +I3r, and ■, +l4r4 in the above formula (1) are each equal to the reference voltage V r'llf of the reference voltage source (10). .

Next, by voltage dividing resistors R, , R, and assuming that the potential ■1 of their connection midpoint R is V, = (1/2) V r, , voltage dividing resistors R+, Rz and Rs, The resistance value of Rh is rl+r2 and r3. If rb are equal, then
If rl=r2=ry and r5=rb=r, then transistor Q? The emitter currents 13 and 14 of IQIO can be respectively expressed as follows.

1:+=Lar/2 r3 −・−(3)I
a −V r+it/ 2 r 4 ・
...(4) Then, when nothing is connected to the connection midpoint S of the voltage dividing resistors R5 and R, that is, the terminal bin T4, if the resistance values r3+r4 of the resistors R3 and R4 are made equal, then ,transistor Q,,Q,. Emitter current of 13+I4
are equal to each other. And these currents 1ff+■4
The equation does not include the term ■BE of the transistor, so even if ■ changes with temperature, the current 13. I4 remains unchanged. Also, the resistance value r+””r of resistors R3 to R6
, change with temperature, since they are formed within the IC, the resistance value r.

There is no difference in the fact that ~r6 are equal.

Here, for example, the voltage 5 at the connection midpoint S of the voltage dividing resistors R and R6 is varied by the variable resistor R1, and the transistor QI
By changing the base voltage of 0 in the range of O to Vref, the emitter current I4 of the transistor Q10 changes in the range of 0 to Vrer/ry. Therefore, these transistors Q? IQIO emitter current 1. ．． 1. Based on the offset adjustment range, the current mirror circuits (4) and (5) apply a gain to the adjustment current I, 1. get.

As is clear from the above explanation, the entire offset adjustment circuit (1), except for the variable resistor R9 and the capacitor C, is formed in an IC having an operational amplifier (2).
There is no possibility that the offset adjustment will degrade the gain balance with respect to the input signal. Also, the external variable resistor R9
Only the terminal pin T is added for the connection of the capacitor C, and the other external terminal pins also serve as the terminal T6 for the capacitor C, so the reference voltage V of the reference voltage source (10) can be used for another purpose. r
Even when *f is output or when multiple circuits, ie, multiple operational amplifiers (2) described above, are integrated into the same IC, there is an advantage that fewer pin terminals are required.

In addition, in the above-mentioned operational amplifier (2) and its offset adjustment circuit (1), when the adjustment range of offset adjustment is narrow, for example, current mirror circuits (3) and (4).

Either a resistor can be inserted into each emitter of the transistors Q, , Q, , Q in (5), or the emitter area can be changed.

According to the embodiments described above, the operational amplifier load (11).

As for (12), although %x has been described in the case of an active load using a current mirror circuit, a resistor load may also be used.

〔Effect of the invention〕

According to the present invention described above, a base bias voltage is applied to a pair of resistors having equal resistance values, a pair of transistors connected in series to the pair of resistors, and a pair of transistors based on a reference voltage from a reference voltage source, respectively. Since the DC current of at least one of the pair of current source circuits comprising a pair of bias circuits is varied by the variable means, changes in the offset value due to temperature changes after offset adjustment are reduced, and changes in the offset value due to temperature changes after offset adjustment are reduced. There is no risk that the differential balance of the operational amplifier will be disrupted.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional example, and FIG. 3 is a circuit diagram showing another conventional example. (1) is an offset adjustment circuit, (2) is an operational amplifier, (
5^), (5B) is the current source circuit, (3), (4),
(5) and (7) are current mirror circuits, BK, , respectively.
BK is a bias circuit, (8) is a constant current circuit, (10)
is the reference voltage source, (11). (12) is a load, Q + r + Q + 3 is a differential transistor, Q ls + Q Ia is a transistor, R9 is a variable resistor, and R1-R8 are resistors. Agent Hidemori Matsukuma

Claims (1)

[Scope of Claims] An operational amplifier comprising a pair of differential transistors, a constant current circuit connected to each emitter thereof, and a load resistor connected to each collector of the pair of differential transistors; The pair of current source circuits includes a pair of current source circuits that supply different DC currents to each load resistor, and variable means that varies the DC current of at least one of the pair of current source circuits. , a pair of resistors with equal resistance values, a pair of transistors connected in series to the pair of resistors, and a pair of bias circuits that apply base bias voltages to the pair of transistors based on a reference voltage from a reference voltage source, respectively. An offset adjustment circuit for an operational amplifier, comprising: