JPH03273704A - Amplifier - Google Patents
AmplifierInfo
- Publication number
- JPH03273704A JPH03273704A JP2073102A JP7310290A JPH03273704A JP H03273704 A JPH03273704 A JP H03273704A JP 2073102 A JP2073102 A JP 2073102A JP 7310290 A JP7310290 A JP 7310290A JP H03273704 A JPH03273704 A JP H03273704A
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- current source
- terminal
- output
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 5
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は増幅器の入力オフセット電圧補償回路の改良
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in an input offset voltage compensation circuit for an amplifier.
［従来の技術］
第２図は例えば電子通信学会技術研究報告Ｃ３８３−１
７５４００Ｍｂ／ｓ集積化海底光中継器の試作に示され
た従来の増幅器を用いた光受信器の構成の一部を示すブ
ロック図であり１図において、 （１５）は従来の増幅
器、 （１６）〜（２０）は従来の増幅器の構成を示す
各ブロックであり、 （１６）は前置増幅器。[Prior art] Figure 2 shows, for example, the Technical Research Report C383-1 of the Institute of Electronics and Communication Engineers.
This is a block diagram showing part of the configuration of an optical receiver using a conventional amplifier shown in the prototype of a 75,400 Mb/s integrated submarine optical repeater. In Figure 1, (15) is a conventional amplifier, (16) ~(20) are blocks showing the configuration of a conventional amplifier, and (16) is a preamplifier.
（１７）はＡＧＣ増幅器、 （１８）は後置増幅器、
（１９）はピーク値検出器、 （２０）はＤＣＣＣＣフ
ィードパ路。(17) is the AGC amplifier, (18) is the post-amplifier,
(19) is a peak value detector, (20) is a DCCCC feed path.
（２１）は受光素子である。(21) is a light receiving element.
第３図は従来の増幅器（１５）の動作を示す図である。FIG. 3 is a diagram showing the operation of the conventional amplifier (15).
次に動作について説明する。受光素子（２１）により２
値光信号が電気信号に変換され、前置増幅器［１６）、
ＡＧＣ増幅器（１７）、後置増幅器（１８） 、で増
幅され出力される。増幅器（１５）は直流結合形高利得
増幅器であるため、入力オフセット電圧も増幅される。Next, the operation will be explained. 2 by the light receiving element (21)
The value optical signal is converted into an electrical signal and a preamplifier [16],
The signal is amplified and output by an AGC amplifier (17) and a post-amplifier (18). Since the amplifier (15) is a DC coupled high gain amplifier, the input offset voltage is also amplified.
後置増幅器（１８）の正相及び逆相信号をピーク値検出
器（１９）でピーク値検出し２例えば第３図（ａ）に示
す様に逆相の正のピーク値と正相の負のピーク値の差が
所定の電圧より大きい場合、 ＤＣＣＣＣフィードパ路
（２０）がピーク値の差が小さくなる様、前置増幅器（
１６）を制御する。よって第３図（ｂ）に示す様に、ピ
ーク値の差が所定の値とな（１）
（２）
一部）１
る。ピーク値の差が所定の電圧より小さい場合は逆の動
作となる。このようにして、入力オフセット電圧が生じ
ても、フィードバック回路により出力オフセット電圧が
生じない様補償される。The peak values of the positive phase and negative phase signals of the post-amplifier (18) are detected by the peak value detector (19). If the difference between the peak values of
16). Therefore, as shown in FIG. 3(b), the difference in peak values becomes a predetermined value (1) (2) part)1. If the difference in peak values is smaller than the predetermined voltage, the opposite operation will occur. In this way, even if an input offset voltage occurs, the feedback circuit compensates so that an output offset voltage does not occur.
［発明が解決しようとする課題］
従来の増幅器は以上のように構成されているので９回路
規模が大きくなり、また、出力から入力へ帰環を掛けて
いることから安定性に欠けるという課題があった。[Problems to be Solved by the Invention] Since the conventional amplifier is configured as described above, the scale of the circuit is large, and there is also a problem of lack of stability because a loop is applied from the output to the input. there were.
この発明は上記のような課題を解決するためになされた
もので、簡単な構成で安定性の良い人力オフセット補償
回路を有する増幅器を得ることを目的としている。The present invention has been made to solve the above-mentioned problems, and aims to provide an amplifier having a simple configuration and a highly stable manual offset compensation circuit.
［課題を解決するための手段］
この発明による増幅器は、増幅器の正相及び逆相出力に
抵抗を介して電流源を接続し、抵抗と電流源の接続点に
直流増幅器の差動入力を接続し。[Means for Solving the Problems] The amplifier according to the present invention connects a current source to the positive-phase and negative-phase outputs of the amplifier via a resistor, and connects the differential input of the DC amplifier to the connection point between the resistor and the current source. death.
直流増幅器の出力を電流源の制御端子に接続したもので
ある。The output of the DC amplifier is connected to the control terminal of the current source.
［作用］
この発明における増幅器は、増幅器の出力部分で入力オ
フセット電圧の補償を行うため、簡単な構成で安定性の
良い動作をする。[Operation] The amplifier according to the present invention has a simple configuration and operates with good stability because input offset voltage is compensated for at the output portion of the amplifier.
［実施例］
第１図はこの発明の一実施例の構成を示す図であり、（
１）は正相及び逆相出力を有する直流結合兼増幅器、（
２）は直流結合兼増幅器（１）の入力端子、 Ｉ３）
、 （４）はそれぞれ直流結合兼増幅器（１）の正相出
力、及び逆相出力、 （５） 、 （６１はコレクタ接
地トランジスタで構成された低インピーダンス変換器、
（７） 、 （８）は抵抗、（９）は電流源。[Embodiment] FIG. 1 is a diagram showing the configuration of an embodiment of the present invention.
1) is a DC coupling/amplifier with positive phase and negative phase outputs, (
2) is the input terminal of the DC coupling/amplifier (1), I3)
, (4) are the positive phase output and negative phase output of the DC coupling/amplifier (1), respectively, (5) , (61 is a low impedance converter composed of a common collector transistor,
(7) and (8) are resistors, and (9) is a current source.
（１０）は制御入力端子（１１）を有するＭ流源、 ＋
１２）は直流増幅器、 （１３）、 （１４）は出力端
子である。(10) is an M flow source with a control input terminal (11), +
12) is a DC amplifier, and (13) and (14) are output terminals.
上記の様に構成された増幅器において、直流増幅器（１
）の入力端子（２）に人力された信号は、直流増幅器（
２）で増幅され、正相信号は低インピーダンス変換器（
５）、抵抗（７）を通って出力端子（１３）へ、逆相信
号は低インピーダンス変換器（６）、抵抗（８）を通っ
て出力端子（１４）へ出力される。In the amplifier configured as described above, a DC amplifier (1
The signal input to the input terminal (2) of the DC amplifier (
2), and the positive phase signal is amplified by a low impedance converter (
5) and the resistor (7) to the output terminal (13), and the negative phase signal passes through the low impedance converter (6) and the resistor (8) and is output to the output terminal (14).
ここで、直流結合兼増幅器（１）の正相出力（３）及び
逆相出力の電圧を、 Ｖ３． ｖ、とじＶ３− Ｖｏｃ
３＋ＶＡｃ ’・・・・・・・・ （１）Ｖ４ ＝
Ｖｏｃ４−Ｖｘ。 ・・・・・・・・・（２）と仮定
する。ただし＋ ■ＤＣ３＋ ＶＤＣ４は直流成分。Here, the voltages of the positive phase output (3) and negative phase output of the DC coupling/amplifier (1) are set to V3. v, binding V3-Voc
3+VAc'・・・・・・・・・(1)V4=
Voc4-Vx.・・・・・・・・・Assume (2). However, + ■DC3+ VDC4 is a DC component.
ＶＡＣは交流成分である。VAC is the alternating current component.
抵抗（７）及び（８）の抵抗値をそれぞれＲ，、Ｒ２゜
電流源（９）、及び（１０）（７）電流値をＩＩ、 Ｉ
２．低インピーダンス変換器（５） 、 （６）の電
圧降下値をＶＢＳ 、 ＶＢＳとすると、出力端子（１
３）、 （１４）（７）電圧Ｖ＋ｓ 、 Ｖ１４は
Ｖ１３ ＝ ＶＤｃ３ＶＢ５−ＩＩＲＩ＋ＶＡＣ−−（
３）Ｖ１４−ＶＤｏ４−ＶＢＳ １２Ｒ２−ＶＡＣ−−
（４）と表わされる。出力端子（１３）、 （１４）の
オフセット電圧が等しいとき。The resistance values of resistors (7) and (8) are R, R2°, and the current values of current sources (9) and (10) (7) are II and I, respectively.
2. If the voltage drop values of the low impedance converters (5) and (6) are VBS and VBS, then the output terminal (1
3), (14) (7) Voltage V+s, V14 is V13 = VDc3VB5-IIRI+VAC--(
3) V14-VDo4-VBS 12R2-VAC--
It is expressed as (4). When the offset voltages of output terminals (13) and (14) are equal.
Ｖｏｃ３ＶＢ５−１＋Ｒ＋ ” ＶＤＣ４ＶＢ６−Ｉ２
Ｒ２・・・・・・ （５）つまり。Voc3VB5-1+R+” VDC4VB6-I2
R2... (5) In other words.
出力端子（１３）、 （１４）と、電流源（１０）の制
御端子（１１１に接続された直流増幅器（１２）は、出
力端子（１４）の電圧が上がれば電流源（１０）の電流
を少なくする様に、出力端子（１４）の電圧が下がれば
逆の動作をする。つまり、出力端子、 （１３）と（１
４）のオフセット電圧が等しくなるように、言い換える
と。A DC amplifier (12) connected to the output terminals (13), (14) and the control terminal (111) of the current source (10) increases the current of the current source (10) when the voltage of the output terminal (14) increases. When the voltage at the output terminal (14) decreases, the opposite operation occurs.In other words, the output terminals (13) and (1)
In other words, so that the offset voltages of 4) are equal.
電流源（ｌＯ）の電流値が式（６）で示される値になる
様動作する。It operates so that the current value of the current source (lO) becomes the value shown by equation (6).
上記実施例では、直流増幅器（１）として入力の場合を
示したが、差動人力の場合でも、上記実施例と同様の効
果を有する。In the above embodiment, the case where the direct current amplifier (1) is an input is shown, but even in the case of differential manual power, the same effects as in the above embodiment can be obtained.
［発明の効果］
以上のように、この発明によれば、増幅器の正相及び逆
相出力に抵抗を介して電流源を接続し。[Effects of the Invention] As described above, according to the present invention, a current source is connected to the positive-phase and negative-phase outputs of an amplifier via a resistor.
抵抗と電流源の接続点に直流増幅器の差動入力を接続し
、直流増幅器の出力を電流源の制御端子に接続するよう
に構成したので１回路構成が簡単になり、安定性の良い
増幅器が得られる効果がある。The configuration is such that the differential input of the DC amplifier is connected to the connection point between the resistor and the current source, and the output of the DC amplifier is connected to the control terminal of the current source, simplifying the single circuit configuration and creating a highly stable amplifier. There are benefits to be gained.
第１図は、この発明の一実施例の構成を示す図、第２図
は従来の増幅器を用いた。光受信器の構成の一部を示す
ブロック図、第３図は従来の増幅器の動作を示す図であ
る。
各図において、（１）は直流結合形増幅器。
（５） 、 （６）は低インビーグンス変換器、
（７） 。
（８）は抵抗、（９）は電流源、 （ｉｏ）は制御入力
端子付電流源、 （１２）は直流増幅器、 （１５）は
従来の増幅器、 （２１）は受光素子である。
（７）
７払抗
Ｉ４出力玄第子FIG. 1 shows the configuration of an embodiment of the present invention, and FIG. 2 uses a conventional amplifier. FIG. 3 is a block diagram showing part of the configuration of an optical receiver, and FIG. 3 is a diagram showing the operation of a conventional amplifier. In each figure, (1) is a DC coupled amplifier. (5) and (6) are low inbegence converters,
(7). (8) is a resistor, (9) is a current source, (io) is a current source with a control input terminal, (12) is a DC amplifier, (15) is a conventional amplifier, and (21) is a light receiving element. (7) 7-pay anti-I4 output Gendaiko
Claims (1)
流結合増幅器の一方の出力端に直列接続された低インピ
ーダンス変換回路、抵抗及び電流源と、他方の出力端に
直列接続された低インピーダンス変換回路、抵抗及び制
御端子を有する電流源と、差動入力端子が各々の抵抗と
電流源との接続点に接続され、出力端子が電流源の制御
端子に接続された直流増幅器とを備えた増幅器。A DC coupled amplifier having a positive phase output and a negative phase output, a low impedance conversion circuit, a resistor and a current source connected in series to one output end of the DC coupled amplifier, and a low impedance connected in series to the other output end of the DC coupled amplifier. A conversion circuit, a current source having a resistor and a control terminal, and a DC amplifier having a differential input terminal connected to a connection point between each resistor and the current source, and an output terminal connected to a control terminal of the current source. amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2073102A JP2508352B2 (en) | 1990-03-22 | 1990-03-22 | amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2073102A JP2508352B2 (en) | 1990-03-22 | 1990-03-22 | amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03273704A true JPH03273704A (en) | 1991-12-04 |
| JP2508352B2 JP2508352B2 (en) | 1996-06-19 |
Family
ID=13508620
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2073102A Expired - Lifetime JP2508352B2 (en) | 1990-03-22 | 1990-03-22 | amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2508352B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7298173B1 (en) | 2004-10-26 | 2007-11-20 | Marvell International Ltd. | Slew rate control circuit for small computer system interface (SCSI) differential driver |
| US7792434B2 (en) | 2005-09-07 | 2010-09-07 | Sumitomo Electric Industries, Ltd. | Optical receiver |
| USRE41831E1 (en) | 2000-05-23 | 2010-10-19 | Marvell International Ltd. | Class B driver |
| US8880017B1 (en) | 2000-07-31 | 2014-11-04 | Marvell International Ltd. | Active resistive summer for a transformer hybrid |
| TWI681621B (en) * | 2019-03-08 | 2020-01-01 | 瑞昱半導體股份有限公司 | Amplifier circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03227105A (en) * | 1990-01-31 | 1991-10-08 | Sony Corp | Offset adjustment circuit for operational amplifier |
-
1990
- 1990-03-22 JP JP2073102A patent/JP2508352B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03227105A (en) * | 1990-01-31 | 1991-10-08 | Sony Corp | Offset adjustment circuit for operational amplifier |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| USRE41831E1 (en) | 2000-05-23 | 2010-10-19 | Marvell International Ltd. | Class B driver |
| US8880017B1 (en) | 2000-07-31 | 2014-11-04 | Marvell International Ltd. | Active resistive summer for a transformer hybrid |
| US7298173B1 (en) | 2004-10-26 | 2007-11-20 | Marvell International Ltd. | Slew rate control circuit for small computer system interface (SCSI) differential driver |
| US7579873B1 (en) | 2004-10-26 | 2009-08-25 | Marvell International Ltd. | Slew rate control circuit for small computer system interface (SCSI) differential driver |
| US7719314B1 (en) | 2004-10-26 | 2010-05-18 | Marvell International Ltd. | Slew rate control circuit for small computer system interface (SCSI) differential driver |
| US7792434B2 (en) | 2005-09-07 | 2010-09-07 | Sumitomo Electric Industries, Ltd. | Optical receiver |
| TWI681621B (en) * | 2019-03-08 | 2020-01-01 | 瑞昱半導體股份有限公司 | Amplifier circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2508352B2 (en) | 1996-06-19 |
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