JPH03220932A - Transmission system with control information added to main signal therein - Google Patents

Abstract

PURPOSE:To save number of signal lines and to avoid malfunction by sending a multiplexed main signal of frame constitution sent between units while inter- unit connection information is inserted to a part other than a data part of a relevant frame. CONSTITUTION:Unit connection information is multiplexed on a main signal by a multiplexer circuit 41 and the result is sent. The main signal is multiplexed with frame constitution and a caption FP in figure is a frame pulse. A common clock CLK is distributed in the system and a prescribed number of clocks constitute one frame and units 10, 11 use the allocated frame to send the main signal and the unit connection information (address) is inserted to other parts than the data part of the allocated frame and the result is sent. Since the connection information is sent through a same signal line as that for the main signal in this way, one signal line is enough principally for an inter-unit connection table C. Since the connection information is apart timewise from the main signal (data), effect of the main signal is avoided and the possibility of malfunction is precluded.

Description

[Detailed Description of the Invention] [Summary of the Invention] Regarding the transmission method in which control information is added to the main signal, especially the transmission method of indirect branch information, the purpose of reducing the number of signal lines and avoiding malfunctions is to The configuration is such that the inter-unit connection information is inserted into a part other than the data part of the relevant frame in the main signal having a multiplexed frame structure to be transmitted.

[Industrial application field]

The present invention relates to a transmission system in which control information is added to a main signal, particularly to a transmission system for inter-unit connection information.

Generally, as the scale of a communication device increases, the hardware scale increases, from a one-package configuration to a one-unit configuration, and beyond an one-unit configuration to a multiple-unit configuration. In a multiple unit configuration, it is important which unit is connected to which of the multiple I10 terminals. The present invention relates to a transmission method for this connection information.

[Conventional technology]

There are many types of communication devices that have a configuration in which a signal input manually from the outside (referred to as a main signal) is processed in one unit, distributed to other units, and output to the outside. FIG. 8 shows an example of an evacuation device, where lO is a common unit, 11.
12 is an interface (IF) unit.

Necessary information is transmitted and received by connecting units with cables, but as the system grows, the number of inter-unit connection cables increases, and it is necessary to connect them correctly.

In the method in which addresses are attached to terminals, a worker connects a cable to the corresponding terminal, and uses a measuring device to check whether the cable is connected correctly through signals.

This method is a fixed type, so to speak, and the cables and their connection terminals correspond to one another. On the other hand, there are also floating types, in which case you can connect the cable to any terminal.
After the connection is made, the device recognizes which unit's connection cable is connected to which terminal, and thereafter processes based on that connection relationship. When there are a large number of connection cables, with a fixed type it takes time to find a terminal or cable to connect to, but with a floating type you can connect them at random, making the work easier and faster.

FIG. 9 shows an example of a floating type, in which the terminal TI of the common unit 10 is
Connecting cable C5 of unit 11 was connected to terminal T3, and connecting cable C2 of unit 12 was connected to the same terminal T3.Since it was decided to add unit 13 in this state, connect the connecting cable C3 to terminal T2. Indicates the state in which

To know this connection relationship, for example, the common unit 10 notifies the units 11, 12°, . . . of the addresses of the terminals TI+Tz, . A method is adopted in which the information is taken in from the IO and notified to the processing section 10a of the common section unit IO. Processing unit 10a
remembers this, and the signal at terminal TI is the output light (connector)
31, the signal at terminal T2 goes to output light 33...
Output (assuming that the corresponding response is correct).

[Problem to be solved by the invention]

In order to notify this terminal address, in the conventional method, the 10th
It is as shown in the figure. That is, a plurality of signal lines are inserted into the connection cable, and signal lines other than those for main signals are used for addresses. In this example, four signal lines in the cable are used for addresses, and addresses such as 1000 are transmitted.

Address bit I is H (high) level, bit O is L
(low) level, on the transmitting side, the bit 1 line is pulled up to the power supply, the bit O line is grounded, etc.

The receiving side detects these H and L levels and knows the address.

However, in this method of transmitting addresses using a plurality of signal lines, as the number of units and therefore the number of connection cables increases, the number of address bits increases and the number of required signal lines increases. That is, when there are 2' units, n signal lines are required (address 0 is left unconnected). Also, when the main signal is a multiplex signal, is there a multiplex signal and an address DC signal in the same cable? Therefore, crosstalk of multiplexed signals may affect the address DC signal, leading to a possibility of malfunction.

The present invention aims to improve these points, reduce the number of signal lines, and avoid malfunctions.

[Means to solve the problem]

As shown in FIG. 1, in the present invention, unit connection information is multiplexed with the main signal and transmitted. 41 is its multiplex circuit, and 43 is a separation circuit.

The main signal is multiplexed in a frame configuration, and the FP
is its frame pulse. A common clock CLK is distributed within the system, one frame is composed of a predetermined number of clocks, and each unit transmits a main signal using the assigned frame. The unit connection information (address) is inserted into a part other than the data part of the frame assigned to the unit and transmitted. 42 is the address (
A circuit (parallel-to-serial conversion circuit) that sends out (connection 1 information) at a predetermined timing using the clock CLK and frame pulse FP
, 44 is a circuit (serial/parallel conversion circuit) for extracting the sent address.

[Effect]

In this configuration, since the connection information is transmitted along the same signal line as the main signal, the inter-unit connection cable C only needs to be one signal line in principle. Furthermore, since the connection information is temporally separated from the main signal (data), it is not affected by the main signal and there is no risk of malfunction.

The conventional system requires n signal lines to distribute addresses and has the problem of signal crosstalk. In the transmission device, a common clock is distributed within the system, and the main signal is processed in synchronization with this clock CLK. The main signals are multiplexed to form one frame for each block, and a frame pulse exists at the beginning of each frame.

This state is shown in FIG. If address information is multiplexed and transmitted using this clock CLK and frame pulse FP, it can be transmitted over a single signal line, and since it is synchronized with the clock, there is no influence from the main signal. In addition, when a frame is generally configured, the main signal (
In addition to data, additional (control) information is also included in the frame. Therefore, part of this given information is the address (connection information) -
If so, it is easy to implement and change.

〔Example〕

FIG. 4 shows an embodiment of the present invention. In this example, 8 bits from the beginning of the frame are used for addresses, making it possible to define 255 addresses.

If the 8 bits for the address are previously set as empty bits (0 bit) when multiplexing the main signal, the multiplexing circuit 41 in FIG. 1 may be an OR gate.

The multiplex circuit 42 may be a parallel load, serial output shift register that outputs 8-bit addresses A0 to A7 from the FP for 8 clocks.

The separation circuit 43 on the receiving side separates 8 bits from the FP into the separation circuit 4.
Circuit 44 inputs 8 bits from circuit 43 serially and simultaneously outputs 8 bits in parallel as an address. A shift register is fine.

FIG. 5 shows an example in which the main signal line and the address signal line are separated. Since even n-bit addresses are transmitted serially, only one signal line is required. In this case as well, if the main signal is left with empty bits during the transmission period of the n-bit address, there will be no trouble due to crosstalk.

When transmitting multiplexed signals, the system increases the pin rate to include extra bits, and uses these extra bits for control/monitoring purposes. For example, if you put a specific pattern in these extra bits, the specific pattern will be detected/not detected and the transmission line will be normal/normal.
Anomalies can be monitored. The type and number of units are also transmitted using these extra bits. It is a good idea to use this extra hint for addresses.

The signal line between the units is as shown in Figure 6.
There are a signal line 11 from the unit IO to the unit IO, and a signal line 2□02 from the unit IO to the UNISO) 11, and if the reliability is further increased by duplication, the number becomes four. The address is transmitted from the common unit 10, received by each unit, and collected by the processing unit 30 to the common unit ■0.
It is appropriate to notify.

In the high-speed digital leased line, as shown in Fig. 7, the signal from the user is received by the IF unit 11, and the TSL unit 7)1
3 selects the destination and sends it through the IF unit 12. This unit
-11, 13, and 12, the above-mentioned floating type is adopted. This connection also uses the four-wire signal line method explained in Figure 6, and the four pairs of signal lines can be connected to any terminal (terminal group), but the four signal lines themselves must be connected as specified. There must be. The device shown in FIG. 7 inserts a specific pattern and address bits into the extra data.

[Effects of the Invention] As explained above, in the present invention, there is no need to transmit the information for identifying the unit on a separate line as in the conventional case, and the main signal and the DC signal can be transmitted on the same signal line within the cable. There is no problem of crosstalk between lines due to transmission, and since the address is multiplexed into an empty focus in the multiplex format of the main signal, it has the advantage that it can be transmitted using a single line using clocks of the same phase.

[Brief explanation of drawings]

Fig. 1 is a diagram of the principle of the present invention, Fig. 2 is an explanatory diagram of the main signal of the frame configuration, Fig. 3 is an explanatory diagram of the configuration of one frame, Fig. 4 is a detailed explanatory diagram of the present invention, Fig. 5 6 is an explanatory diagram of an example of transmitting an address over a separate line, FIG. 6 is an explanatory diagram of inter-unit signal lines, FIG. 7 is an explanatory diagram of an object to which the present invention is applied, FIG. 8 is an explanatory diagram of a multiple unit configuration, and FIG. FIG. 10 is an explanatory diagram of a conventional inter-unit connection, and FIG. 10 is an explanatory diagram of a conventional address transmission system. In FIG. 1, 10 and 11 are units, C is a cable connecting them, 41 is a main signal and address multiplexing circuit, and 43 is a separating circuit. Applicant: Fujitsu Limited

Claims (1)

[Claims] 1. Adding control information to the main signal, which is characterized by inserting inter-unit connection information into a part other than the data part of the frame and transmitting the main signal with a multiplexed frame structure, which is transmitted between units. transmission method.