JPH0321095A - Manufacturing method for large electric current circuit substrate - Google Patents

Manufacturing method for large electric current circuit substrate

Info

Publication number
JPH0321095A
JPH0321095A JP15447289A JP15447289A JPH0321095A JP H0321095 A JPH0321095 A JP H0321095A JP 15447289 A JP15447289 A JP 15447289A JP 15447289 A JP15447289 A JP 15447289A JP H0321095 A JPH0321095 A JP H0321095A
Authority
JP
Japan
Prior art keywords
circuit
punched
conductors
circuit pattern
current circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15447289A
Other languages
Japanese (ja)
Inventor
Kenzo Kobayashi
健造 小林
Hiroshi Yatabe
谷田部 博
Masaaki Yamamoto
雅章 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP15447289A priority Critical patent/JPH0321095A/en
Publication of JPH0321095A publication Critical patent/JPH0321095A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a large current circuit substrate where the positional accuracy of a circuit conductor is stabilized by allowing adjoining circuit conductors to form a punched circuit pattern connected with a narrow bridge, laminating the punched circuit pattern and a prepreg sheet, and heating and pressing them with a hot press. CONSTITUTION:A plurality of circuit conductors 12 are laid out at a specified position by punching work from a conductive metal sheet. Moreover, the adjoining circuit conductors 12 from a punched circuit pattern 13 connected with a narrow bridge 15. The punched circuit pattern 13 and a prepreg sheet 19 are laminated, heated and pressed with a hot press so as to produce an intermediate for a large electric current circuit substrate with the punched circuit pattern 13 embedded on the surface of an insulation substrate 11. After the above process is over, the bridge portion of the intermediate is cut off. As described above, the adjoining circuit conductors 12 are connected with the narrow bridge 15 and positioned when they are heated and pressed with the hot press. Therefore, they will not make any relative motion due to the fluidity of resin. It is, therefore, possible to produce the large current circuit substrate where the position of the circuit conductors is stabilized.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、大電流が流れる回路基板の製造方法に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a circuit board through which a large current flows.

〔従来技術〕[Prior art]

モーターの駆動電流など比較的大きな電流が流れる回路
基板では、断面積の大きい回路導体を使用する必要があ
る。このため従来の大電流回路基板は、適当な厚さの金
属板(銅板やアルご板など)から所要の回路パターンに
打抜加工された打抜回路導体を用い、これを絶縁基板上
に載置して一体化した構造を採用している(特開昭63
 − 237495号公報)。
Circuit boards that carry relatively large currents, such as motor drive currents, require the use of circuit conductors with large cross-sectional areas. For this reason, conventional high-current circuit boards use punched circuit conductors that are punched into the desired circuit pattern from a metal plate (copper plate, aluminum plate, etc.) of an appropriate thickness, and are mounted on an insulating substrate. It adopts an integrated structure (Japanese Patent Laid-Open No. 63
- Publication No. 237495).

〔課題〕〔assignment〕

しかし従来の大電流回路基板は、打抜回路導体を絶縁基
板に固定するのに、絶縁基板上に銅箔パターンを形成し
て、その上に打抜回路導体を半田付けするという方法を
とっているので、製造が面倒である。また比較的厚さの
厚い打抜回路導体が絶縁基板の表面からその厚さ分だけ
突出する形になるため、回路基板表面の凹凸が大きく、
ソルダーレジストの印刷や回路導体の多層化などが難し
いという問題がある。
However, conventional high-current circuit boards fix the stamped circuit conductor to the insulating board by forming a copper foil pattern on the insulating board and then soldering the stamped circuit conductor onto it. Therefore, manufacturing is troublesome. In addition, because the relatively thick punched circuit conductor protrudes from the surface of the insulating board by that thickness, the surface of the circuit board becomes uneven.
There are problems with printing solder resist and creating multiple layers of circuit conductors.

〔課題の解決手段とその作用〕[Means for solving problems and their effects]

これを解決するには、図−7 (al (blに示すよ
うに絶縁基板11に、金属板からの打抜加工により得ら
れた打抜回路導体12・を、その表面が絶縁基板11の
表面と一致するように埋め込み固定する構造にすること
か望ましい。種々の検討結果によると、このような構造
の大電流回路基板は、打抜回路導体とブリプレグシート
 (例えばガラスクロスにエボキシ樹脂を含浸させて半
硬化させたもの)を積層し、これをホソ1−プレスで加
熱、加圧することにより製造できることが確認された。
To solve this problem, a punched circuit conductor 12 obtained by punching a metal plate is placed on an insulating substrate 11 so that its surface is the same as the surface of the insulating substrate 11, as shown in FIG. It is desirable to have a structure in which the circuit board is embedded and fixed in a manner consistent with It was confirmed that the product could be produced by laminating the semi-cured materials and heating and pressurizing them using a press.

しかしこの方法で大電流回路基板を製造すると、ホット
プレスで加熱、加圧する際に、ブリプレグシートが軟化
して樹脂が加圧力で流動するため、それによって打抜回
路導体の移動が起こりやすく、打抜回路導体の位置精度
が安定しないという問題のあることが判明した。
However, when manufacturing high-current circuit boards using this method, when heated and pressurized with a hot press, the Bripreg sheet softens and the resin flows under the pressure, which tends to cause movement of the punched circuit conductors. It was found that there was a problem in that the positional accuracy of the punched circuit conductor was unstable.

本発明は、以上のような検副結果に基づいてなされたも
ので、導電性金属板からの打抜加工により複数の回路導
体が所定の位置に配置され、かつ隣合う回路導体が細い
ブリッジで連結された打抜回路パターンを形成し、この
打抜回路パターンとブリプレグシートを積層し、これを
ホットプレスで加熱、加圧して、絶縁基板面に打抜回路
パターンが埋め込まれた大電流回路基板の中間品を製造
した後、その中間品の上記ブリッジ部分を切断すること
を特徴とするものである。
The present invention was made based on the above-mentioned inspection results, and consists of a plurality of circuit conductors arranged at predetermined positions by punching from a conductive metal plate, and adjacent circuit conductors formed into thin bridges. Connected punched circuit patterns are formed, the punched circuit patterns and Bripreg sheets are laminated, and this is heated and pressurized with a hot press to create a high current circuit with the punched circuit patterns embedded in the insulating substrate surface. This method is characterized in that after manufacturing an intermediate product of the board, the bridge portion of the intermediate product is cut.

このようにすると、ホッ1〜プレスで加熱、加圧すると
きに、隣合う回路導体はブリッジで連結されて相互に位
置決めされた状態となっているので、樹脂の流動により
相対的に移動することがない。
In this way, when heating and pressurizing with the hot press, the adjacent circuit conductors are connected by the bridge and positioned relative to each other, so that they do not move relative to each other due to the flow of the resin. do not have.

各回路導体はボソ1・プレスのあとプリソジを切断する
ことにより独立したものとなる。したがって絶縁基板に
打抜加工された回路導体が埋め込まれていて、しかも回
路導体の位置が安定した大電流回路基板が製造できるこ
とになる。
Each circuit conductor becomes independent by cutting the pre-press after pressing. Therefore, it is possible to manufacture a high current circuit board in which punched circuit conductors are embedded in an insulating substrate and the positions of the circuit conductors are stable.

〔実施例〕〔Example〕

以下、本発明の実施例を図面を参照して詳細に説明する
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

本発明では先ず、銅板からの打抜加工により打抜回路パ
ターンを形或する。その一例を図−1に示す。この打抜
回路パターン13は、四角い縁枠14内に複数の回路導
体12が所定の回路パターンを構或するように配置され
、隣合う回路導体12の間および周辺の回路導体12と
縁枠14の間が細いブリッジ15で連結された形になっ
ている。回路導体12には後にスルーホールを形戊する
部分に穴16が形成されている。
In the present invention, first, a punched circuit pattern is formed by punching a copper plate. An example is shown in Figure 1. In this punched circuit pattern 13, a plurality of circuit conductors 12 are arranged in a square frame 14 to form a predetermined circuit pattern, and the circuit conductors 12 and the frame 14 are arranged between adjacent circuit conductors 12 and around the circuit conductors 12 and the frame 14. They are connected by a narrow bridge 15 between them. A hole 16 is formed in the circuit conductor 12 at a portion where a through hole will be formed later.

この打抜回路パターン13は破線から破線までが1ユニ
ソトであり、紙面上下方向に連続する銅板に打抜加工に
より繰り返し形成される。縁枠14には打抜加工の際に
銅板を送るための送り穴17と、後の工程で打抜回路パ
ターンl3の位置決めに使用する位置決め穴18が形成
されている。
This punched circuit pattern 13 has one unidimensional pattern from broken line to broken line, and is repeatedly formed by punching on a continuous copper plate in the vertical direction of the paper. The edge frame 14 is formed with a feed hole 17 for feeding the copper plate during punching, and a positioning hole 18 used for positioning the punched circuit pattern l3 in a later step.

なお縁枠14は必要に応し設けられるもので、省略する
ことも可能である。
Note that the edge frame 14 is provided as necessary and may be omitted.

次に、破線の部分で切断した1ユニソトの打抜回路パタ
ーン13を、図−2に示すように、プリプレグシート1
9上に積層する。この実施例では両面に打抜回路導体を
有する大電流回路基板を製造するため、ブリプレグシー
ト19の下にも別な打抜回路パターン13aを積層する
。ブリプレグシ−1・19はホットプレス後に必要な厚
さが得られる枚数だけ積層される。各ブリプレグシート
19にも予め位置決め穴21が形戊されている。打抜回
路パターン13とブリプレグシート19と打抜回路パタ
ーン13aとは位置決め穴18、2l、18aを一致さ
せて積層される。実際には位置決め穴18、21、18
aに位置決めピンが挿入されるのであるが、図示を省略
した。
Next, as shown in FIG.
Layer on top of 9. In this embodiment, in order to manufacture a high current circuit board having punched circuit conductors on both sides, another punched circuit pattern 13a is laminated under the Bripreg sheet 19. After hot pressing, Buri Pregusi-1 and 19 are laminated in such a number that the required thickness can be obtained. A positioning hole 21 is also formed in advance in each Buripreg sheet 19. The punched circuit pattern 13, the Bripreg sheet 19, and the punched circuit pattern 13a are laminated with the positioning holes 18, 2l, and 18a aligned. Actually positioning holes 18, 21, 18
A positioning pin is inserted at point a, but its illustration is omitted.

次に、上記のように積層したものをホットプレス22で
加熱、加圧する。するとブリプレグシート19がいった
ん軟化し、圧縮されて、回路導体12の周りの隙間を埋
め、その後硬化して図−3のような絶縁基板11となる
。このようにして絶縁基板l1の両面に打抜回路パター
ン13、13aが埋め込まれた大電流回路基板の中間品
23が得られる。図−4は得られた中間品23の平面図
である。回路導体12は、ホソトプレスにより加熱、加
圧される際、ブリッジ15により位置決めされているた
め、移動することがなく、位置精度の高いものとなる。
Next, the laminated structure as described above is heated and pressurized using a hot press 22. Then, the Bripreg sheet 19 is once softened and compressed to fill the gap around the circuit conductor 12, and then hardened to form the insulating substrate 11 as shown in FIG. 3. In this way, an intermediate product 23 of a high current circuit board is obtained in which the punched circuit patterns 13, 13a are embedded on both sides of the insulating substrate l1. FIG. 4 is a plan view of the obtained intermediate product 23. Since the circuit conductor 12 is positioned by the bridge 15 when heated and pressurized by the photopress, it does not move and has high positional accuracy.

なお絶縁基板11と打抜回路パターン13、13aとの
接着性を高めるためには、打抜回路パターン13、13
aの表面に予め黒化処理を施しておくとよい。
Note that in order to improve the adhesiveness between the insulating substrate 11 and the punched circuit patterns 13, 13a, the punched circuit patterns 13, 13
It is preferable to perform blackening treatment on the surface of a in advance.

次に、図−4の中間品23のブリッジ15の部分を図−
5のように打ち抜いてブリッジ15を切断する。
Next, the bridge 15 part of the intermediate product 23 in Figure 4 is shown in Figure 4.
Cut the bridge 15 by punching as shown in step 5.

24は打抜によりできた打抜穴である。ブリッジ15の
切断により各回路導体12ば独立したものとなり、大電
流回路基板25が完或する。
24 is a punched hole made by punching. By cutting the bridge 15, each circuit conductor 12 becomes independent, and the large current circuit board 25 is completed.

なおブリッジの切断は打抜ではなく切削により行うこと
も可能である。
Note that the bridge can also be cut by cutting instead of punching.

その後必要に応し、図−6に示すように上下の回路導体
12、12aを導通させる部分に、穴をあげ、内面メッ
キ26を施し、半田27を充填して、大電流を流せる導
通部を形成する。また電力用部品などを実装する部分に
は、穴をあけ、鍔付き円筒部品(ハトメのようなもの)
28を挿入して半田付けなどにより固定する。この円筒
部品28は鍔のない方の端部が大電流回路基板25の表
面から僅かに突出するようにしておくと、電力用部品の
脚部をそこに挿入してネジで締付け固定する場合に、回
路基板25に締付け力がかからなくなり、回路基板25
の損傷を防止できる。
After that, if necessary, as shown in Figure 6, a hole is drilled in the part where the upper and lower circuit conductors 12, 12a are to be electrically conductive, the inner surface is plated 26, and the solder 27 is filled to form a conductive part through which a large current can flow. Form. In addition, holes are made in the parts where power components are mounted, and cylindrical parts with flanges (like eyelets) are installed.
28 and fix it by soldering or the like. The end of this cylindrical component 28 without a flange should protrude slightly from the surface of the high current circuit board 25, so that when the leg of the power component is inserted there and tightened with screws, , the tightening force is no longer applied to the circuit board 25, and the circuit board 25
damage can be prevented.

以上の実施例では絶縁基板の両面に打抜回路パターンを
設ける場合を説明したが、打抜回路パターンは絶縁基板
の片面のみに設ける場合もある。
In the above embodiments, the punched circuit pattern is provided on both sides of the insulating substrate, but the punched circuit pattern may be provided only on one side of the insulated substrate.

その場合は、絶縁基板の反対側の面に銅箔を張り付け、
その銅箔をシールド層として使用したり、パターンエッ
チングして信号回路パターンを形成したりすることもで
きる。
In that case, paste copper foil on the opposite side of the insulating board,
The copper foil can also be used as a shield layer or pattern-etched to form a signal circuit pattern.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、比較的厚肉の回路
導体が絶縁基板面に埋め込まれた大電流回路基板をホッ
トプレスという比較的簡単な手段により製造することが
でき、しかもホットプレスにより加熱、加圧する際、各
回路導体はブリッジにより連結されて位置決めされてい
るため、樹脂の流動により移動することがなく、回路導
体の位置精度が高い大電流回路基板を製造できるという
利点がある。
As explained above, according to the present invention, a high current circuit board in which relatively thick circuit conductors are embedded in the insulating substrate surface can be manufactured by a relatively simple means of hot pressing. When heating and pressurizing, each circuit conductor is connected and positioned by a bridge, so it does not move due to resin flow, and there is an advantage that a high current circuit board with high positional accuracy of the circuit conductor can be manufactured.

【図面の簡単な説明】[Brief explanation of the drawing]

図−1ないし図−6は本発明に係る大電流回路基板の製
造方法の一実施例を示すもので、図−1は打抜回路パタ
ーンの一例を示す平面図、図−2はホットプレスによる
加圧前の断面図、図−3は加圧後の断面図、図−4はホ
ットプレスにより得られた大電流回路基板中間品の平面
図、図−5は製造された大電流回路基板の平面図、図−
6は大電流回路基板に後加工を施した状態の断面図、図
7(a)は大電流回路基板の一例を示す平面図、同図(
blは(alの■−■線断面図である。 11:絶縁基板、12:回路導体、13:打抜回路パタ
ーン、14:縁枠、15:ブリッジ、18:位置決め穴
、l9:プリプレグシート、21:位置決め穴、22:
ホソトプレス、23:大電流回路基板の中間品、24:
打抜穴、25:大電流回路基板。 図 図−3 8a 4a どd 4a 6a 図−4 図 5
Figures 1 to 6 show an embodiment of the method for manufacturing a large current circuit board according to the present invention. Figure 1 is a plan view showing an example of a punched circuit pattern, and Figure 2 is a hot press method. Figure 3 is a cross-sectional view before pressing, Figure 4 is a plan view of the intermediate high-current circuit board obtained by hot pressing, and Figure 5 is a cross-sectional view of the manufactured high-current circuit board. Floor plan, diagram-
6 is a cross-sectional view of a large current circuit board after post-processing, FIG. 7(a) is a plan view showing an example of a large current circuit board, and FIG.
bl is a sectional view taken along the line ■-■ of (al). 11: insulating substrate, 12: circuit conductor, 13: punched circuit pattern, 14: edge frame, 15: bridge, 18: positioning hole, l9: prepreg sheet, 21: Positioning hole, 22:
Hosoto Press, 23: Intermediate products for large current circuit boards, 24:
Punching hole, 25: large current circuit board. Figure-3 8a 4a Dod 4a 6a Figure-4 Figure 5

Claims (1)

【特許請求の範囲】[Claims] 1.導電性金属板からの打抜加工により複数の回路導体
が所定の位置に配置され、かつ隣合う回路導体が細いブ
リッジで連結された打抜回路パターンを形成し、この打
抜回路パターンとプリプレグシートを積層し、これをホ
ットプレスで加熱、加圧して、絶縁基板面に打抜回路パ
ターンが埋め込まれた大電流回路基板の中間品を製造し
た後、その中間品の上記ブリッジ部分を切断することを
特徴とする大電流回路基板の製造方法。
1. By punching a conductive metal plate, a punched circuit pattern is formed in which multiple circuit conductors are arranged at predetermined positions and adjacent circuit conductors are connected by thin bridges, and this punched circuit pattern and prepreg sheet are combined. are laminated and heated and pressurized with a hot press to produce an intermediate product of a high current circuit board with a punched circuit pattern embedded in the insulating substrate surface, and then the bridge portion of the intermediate product is cut. A method for manufacturing a large current circuit board characterized by:
JP15447289A 1989-06-19 1989-06-19 Manufacturing method for large electric current circuit substrate Pending JPH0321095A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15447289A JPH0321095A (en) 1989-06-19 1989-06-19 Manufacturing method for large electric current circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15447289A JPH0321095A (en) 1989-06-19 1989-06-19 Manufacturing method for large electric current circuit substrate

Publications (1)

Publication Number Publication Date
JPH0321095A true JPH0321095A (en) 1991-01-29

Family

ID=15584998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15447289A Pending JPH0321095A (en) 1989-06-19 1989-06-19 Manufacturing method for large electric current circuit substrate

Country Status (1)

Country Link
JP (1) JPH0321095A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03126073U (en) * 1990-04-03 1991-12-19
US5559818A (en) * 1994-03-24 1996-09-24 Sanyo Electric Co., Ltd. Semiconductor laser device
JPH0946007A (en) * 1995-08-02 1997-02-14 Mitsubishi Electric Corp Circuit board and its manufacture
EP0802711A2 (en) * 1996-04-19 1997-10-22 Matsushita Electric Industrial Co., Ltd. Wiring board and its manufacturing method
JP2011060800A (en) * 2009-09-07 2011-03-24 Shin Kobe Electric Mach Co Ltd Resin molded compact
JP5482791B2 (en) * 2009-07-27 2014-05-07 株式会社豊田自動織機 Wiring board and method for manufacturing wiring board
JP5488604B2 (en) * 2009-09-01 2014-05-14 株式会社豊田自動織機 Circuit board manufacturing method and circuit board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4846871A (en) * 1971-10-16 1973-07-04
JPS5591898A (en) * 1978-12-29 1980-07-11 Matsushita Electric Works Ltd Method of fabricating wired board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4846871A (en) * 1971-10-16 1973-07-04
JPS5591898A (en) * 1978-12-29 1980-07-11 Matsushita Electric Works Ltd Method of fabricating wired board

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03126073U (en) * 1990-04-03 1991-12-19
US5559818A (en) * 1994-03-24 1996-09-24 Sanyo Electric Co., Ltd. Semiconductor laser device
JPH0946007A (en) * 1995-08-02 1997-02-14 Mitsubishi Electric Corp Circuit board and its manufacture
EP0802711A2 (en) * 1996-04-19 1997-10-22 Matsushita Electric Industrial Co., Ltd. Wiring board and its manufacturing method
EP0802711A3 (en) * 1996-04-19 1999-08-18 Matsushita Electric Industrial Co., Ltd. Wiring board and its manufacturing method
JP5482791B2 (en) * 2009-07-27 2014-05-07 株式会社豊田自動織機 Wiring board and method for manufacturing wiring board
US9084371B2 (en) 2009-07-27 2015-07-14 Kabushiki Kaisha Toyota Jidoshokki Wiring substrate and manufacturing method for wiring substrate
JP5488604B2 (en) * 2009-09-01 2014-05-14 株式会社豊田自動織機 Circuit board manufacturing method and circuit board
KR101409343B1 (en) * 2009-09-01 2014-06-18 가부시키가이샤 도요다 지도숏키 Circuit board manufacturing method and circuit board
US8917495B2 (en) 2009-09-01 2014-12-23 Kabushiki Kaisha Toyota Jidoshokki Circuit board production method and circuit board
JP2011060800A (en) * 2009-09-07 2011-03-24 Shin Kobe Electric Mach Co Ltd Resin molded compact

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