JPH03198116A - Oscillation stabilizing circuit for microcomputer - Google Patents

Abstract

PURPOSE:To obtain a microcomputer that can respond to any oscillation circuits having a different time required for stabilization of oscillation by providing an oscillation control circuit and inhibiting the operation of a system clock generating circuit with the output of the oscillation control circuit for a period during which the oscillation of the oscillation circuit is started and stabilized. CONSTITUTION:A system clock generating circuit 3 produces a system clock for actuation of a microcomputer based on the oscillation output of an oscillation circuit 2. An oscillation control circuit 1 restarts the oscillation of the circuit 2 by an interruption factor. An inhibiting circuit 4 inhibits the operation of the circuit 3 with the output of the circuit 1 for a period during which the oscillation of the circuit 2 is started then stabilized. Thus it is possible to prevent the malfunction of the microcomputer even if the microcomputer is actuated based on the oscillation output of the circuit 2 having a long stable period of time of oscillation.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to an oscillation stabilizing circuit for a microcomputer.

(B) Conventional Technology Generally (2) Microcomputers operate using a system clock obtained from the oscillation output of an oscillation circuit. First, to stop the operation of the microcomputer, it is sufficient to stop the oscillation of the oscillation circuit, and when to operate the microcomputer, it is sufficient to start the oscillation of the oscillation circuit. However, in the latter case, since it takes a certain amount of time for the oscillation of the oscillation circuit to stabilize, the operation of the microcomputer must be prohibited until the oscillation of the oscillation circuit stabilizes. Therefore, in the past, a frequency dividing circuit (such as a T-F F series circuit) was provided at a frequency dividing stage corresponding to the period from the start of oscillation to stabilization of the oscillation circuit, and the oscillation output of the oscillation circuit was transferred to the frequency dividing circuit. When the frequency was divided by , and a frequency-divided output was obtained from the final stage of the frequency dividing circuit, it was determined that the oscillation of the oscillation circuit was stable, and the microcomputer was operated.

(c) Problems to be Solved by the Invention However, in the above-mentioned conventional technology, when the resonator of the oscillation circuit is connected to the outside of the microcomputer and the frequency dividing circuit is masked inside the microcomputer,
Since the microcomputer is configured to correspond one-to-one to the oscillation stabilization time of a predetermined oscillation circuit, it has the problem that it cannot support oscillation circuits (crystal resonators, ceramic resonators, etc.) with different oscillation stabilization times. there were. For example, when operating the microcomputer based on the oscillation output of an oscillation circuit that has an oscillation stabilization time longer than a set value, the microcomputer may start operating even though the oscillation of the oscillation circuit is unstable. There was a problem that this could cause malfunctions.

(d) Means for Solving the Problems The present invention has been made to solve the above-mentioned problems. a system clock generation circuit that generates a system clock for microcomputer operation; an oscillation control circuit that starts the oscillation of the oscillation circuit from a stopped state according to an interrupt factor; and a period of time from when the oscillation of the oscillation circuit starts until it becomes stable. , a prohibition circuit that prohibits the operation of the system clock generation circuit according to the output of the previous JC oscillation control circuit;
It is characterized by having the following.

(E) Effect According to the present invention, even if a microcomputer is operated based on the oscillation output of any oscillation circuit with different oscillation stabilization times, the oscillation of these oscillation circuits is started by a predetermined interrupt factor. The operation of the system clock generation circuit can be prohibited until the system clock is stabilized.

(f) Example The details of the present invention will be specifically explained with reference to the drawings.

The drawing is a block diagram illustrating the invention.

In the drawing, PGM is a signal of "1" that is generated based on program data in a ROM (not shown) when the operation of the microcomputer is stopped, and CLK is a clock signal that is generated in synchronization with the PGM signal. and
INT is an rlJ interrupt signal generated by a predetermined interrupt factor when starting the operation of the microcomputer. In the latch circuit (1), the signal PGM is applied to the L (latch) terminal, the clock signal CLK is applied to the C (clock) terminal, and the R(
The interrupt signal INT is applied to the (reset) terminal. From now on, when stopping the operation of the microcomputer, the Q (output) terminal of the latch circuit (1)
A control signal S of "1" is output, and a control signal S of "0" is output from the Q terminal of the latch circuit (1) when starting the operation of the microcomputer. Oscillation circuit (2
) is composed of a vibrator made of crystal, ceramic, etc. The oscillation circuit (2) stops oscillation in response to a control signal S of "1", starts oscillation in response to a control signal S of "0", and outputs an oscillation signal O8C. It is assumed that the vibrator is connected to the outside of the microcomputer. The system clock generation circuit (3) starts operating upon application of an over70-signal OF, which will be described later, and generates system clocks CP1 to CP9 for operating the microcomputer based on the transmission signal O5C. These system clocks CP1 to CP7 are generated sequentially with the same width, and are repeatedly generated in units of CP1 to CP1. The preset timer (4) prohibits the operation of the system clock generation circuit (3) for one period from the start of oscillation of the oscillation circuit (2) until it stabilizes. The preset timer (4) is preset with preset data of predetermined bits corresponding to the period from the start of oscillation to stabilization of the oscillation circuit (2) by software. The preset timer (4) stops operating in response to the control signal S of rlJ, starts operating in response to the control signal S of "0", and counts up in synchronization with the transmission signal O8C. That is, the oscillation circuit (2) and the preset timer (4) start operating at the same time. When the count-up data and preset data match, the preset timer (4) outputs the above-mentioned overflow signal OF.

When an interrupt signal INT such as an external interrupt occurs while the operation of the oscillation circuit (1) and the preset timer (4) is stopped by the control signal S of "l", the oscillation circuit (1) and the preset timer (4) is "0"
The operation is started by a control signal S. Oscillation circuit (1)
requires a certain amount of time from the start of oscillation to stabilization (approximately 500 msec for an oscillation circuit with a crystal resonator)
c, approximately 10 for an oscillation circuit with a ceramic resonator
ms e c), the preset timer (4) is preset with data corresponding to the period from the start of oscillation to stabilization of the oscillation circuit (1), so the system clock generation circuit (3) uses the preset timer The operation is prohibited until the overflow signal OF is generated from (4), that is, until the oscillation of the oscillation circuit (1) becomes stable. From this, if the oscillation of the oscillation circuit (1) is unstable, the operation of the microcomputer will definitely stop,
Inconveniences such as malfunctions that have conventionally occurred will be eliminated.

From the above, even when operating a microcomputer based on the oscillation output of any oscillation circuit with different oscillation stabilization times, preset data corresponding to the oscillation stabilization time of each oscillation circuit can be easily set using software. It is possible to provide a microcomputer that can be used with any oscillation circuit having a different oscillation stabilization time.

(G) Effects of the Invention According to the present invention, even when a microcomputer is operated based on the oscillation output of any oscillation circuit with different oscillation stabilization times, the oscillation of these oscillation circuits from the start until it becomes stable. , the operation of the system clock generation circuit can be prohibited. Therefore, it is possible to provide a microcomputer that can be used with any oscillation circuit having a different oscillation stabilization time.

[Brief explanation of drawings]

The drawing is a block diagram illustrating the invention. (1)...Latch circuit, (2)...Oscillation circuit, (3
)...System clock generation circuit, (4)...Preset timer

Claims (3)

[Claims] (1) In a microcomputer that operates based on the oscillation output of an oscillation circuit, a system clock generation circuit that generates a system clock for operating the microcomputer based on the oscillation output of the oscillation circuit; an oscillation control circuit that starts oscillation of the oscillation circuit from a stopped state; and a prohibition circuit that prohibits operation of the system clock generation circuit using an output of the oscillation control circuit during a period from when oscillation of the oscillation circuit starts until it becomes stable. A microcomputer oscillation stabilizing circuit characterized by: (2) Oscillation of the microcomputer according to claim (1), wherein the oscillation control circuit is a latch circuit that is reset by an interrupt factor, and the oscillation circuit and the inhibiting circuit are operated by the reset output of the latch circuit. stable circuit. (3) The prohibition circuit is preset with data indicating the period from the start of oscillation to stabilization of the oscillation circuit, starts counting by the reset output of the latch circuit, and synchronizes with the oscillation output of the oscillation circuit. 3. The oscillation stabilizing circuit for a microcomputer according to claim 2, wherein the circuit is a preset timer that performs counting, and operates a system clock generation circuit by outputting the preset data after counting.