JPH03185855A - Manufacture of lead frame - Google Patents
Manufacture of lead frameInfo
- Publication number
- JPH03185855A JPH03185855A JP32535189A JP32535189A JPH03185855A JP H03185855 A JPH03185855 A JP H03185855A JP 32535189 A JP32535189 A JP 32535189A JP 32535189 A JP32535189 A JP 32535189A JP H03185855 A JPH03185855 A JP H03185855A
- Authority
- JP
- Japan
- Prior art keywords
- plating
- leads
- areas
- lead
- tip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000007747 plating Methods 0.000 claims abstract description 48
- 238000000034 method Methods 0.000 claims description 21
- 239000004065 semiconductor Substances 0.000 claims description 10
- 238000000465 moulding Methods 0.000 claims description 4
- 238000007493 shaping process Methods 0.000 claims description 2
- 239000002184 metal Substances 0.000 abstract description 11
- 229910052751 metal Inorganic materials 0.000 abstract description 11
- 238000011282 treatment Methods 0.000 abstract description 2
- 230000008878 coupling Effects 0.000 abstract 2
- 238000010168 coupling process Methods 0.000 abstract 2
- 238000005859 coupling reaction Methods 0.000 abstract 2
- 239000007788 liquid Substances 0.000 abstract 1
- 238000004080 punching Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000010970 precious metal Substances 0.000 description 3
- 238000013508 migration Methods 0.000 description 2
- 230000005012 migration Effects 0.000 description 2
- 101100406879 Neurospora crassa (strain ATCC 24698 / 74-OR23-1A / CBS 708.71 / DSM 1257 / FGSC 987) par-2 gene Proteins 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 101150005399 sod2 gene Proteins 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Landscapes
- Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)
- Punching Or Piercing (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
(産業上の利用分野)
本発明は、リードフレームの製造方法に係り、特にその
インナーリード先端部の加工方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a lead frame, and particularly to a method for processing the tip portion of an inner lead thereof.
(従来の技術)
IC,LSIなどの半導体装置用リードフレームは、フ
ォトエツチング法またはプレス加工のいずれかの方法に
よって、金属帯状材料の形状加工を行い形成される。(Prior Art) Lead frames for semiconductor devices such as ICs and LSIs are formed by shaping a metal strip-shaped material by either photo-etching or press processing.
ところで、半導体装置の高密度化および高集積化に伴い
、リードビン数は増加するものの、パッケージは従来通
りかもしくは小型化の傾向にある。Incidentally, as the density and integration of semiconductor devices become higher, the number of lead bins increases, but packages tend to remain the same or become smaller.
同一面積内においてインナーリードの本数が増加すれば
、当然ながらインナーリードの幅および隣接するインナ
ーリードとの間隔は狭くなる。このため、強度の低下に
よるインナーリードの変形およびその変形によるインナ
ーリード間の短絡を生じることがある。As the number of inner leads increases within the same area, the width of the inner leads and the distance between adjacent inner leads naturally become narrower. Therefore, deformation of the inner leads due to a decrease in strength and short circuits between the inner leads due to the deformation may occur.
また、ボンディング性の向上をはかるために、インナー
リード先端や半導体素子搭載部には貴金属をめっきした
構造がとられることが多い。Furthermore, in order to improve bonding properties, the tip of the inner lead and the semiconductor element mounting portion are often plated with noble metal.
このため、めっき装置への搬送中にインナーリード先端
の変形を生じたり、インナーリード先端部の側面にも銀
(Ag)などのめっき金属が付着し、実装後の半導体装
置においてマイグレーションが発生し、これが信頼性低
下の原因となっていた。For this reason, the tips of the inner leads may be deformed during transportation to the plating equipment, and plating metal such as silver (Ag) may also adhere to the side surfaces of the tips of the inner leads, causing migration in the semiconductor device after mounting. This caused a decrease in reliability.
このような問題を角Il決するために、インナーリード
をその先端端面に設けた連結片により連結した状態でめ
っきを行い1、めっき終了後、連結片を切除し、インナ
ーリードを分割する方法が提案されている。In order to solve this problem, a method has been proposed in which plating is performed while the inner leads are connected by a connecting piece provided on the end face of the inner lead, and after plating is completed, the connecting piece is removed and the inner lead is divided. has been done.
この方法は、第2図に1例を示す如く、半導体素子を搭
載するためのダイパッド2と、先端が該ダイパッドをと
り囲むように延在せしめられ、先端端面が端面連結片3
によって一体的に連結された多数のインナーリード4と
、該インナーリードとほぼ直交する方向に延びこれらイ
ンナーリードを一体的に支持するタイバー7と、該タイ
ツく−の外側に前記各インナーリードに接続するように
配設せしめられたアウターリード8とダイパ・ソド2を
支持するサポートパー9とを含むように形状加工を行い
、めっき工程などの処理工程後に前記、連結片を破線C
に従って切除し、インナーリード相互間を分割するとい
う方法である。第2図中、1はサイドバーである。As an example of this method is shown in FIG. 2, a die pad 2 for mounting a semiconductor element, a tip end extending so as to surround the die pad, and an end surface of the die pad 2 are provided with an end face connecting piece 3.
A large number of inner leads 4 integrally connected by a tie bar 7 extending in a direction substantially perpendicular to the inner leads and integrally supporting these inner leads, and a tie bar 7 connected to each of the inner leads on the outside of the tights. The shape is processed to include the outer lead 8 and the support part 9 that supports the dieper/sod 2, and after a process such as a plating process, the connecting piece is drawn along the broken line C.
In this method, the inner leads are cut out and the inner leads are separated from each other. In FIG. 2, 1 is a sidebar.
しかしながら、この方法では、めっき工程におけるイン
ナーリード先端の変形を防止することはできるが、めっ
き工程においてインナーリード先端部の側面はすでに形
成されており露呈しているため、インナーリード側面へ
のめつき金属の付着は防IEすることができないという
問題があった。However, although this method can prevent the tip of the inner lead from deforming during the plating process, since the side surface of the tip of the inner lead has already been formed and is exposed during the plating process, plating on the side surface of the inner lead may occur. There is a problem in that metal adhesion cannot be prevented from IE.
また、この方法では、インナーリード先端の端面のみが
連結片によって連結されているため、支持が不十分であ
るという問題もあった。Further, in this method, only the end surfaces of the tips of the inner leads are connected by the connecting pieces, so there is a problem that support is insufficient.
そこでまた、帯状材料の所定位置に貴金属めっきを行っ
た後、成形を行うことにより、インナーリード側面への
めっき金属の付着を防止すると共に、めっき工程中のイ
ンナーリード先端の変形を防止するという方法も提案さ
れている。Therefore, we also developed a method in which the strip material is plated with a precious metal at a predetermined position and then molded to prevent the plating metal from adhering to the side surface of the inner lead, as well as to prevent the tip of the inner lead from deforming during the plating process. has also been proposed.
しかしながら、この方法では、高価な貴金属めっきがな
された後、所定形状にスタンピングがなされるため、ス
タンピング不良が起こった場合、貴金属めっきはまった
く無駄となり、コスト高騰の原因となっていた。However, in this method, expensive precious metal plating is applied and then stamping is performed in a predetermined shape, so if a stamping failure occurs, the precious metal plating is completely wasted, causing a rise in costs.
さらに、この方法では、不完全形状の帯状材料に対して
めっきが行われるため、その位置ずれの確認が困難であ
り、不良品が多量に発生するという危険があった。Furthermore, in this method, since plating is performed on a band-shaped material with an incomplete shape, it is difficult to confirm the positional shift, and there is a risk that a large number of defective products will be produced.
(発明が解決しようとする課題)
このように、半導体装置の高集積化に什い、リード間隔
は小さくなる一方であり、インナーリード先端の側面へ
のめっき金属の付着およびインナーリード先端の位置ず
れが、半導体装置の信頼性低下の原因となっていた。(Problems to be Solved by the Invention) As described above, as semiconductor devices become more highly integrated, the lead spacing is becoming smaller and smaller, leading to problems such as adhesion of plating metal to the side surfaces of the tips of the inner leads and misalignment of the tips of the inner leads. However, this has caused a decrease in the reliability of semiconductor devices.
本発明は、前記実情に鑑みてなされたもので、インナー
リード先端側面へのめっき金属の付着を防止すると共に
、インナーリード先端の位置ずれを防止し、半導体装置
の信頼性の向上をはかることを目的とする。The present invention has been made in view of the above-mentioned circumstances, and aims to improve the reliability of semiconductor devices by preventing plating metal from adhering to the side surfaces of the tips of inner leads, as well as preventing displacement of the tips of the inner leads. purpose.
(課題を解決するための手段)
そこで本発明では、インナーリード先端部の被めっき領
域付近を除いて他の領域を成形したのち、インナーリー
ド先端部が連結されたままの状態でインナーリード先端
の被めっき領域をはじめ、被めっき領域にめっきをおこ
ない、最後にインナーリード先端部の成形を行うように
している。(Means for Solving the Problems) Therefore, in the present invention, after molding the other areas except for the vicinity of the plating area at the tip of the inner lead, the tip of the inner lead is molded while the tip of the inner lead remains connected. Plating is performed on the area to be plated, including the area to be plated, and finally the tip of the inner lead is molded.
(作用)
本発明の方法によれば、インナーリード先端の被めっき
領域付近をそのまま連結した状態で、めっきを行い、め
っき後インナーリード先端部の成形を行うようにしてい
るため、めっき工程においてはインナーリード先端部の
側面は表面に露呈していないためめっき金属が付着する
おそれはない。(Function) According to the method of the present invention, plating is performed with the region to be plated at the tip of the inner lead connected as it is, and the tip of the inner lead is shaped after plating. Since the side surfaces of the tips of the inner leads are not exposed to the surface, there is no risk of plating metal adhering to them.
また、インナーリード先端の被めっき領域付近をそのま
ま連結した状態で、めっき等の処理を行い、その後イン
ナーリード先端部を成形するようにしているため、イン
ナーリードのリード幅が狭く、十分な強度が得られない
ようなリードフレームにおいても、変形を生じたりする
ことなく、本来の位置を維持することができる。In addition, because the area near the plating area at the tip of the inner lead is connected as it is, plating and other treatments are performed, and then the tip of the inner lead is molded, so the lead width of the inner lead is narrow and sufficient strength cannot be achieved. Even in a lead frame that cannot be obtained, the original position can be maintained without deformation.
(実施例)
以下、本発明の実施例について、図面を参照しつつ詳細
に説明する。(Example) Hereinafter, examples of the present invention will be described in detail with reference to the drawings.
第1図(a)乃至第1図(c)は、本発明実施例のリー
ドフレームの製造工程を示す図である。FIG. 1(a) to FIG. 1(c) are diagrams showing the manufacturing process of a lead frame according to an embodiment of the present invention.
まず、第1図(a)に示すように、スタンピング法によ
り、帯状材料を加工し、ダイパッド2と対峠するインナ
ーリード4の先端部のめっき領域Mとなる領域を含む先
端領域におけるインナーリード間領域を連結片5として
そのまま残し、他の領域のみを打ち抜き、インナーリー
ドの一部、アウターリード、タイバーなどを底型する。First, as shown in FIG. 1(a), a strip-shaped material is processed by a stamping method, and between the inner leads in the tip region including the region that will become the plating region M at the tip of the inner lead 4 facing the die pad 2. The area is left as it is as the connecting piece 5, only the other area is punched out, and a part of the inner lead, the outer lead, the tie bar, etc. are formed into a bottom mold.
この連結片5を残す領域は、めっき領域Mとなる領域を
十分に含みめっき領域Mよりも大きくなるようにする。The area where this connecting piece 5 is left is made to be larger than the plating area M, sufficiently including the area that will become the plating area M.
こうすることにより、インナーリード先端部の側面にめ
っき液がもれるのを完全に防ぐことができる。By doing so, it is possible to completely prevent the plating solution from leaking to the side surface of the tip of the inner lead.
次いで、コイニング処理を行い、インナーリード先端部
の平坦幅を確保したのち、第1図(b)に示すように、
先端部にめっきを行うめっきを行う。Mはめっき領域を
示す。このとき必要に応じて、インナーリード先端部の
ボンディングエリアを避けるように熱硬化性樹脂を塗布
した絶縁性テープを貼着し、加熱工程を経て硬化させ、
固定するようにしてもよい。Next, after performing a coining process to ensure a flat width at the tip of the inner lead, as shown in FIG. 1(b),
Plating is performed on the tip. M indicates a plating area. At this time, if necessary, an insulating tape coated with thermosetting resin is pasted to avoid the bonding area at the tip of the inner lead, and cured through a heating process.
It may be fixed.
こののち、第1図(C)に示すように、インナーリード
先端部の打ち抜きを行い、連結片5を除去しインナーリ
ード先端を分離する。Thereafter, as shown in FIG. 1(C), the tip of the inner lead is punched out, the connecting piece 5 is removed, and the tip of the inner lead is separated.
このようにして形成されたリードフレームは、インナー
リード4先端の被めっき領域M付近をそのまま連結した
状態で、めっきを行い、めっき後インナーリード先端部
の成形を行うようにしており、めっき工程においてはイ
ンナーリード先端部の側面は表面に露呈していないため
、インナーリード先端部側面はめっき金属の付着しない
状態で、得ることができ、マイグレーションの発生が抑
制される。In the lead frame formed in this way, plating is performed while the vicinity of the plating area M at the tip of the inner lead 4 is connected as it is, and after plating, the tip of the inner lead is molded. Since the side surface of the tip of the inner lead is not exposed to the surface, the side surface of the tip of the inner lead can be obtained without plating metal adhering to it, and the occurrence of migration is suppressed.
また、インナーリード先端の被めっき領域M付近は、め
っき等の処理工程において、そのまま連結した状態であ
り、その後インナーリード先端部を成形するようにして
いるため、インナーリードのリード幅が狭く、十分な強
度が得られないようなリードフレームにおいても、変形
を生じたりすることなく、本来の位置を維持することが
できる。In addition, the area near the plating area M at the tip of the inner lead is connected as it is during the plating process, and then the tip of the inner lead is molded, so the lead width of the inner lead is narrow and sufficient. Even in lead frames that do not have sufficient strength, the original position can be maintained without deformation.
また、前述したように、インナーリード先端部の成形に
先立ち、絶縁性テープにより補強しておくようにすれば
、さらに互いの位置関係を保持することができるため、
リード同志の短絡が防止されるのみならず、ボンディン
グワイヤとの短絡も防止され、極めて信頼性の高いもの
となる。In addition, as mentioned above, if the tips of the inner leads are reinforced with insulating tape before being molded, the mutual positional relationship can be further maintained.
Not only short circuits between the leads are prevented, but also short circuits with the bonding wires are prevented, resulting in extremely high reliability.
以上説明してきたように、本発明の方法によれば、イン
ナーリード先端の被めっき領域付近をそのまま連結した
状態で、めっきを行い、めっき後インナーリード先端部
の成形を行うようにしているため、インナーリード先端
部の側面に、めっき金属が付着するおそれはなく、また
、高密度化に際してインナーリードのリード幅が狭く、
十分な強度が得られないようなリードフレームにおいて
も、変形を生じたりすることなく、本来の位置を維持す
ることができ、製造歩留まりが大幅に向上する。As explained above, according to the method of the present invention, plating is performed while the vicinity of the plating area at the tip of the inner lead is connected as it is, and the tip of the inner lead is molded after plating. There is no risk of plating metal adhering to the side surface of the tip of the inner lead, and the lead width of the inner lead is narrow when increasing the density.
Even in a lead frame that does not have sufficient strength, the original position can be maintained without deformation, and the manufacturing yield is significantly improved.
第1図(a)乃至第1図(c)は本発明実施例のリード
フレームの製造工程を示す図、第2図は従来のリードフ
レームの製造工程の一部を示す図である。
1・・・サイドパー 2・・・ダイパッド、3・・・端
面連結片、4・・・インナーリード、5・・・連結片、
7・・・タイバー 8・・・アウターリード、9・・・
サポートバーM・・・めっき領域。
0’)
寸
0コ
Σ
U)1(a) to 1(c) are diagrams showing the manufacturing process of a lead frame according to an embodiment of the present invention, and FIG. 2 is a diagram showing a part of the manufacturing process of a conventional lead frame. 1... Side par 2... Die pad, 3... End face connection piece, 4... Inner lead, 5... Connection piece,
7... Tie bar 8... Outer lead, 9...
Support bar M...Plating area. 0') Dimension 0 Σ U)
Claims (1)
長する複数のインナーリードと、各インナーリードにそ
れぞれ連設されたアウターリードと、 を具備してなるリードフレームの形状加工を行うリード
フレーム製造方法において、 前記インナーリード先端部の被めっき領域付近を除く領
域を成形する第1の成形工程と、前記インナーリード先
端の被めっき領域をはじめ、被めっき領域にめっきをお
こなうめっき工程と、 前記インナーリード先端部の成形を行う第2の成形工程
とを含むようにしたことを特徴とするリードフレームの
製造方法。[Scope of Claims] A semiconductor device mounting portion, a plurality of inner leads extending at predetermined intervals from a periphery of the semiconductor device mounting portion, and an outer lead connected to each inner lead, respectively. A lead frame manufacturing method for processing the shape of a lead frame, which includes: a first molding step of shaping an area other than a region to be plated at the tip of the inner lead; A method for manufacturing a lead frame, comprising: a plating step for plating a region; and a second molding step for molding the tip of the inner lead.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1325351A JPH0821657B2 (en) | 1989-12-15 | 1989-12-15 | Lead frame manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1325351A JPH0821657B2 (en) | 1989-12-15 | 1989-12-15 | Lead frame manufacturing method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03185855A true JPH03185855A (en) | 1991-08-13 |
JPH0821657B2 JPH0821657B2 (en) | 1996-03-04 |
Family
ID=18175843
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1325351A Expired - Fee Related JPH0821657B2 (en) | 1989-12-15 | 1989-12-15 | Lead frame manufacturing method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0821657B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009231322A (en) * | 2008-03-19 | 2009-10-08 | Renesas Technology Corp | Manufacturing method of semiconductor device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60176260A (en) * | 1984-02-23 | 1985-09-10 | Toshiba Corp | Manufacture of lead frame for semiconductor device |
JPS61216353A (en) * | 1985-03-20 | 1986-09-26 | Shinko Electric Ind Co Ltd | Manufacture of lead frame |
-
1989
- 1989-12-15 JP JP1325351A patent/JPH0821657B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60176260A (en) * | 1984-02-23 | 1985-09-10 | Toshiba Corp | Manufacture of lead frame for semiconductor device |
JPS61216353A (en) * | 1985-03-20 | 1986-09-26 | Shinko Electric Ind Co Ltd | Manufacture of lead frame |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009231322A (en) * | 2008-03-19 | 2009-10-08 | Renesas Technology Corp | Manufacturing method of semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPH0821657B2 (en) | 1996-03-04 |
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