JPH03185843A - Manufacture of gaas field effect transistor - Google Patents

Manufacture of gaas field effect transistor

Info

Publication number
JPH03185843A
JPH03185843A JP32631689A JP32631689A JPH03185843A JP H03185843 A JPH03185843 A JP H03185843A JP 32631689 A JP32631689 A JP 32631689A JP 32631689 A JP32631689 A JP 32631689A JP H03185843 A JPH03185843 A JP H03185843A
Authority
JP
Japan
Prior art keywords
ammonium sulfate
gaas
insulating film
temperature
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP32631689A
Other languages
Japanese (ja)
Other versions
JPH0770546B2 (en
Inventor
Akiyoshi Tamura
彰良 田村
Koji Watanabe
渡辺 厚司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1326316A priority Critical patent/JPH0770546B2/en
Publication of JPH03185843A publication Critical patent/JPH03185843A/en
Publication of JPH0770546B2 publication Critical patent/JPH0770546B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To reduce surface level density by attaching S atoms and improve noise characteristics, by a method wherein, after a gate electrode is formed, an insulating film is formed after the gate electrode is dipped in solution containing ammonium sulfate, after a GaAs surface is exposed. CONSTITUTION:After a source electrode 7 and a drain electrode 8 are formed, an SiO2 film 6 is eliminated by using hydrofluoric acid system etching solution, the surface of a GaAs substrate 1 is exposed; the substrate is dipped in aqueous solution of ammonium sulfate for about an hour and washed with water; thus an s atom attaching film 9 is formed. An FET is completed by depositing an SiO2 film 10 by using, e.g. optical CVD method at a low temperature (lower than or equal to 450 deg.C). The S atom attaching layer is formed on the GaAs surface by ammonium sulfate solution penetrating treatment, a lot of dangling bonds existing on the surface are reduced; surface level density turning to a low frequency noise source is reduced, and noise characteristics are improved. When the temperature of insulating film deposition after ammonium sulfate treatment becomes too high, attached S atoms might evaporate before insulating film deposition, so that the temperature is desirable to be lower than or equal to 450 deg.C.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は 化合物半導体GaAsを用いた電界効果型ト
ランジスタの製造方法に関するものであも従来の技術 GaAsを半導体として用いたショットキゲート型電界
効果トランジスタ(以下ME S F ETと略す)!
よ 従来の5iFETに比して高速 低消費電力という
利点を持板 デジタルおよびアナログICの両分野で期
待されていも 特に 半絶縁性GaAs基板に イオン
注入法を用いてFETを形成する方法(よ 均一な特性
のFETの製造が容易弘 最近でC&  ソース抵抗等
の寄生抵抗を低減することが可能な高融点金属ゲートを
用いたセルフアライメント型FETが開発され高性能化
が計られていも発明が解決しようとする課題 しかし こうした従来のGaAsM E S F E 
Tで(よ低周波(特に200MHz以下)の領域でノイ
ズが増大し この低周波領域を帯域とするアナログIC
への応用が難しかっtも 課題を解決するための手段 本発明は上記の問題に鑑みなされたもの”p、  Ga
AsF E Tの製造においてGaAs表面を、硫化ア
ンモニウム[(NHn)e3又は(NH4)eSx]S
x中で処理した後、絶縁膜を堆積するものであム 作用 本発明によればGaAs表面を硫化アンモニウムで処理
することによりS(イオウ)原子でGaAs表面をパッ
シベーションし 低周波でのノイズの元となる表面準位
密度を41(減し ノイズ特性を改善したGaAsF 
E Tを得ることができるものであも実施例 以下、高融点金属ゲートを用いたセルフアライメント型
FETを例にとって説明すも 第1図(a)に示すよう
に 半絶縁性GaAs基板lの所定の領域に フォトレ
ジスト膜2Aをマスクとして3i111イオンを加速電
圧30KeV、ドーズ8 X 10”cIII−”注入
してチャンネル領域となるウェル層3を形威すも次にフ
ォトレジストM2Aを除去眞 同図(b)に示すように
 スパッタ法を用いて、WSiN(2000人)/Ta
N(500人)/Au(4000Å)の3層膜4Aを形
威すも次に 同図(c)に示すように 所定の領域にフ
ォトレジスト膜2Bをマスクとして、Arイオンミリン
グと、CFa 10a混合ガスの異方性プラズマエツチ
ングを行な(\ 3層膜4Aの一部からなるショットキ
ーゲート電極4を形威すも 次に フォトレジスト膜2
Bを除去後、同図(d)に示すように 所定の領域を再
びフォトレジスト膜2Cをマスクとして、312Gイオ
ンを50KeV、 5 x 10”cm−”の条件で注
入して、ソース、ドレインの一部となるn′層5を形威
すも 次にフォトレジスト膜2Cを除去眞同図(e)に
示すように全面に 5iOi膜6 (2500人)を形
成した眞 所定の領域にフォトレジスト膜2Dをマスク
として、5ins 膜を通して3i11イオンを160
KeV、 5 X 10”Cm−”の条件で注入し1”
/−ス、 ドレインの一部となるn゛層8形威すも 次にフォトレジスト膜2Dを除去抵 同図(f)に示す
ように アルシン雰囲気中で800℃、15分間アニー
ルを行ないイオン注入層を活性化させも 次に同図(g
)に示すようにSiO*jl16の所定の領域をフォト
レジスト膜をマスクとしてフッ酸系のエツチング液で開
口した一1&、  AuGeを蒸着比 リフトオフして
430℃、3分間の熱処理を行ないソース電極7ドレイ
ン電極8を形威すも 次に同図(h)に示すよう?Q 
 5i02膜6をフッ酸系のエツチング液を用いて除去
しGaAs基板1の表面を露出させ、硫化アンモニウム
[(NHJ )esx〕の水溶液中℃ 1時間浸透させ
て後水洗1..  GaAs表面LS原子付着層9を形
威すも 次に同図(i)に示すように 再び低温(45
0℃以下)でたとえば光CVD法を用いて5i02膜1
0を堆積してF E Tを完成させるものであも第2図
は第1図に示した 本発明の製造方法による硫酸アンモ
ニウムの水溶液浸透の処理を施したFETと従来の処理
をしていないFETのノイズ指数の周波数依存性を示し
たものであ4  FETのゲート長は1μm、ゲート幅
は600μm0.Lきい値電圧は一〇、9vであも 同
図より本発明の製造方法によるF E T g&  従
来の製造方法によるFETに比して、低周波側(特に2
00MHz以下)の領域でノイズ指数が激減しているこ
とがわかん これzヨ  硫酸アンモニウム溶液浸透処
理によりGaAs表面にS原子付着層を形成a 表面に
多数存在しているダングリングボンドを減少させ、低周
波でのノイズの原因となる表面準位密度を低減し ノイ
ズ特性が改善されたためであも 以上の説明で、硫酸ア
ンモニウム処理後の絶縁膜堆積の温度があまり高くなる
と、付着したS原子が絶縁膜堆積前に蒸発する恐れがあ
り、450℃以下が望ましへ また オーミック電極形
成前にGaAs表面を露出させた抵 硫酸アンモニウム
処理を適用しても同様であることはいうまでもな〜も 
なお以上の説明でl;L  (NH4)2Sxを用いる
処理について述べた力((NHa)eSを用いる溶液に
ついても同様であることはいうまでもなシX。又 イオ
ン注入法で活性層を形成するプロセスについて述べたバ
 エピタキシャル層を用いてFETを製造するプロセス
についても適用できることはいうまでもな鶏 発明の効果 以上述べたように 硫酸アンモニウム溶液でGaAs表
面を浸透処理を行なった抵 絶縁膜を形成することによ
りGaAs表面に多数存在して低周波でのノイズの原因
となるダングリングボンドに起因する表面単位密度をS
原子の付着により減少させ、ノイズ特性を改善すること
が可能となり、高性能なGaAsF E Tを得ること
が可能となるものであも
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a field effect transistor using a compound semiconductor GaAs. (abbreviated as MESFET)!
Although it has the advantages of high speed and low power consumption compared to the conventional 5iFET, it is expected to be used in both the digital and analog IC fields. Recently, a self-alignment type FET using a high-melting point metal gate that can reduce parasitic resistance such as C & source resistance has been developed, and even though high performance has been attempted, the invention has not been resolved. However, these conventional GaAsM E S F E
(Noise increases in the low frequency region (especially below 200 MHz), and analog ICs whose bandwidth is this low frequency region
The present invention has been made in view of the above problems.
In the production of AsFET, the GaAs surface is treated with ammonium sulfide [(NHn)e3 or (NH4)eSx]S
According to the present invention, by treating the GaAs surface with ammonium sulfide, the GaAs surface is passivated with S (sulfur) atoms, which is a source of noise at low frequencies. GaAsF has a surface state density of 41 (reduced) and improved noise characteristics.
In the following examples, a self-alignment type FET using a high-melting point metal gate will be explained as an example of a device that can obtain ET. Using the photoresist film 2A as a mask, 3i111 ions are implanted at an acceleration voltage of 30 KeV and a dose of 8 x 10"cIII-" to form the well layer 3 that will become the channel region, and then the photoresist M2A is removed. As shown in (b), using the sputtering method, WSiN (2000 people)/Ta
A three-layer film 4A of N (500 Å)/Au (4000 Å) was formed, and then Ar ion milling and CFa 10a were applied to a predetermined area using the photoresist film 2B as a mask, as shown in the same figure (c). Anisotropic plasma etching of a mixed gas is performed (to form a Schottky gate electrode 4 made of a part of the three-layer film 4A).Next, photoresist film 2
After removing B, as shown in Figure (d), using the photoresist film 2C as a mask, 312G ions are implanted under the conditions of 50KeV and 5 x 10"cm-" to form the source and drain. Next, the photoresist film 2C was removed while forming a part of the n' layer 5, and a 5iOi film 6 (2,500 layers) was formed on the entire surface as shown in Figure (e). Using membrane 2D as a mask, 160 3i11 ions were passed through the membrane for 5 ins.
KeV, 1" implanted under the conditions of 5 x 10"Cm-"
Next, remove the photoresist film 2D from the n layer 8 which will become part of the drain. As shown in Figure (f), annealing is performed at 800°C for 15 minutes in an arsine atmosphere and ions are implanted. Even if the layer is activated, the same figure (g
), a predetermined region of the SiO*jl 16 was opened using a hydrofluoric acid etching solution using a photoresist film as a mask, and the AuGe was lifted off and heat treated at 430° C. for 3 minutes to form the source electrode 7. Although the drain electrode 8 is shaped like the one shown in the same figure (h)? Q
The 5i02 film 6 was removed using a hydrofluoric acid-based etching solution to expose the surface of the GaAs substrate 1, and the surface of the GaAs substrate 1 was soaked in an aqueous solution of ammonium sulfide [(NHJ)esx] at ℃ for 1 hour, and then washed with water. .. Although the LS atomic adhesion layer 9 is formed on the GaAs surface, the temperature is lowered again (45
5i02 film 1 using, for example, a photo-CVD method at
0 is deposited to complete the FET. Figure 2 shows the difference between the FET treated with the aqueous solution permeation of ammonium sulfate according to the manufacturing method of the present invention and the FET not subjected to the conventional treatment, as shown in Figure 1. The figure shows the frequency dependence of the noise figure of 4. The gate length of the FET is 1 μm and the gate width is 600 μm0. Although the L threshold voltage is 10.9V, it is clear from the same figure that the FET produced by the manufacturing method of the present invention
It can be seen that the noise figure is drastically reduced in the region (below 00 MHz). This method forms an S atom adhesion layer on the GaAs surface by ammonium sulfate solution infiltration treatment. This may be because the surface state density, which causes noise, is reduced and the noise characteristics are improved. The temperature is preferably below 450°C as there is a risk of evaporation before the formation of the ohmic electrode.
In addition, in the above explanation, the force described for the treatment using l; It goes without saying that the invention can also be applied to the process of manufacturing FETs using epitaxial layers. By doing this, the surface unit density caused by dangling bonds, which exist in large numbers on the GaAs surface and cause noise at low frequencies, is reduced to S.
It is possible to reduce the noise by adhering atoms and improve the noise characteristics, making it possible to obtain high-performance GaAsFET.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のGaAsM E S F 
E Tの製造方法を示す工程は 第2図は本発明の製造
方法と従来の製造方法によるGaAsM E S F 
E Tのノイズ特性の周波数依存性を示す図であもl・
・・・GaAs基板、 3・・・・ウェル層、 4・・
・・ゲート電極、 9・・・・Si原原子付鳳 凰理人の氏名
FIG. 1 shows a GaAsM E S F according to an embodiment of the present invention.
The steps showing the manufacturing method of ET are as shown in Fig. 2.
This is a diagram showing the frequency dependence of the noise characteristics of ET.
...GaAs substrate, 3...Well layer, 4...
・・・Gate electrode, 9...Name of Houou Rito with Si original atom

Claims (1)

【特許請求の範囲】[Claims]  ゲート電極形成後、GaAs表面を露出させた後、硫
酸サンモニウムを含む溶液中に浸透させた後、絶縁膜を
形成する工程を含むことを特徴とするGaAs電界効果
型トランジスタの製造方法。
A method for manufacturing a GaAs field effect transistor, comprising the steps of: after forming a gate electrode, exposing the GaAs surface, impregnating it in a solution containing ammonium sulfate, and then forming an insulating film.
JP1326316A 1989-12-15 1989-12-15 Method for manufacturing GaAs field effect transistor Expired - Lifetime JPH0770546B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1326316A JPH0770546B2 (en) 1989-12-15 1989-12-15 Method for manufacturing GaAs field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1326316A JPH0770546B2 (en) 1989-12-15 1989-12-15 Method for manufacturing GaAs field effect transistor

Publications (2)

Publication Number Publication Date
JPH03185843A true JPH03185843A (en) 1991-08-13
JPH0770546B2 JPH0770546B2 (en) 1995-07-31

Family

ID=18186404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1326316A Expired - Lifetime JPH0770546B2 (en) 1989-12-15 1989-12-15 Method for manufacturing GaAs field effect transistor

Country Status (1)

Country Link
JP (1) JPH0770546B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0498993A2 (en) * 1990-11-28 1992-08-19 Mitsubishi Denki Kabushiki Kaisha Field effect transistor and production method therefor
US5514606A (en) * 1994-07-05 1996-05-07 Motorola Method of fabricating high breakdown voltage FETs

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
APPLIED PHYSICS LETTERS=1989 *
JAPANESE JOURNAL OF APPLIED PHYSICS=1988 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0498993A2 (en) * 1990-11-28 1992-08-19 Mitsubishi Denki Kabushiki Kaisha Field effect transistor and production method therefor
US5514606A (en) * 1994-07-05 1996-05-07 Motorola Method of fabricating high breakdown voltage FETs

Also Published As

Publication number Publication date
JPH0770546B2 (en) 1995-07-31

Similar Documents

Publication Publication Date Title
JPH022142A (en) Field effect transistor and its manufacture
US5587328A (en) Method for manufacturing semiconductor device
JPH03185843A (en) Manufacture of gaas field effect transistor
JPH08191147A (en) Semiconductor device and manufacture thereof
JPS62211957A (en) Manufacture of field-effect transistor
JPS5856470A (en) Manufacture of semiconductor device
JP3106378B2 (en) Method for manufacturing semiconductor device
JPS60115268A (en) Manufacture of semiconductor device
JPH0770544B2 (en) Method for manufacturing semiconductor device
JPS6167274A (en) Manufacture of semiconductor device
JPH09298203A (en) Manufacture of field-effect transistor
JPH04352333A (en) Manufacture of semiconductor device
JPS58197883A (en) Manufacture of semiconductor device
JP2002134703A (en) Method of manufacturing semiconductor device
JPS5922343A (en) Manufacture of semiconductor device
JPS60779A (en) Manufacture of semiconductor device
JPS5975673A (en) Manufacture of semiconductor device
JPS6271236A (en) Manufacture of compound semiconductor integrated circuit
JPS59986B2 (en) Method for manufacturing field effect transistors
JPS61144880A (en) Production of field effect transistor
JPH01208870A (en) Manufacture of compound semiconductor device
JPH0410629A (en) Manufacture of semiconductor device
JPH06283676A (en) Manufacture of semiconductor device
JPH0427128A (en) Manufacture of semiconductor device
JPS58112372A (en) Manufacture of semiconductor device