JPH03175652A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form an element isolation region with the same dimensions as the dimensions of a fine pattern formed on a mask material by a method wherein an oxidation-proof mask layer is selectively formed on a semiconductor substrate and a trench matched with the pattern of the oxidation-proof mask layer 2 is formed in the substrate and, after a thin first insulating film is formed on the inner surface of the trench, the trench is filled with a thick second insulating film. CONSTITUTION:A process in which an oxidation-proof mask layer 2 is selectively formed on a semiconductor substrate 1 and a trench 3 matched with the pattern of the oxidation-proof mask layer 2 is formed in the semiconductor substrate 1, a process in which a thin first insulating film 4 is formed on the inner surface of the trench 3 and a process in which the trench 3 is filled with a thick second insulating film 5 to form an element isolation region are contained in the manufacturing process of a semiconductor device. For instance, the silicon nitride film 2 is deposited on the surface of the Si substrate 1 and the silicon nitride film 2 and the Si substrate 1 are selectively etched successively to form the trench 3. Then the substrate 1 is subjected to thermal oxidation by using the silicon nitride film 2 as a mask to form the silicon oxide film 4 on the inner surface of the trench 3. After the silicon nitride film 2 is removed, the silicon oxide film 5 is deposited to fill the trench 3 and the silicon oxide film deposited on the surface of the substrate 1 other than the trench 3 is removed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing an element isolation region.

[Conventional technology]

Conventionally, a selective oxidation method has been used to form element isolation regions of semiconductor devices.

FIGS. 3(a) and 3(b) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a conventional method of manufacturing a semiconductor device.

As shown in FIG. 3(a), a silicon nitride film 2 is provided on a silicon substrate 1 and selectively etched to form an opening 7.
will be established.

Next, as shown in FIG. 3(b), the surface of the silicon substrate 1 is oxidized using the silicon nitride M2 as a mask to form a field oxide film 8, and the silicon nitride film 2 is removed to define an element formation area. are doing.

It is known that bird's beaks 9 occur when element isolation regions are formed using the selective oxidation method in this way.

[Problem to be solved by the invention]

In the conventional semiconductor device manufacturing method described above, an oxidation-resistant mask layer is used to oxidize the exposed area of the silicon substrate surface using a thermal oxidation method to form an element isolation area with a silicon oxide film. Since the element isolation region is formed to extend laterally than the region-limiting pattern, there is a drawback that the element formation region becomes narrow. For this reason, it is virtually impossible to form a fine device region such as a 64-megabit DRAM.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes the steps of: selectively forming an oxidation-resistant mask layer on a semiconductor substrate; and providing a groove in the semiconductor substrate that matches the pattern of the oxidation-resistant mask layer;
The method includes a step of forming a thin first insulating film on the inner surface of the trench, and a step of filling the trench with a thick second insulating film to form an element isolation region.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1A to 1C are cross-sectional views of a semiconductor chip shown in order of steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1(a), a silicon nitride film 2 is deposited to a thickness of 0.1 μm on the surface of a silicon substrate 1 by the LPCVD method.
The silicon nitride film 2 and the silicon substrate 1 are deposited to a thickness of
The grooves 3 are formed by selectively and sequentially etching.

Next, as shown in FIG. 1(b), aging is performed in a dry oxygen atmosphere at 900'C using the silicon nitride film 2 as a mask to form a silicon oxide film 4 on the inner surface of the groove 3.

Next, as shown in FIG. 1C, after removing the silicon nitride film 2, a silicon oxide film is deposited by the CVD method to fill the inside of the trench 3, and the silicon substrate other than the silicon substrate 3 is removed by an etch-back method. Remove the silicon oxide film deposited on the surface of 1,
A buried silicon oxide film 5 is provided in the trench 3 to form an element isolation region.

The leakage current of the element isolation region having a width of 0.8 μm and a depth of 2.5 μm obtained in this example was at a low level of 10-13 A or less, confirming the usefulness of the present invention.

FIG. 2 is a sectional view of a semiconductor chip for explaining a second embodiment of the present invention.

As shown in FIG. 2, after forming a silicon oxide film 4 in the same process as in the first embodiment described in FIGS. A buried silicon oxide film 5 is deposited on the surface of the silicon oxide film 4 to a thickness of 0.1 μm in the same process as in the first embodiment.

〔Effect of the invention〕

As explained above, the present invention employs a method of forming a beach with a fine opening defined by a mask material and burying an insulating material inside the trench when forming an element isolation region. 4. Fine particles formed on the mask material. [[There is an effect that the element isolation region can be formed with the same dimensions as the dimension pattern.

[Brief explanation of drawings]

1(a) to (C) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a first embodiment of the present invention, and FIG. 2 is a cross-sectional view for explaining a second embodiment of the present invention. FIG. 3(a) is a cross-sectional view of a semiconductor chip shown in FIG. ...Silicon nitride film, 3.
... Clear, 4... Silicon oxide film, 5... Buried silicon oxide film, 6... Silicon nitride film, 7... Opening,
8...Field oxide film, 9...Bird's peak.

Claims (1)

[Claims] selectively providing an oxidation-resistant mask layer on a semiconductor substrate, providing a groove in the semiconductor substrate that matches the pattern of the oxidation-resistant mask layer; and forming a thin first insulating film on the inner surface of the groove. and filling the groove with a thick second insulating film to form an element isolation region.