JPH03173316A - Power supply - Google Patents

Abstract

PURPOSE:To realize stabilized load control by gradually varying output voltage from a rectifier at the times of starting and stopping of power supply. CONSTITUTION:When power supply to a load, i.e., a developer, is started, a develop bias control signal at terminal P31 is pulled to Low level thus interrupting a transistor Q31. Rising part of collector output from the transistor Q31 is integrated through an integrating circuit 31, split with a predetermined ratio, and inputted as a reference voltage to a comparator 6. Since the output from the comparator 6 drops gradually, conductivity of the transistor Q31 lowers gradually thus slowly starting power supply to the primary of a transformer T1. When power supply to the developer is stopped, the develop bias signal at the terminal P31 is pulled to High level and the falling part of the reference voltage of the comparator 6 is integrated thus gradually lowering the secondary output of the transformer T1.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power supply device, and particularly to a power supply device that outputs a high voltage in which alternating current and direct current are superimposed.

[Prior Art] Conventionally, various electrophotographic image forming apparatuses have been used as image forming mechanisms of printers or copying machines. An electrophotographic image forming apparatus uses loads that require a high voltage power supply, such as a charger and a developer. Since the voltage required for each high-voltage load and the control method depending on the progress of the image forming sequence are different for each load, these power supply devices are controlled by different independent control structures.

In particular, the power source for developing bias of the developing device is often composed of a step-up transformer for low-frequency AC output, and a DC+DC inverter coupled to the transformer to superimpose a DC voltage on the AC output.

[Problems to be Solved by the Invention] In the conventional structure of the developing bias power supply described above, the step-up transformer for low frequency AC is large, and noise is generated because it is in the audible band, and it is difficult to reduce this. It is very difficult to do so, and even if one attempts to change the duty ratio by more than 50%, it is impossible due to the biased magnetization of the transformer. In addition, since the load is a capacitive load and rapid charging is difficult, there are problems such as the inability to increase the pulse rise speed.

In view of the above problems, Figures 7 and 8 (A) to (D)
A conventional configuration as shown in is known. Figure 8 (A) ~
(D) shows signal waveforms at various parts of the circuit shown in FIG.

In FIG. 7, symbols l and 2 are oscillators that generate square wave constant pressure alternating current, and oscillator 1 has a frequency of 1800 Hz,
The oscillator 2 generates a rectangular wave signal with a duty ratio of 20% (FIG. 8(A)), and the oscillator 2 generates a rectangular wave signal with a frequency of 50 kHz and a duty ratio of 50% (waveform portion in FIG. 8(B)).

The output of the oscillator 2 is input to the modulator 3, and is almost 100% modulated by the output signal of the oscillator 1 to obtain the waveform shown in FIG. 8(B). The modulation circuit 3 supplies a low power supply voltage -V to the primary winding of the step-up transformer T1 via the transistor Ql.
Controls the application of cc.

On the secondary side of the transformer TI, a rectifying diode Dl,
A clamp circuit for superimposing a DC component, which includes a large-capacity capacitor C1, a diode D2, and a DC power source 5 (output terminal VE), is connected via a discharge resistor R1. The clamp output is output from the terminal PL to the developing device as a developing bias. Further, the connection point between the resistor R1 and the clamp capacitor C1 can be grounded by a switch 4 consisting of a relay, an analog switch, or the like.

Note that the connection method of the diode Di regarding the winding of the transformer TI is a flyback method as shown in the figure. As shown in FIG. 8(C), the switch circuit 4 is connected to an oscillator l.
It becomes conductive in synchronization with the low level output of , that is, the cutoff of transistor Ql and transformer TI. transistor Q
l is 50k) During the period when IZ is driven, a voltage -Vt is obtained at the cathode of the clamping diode D1,
Since it is smoothed by the clamping capacitor C1, the output of the switch circuit 4 becomes as shown in FIG. 8(C).

The power supply output obtained in this way is connected to the output terminal P1 via the clamping capacitor C2, but the clamping diode D2 conducts at the peak timing in the positive direction and is clamped to the DC power supply 5 having an output of +VE. Therefore, as shown in Figure 8(D), the peak value in the positive direction is +V.
The output is E. As is clear from FIG. 8(D), this output is a superposition of a negative DC voltage element VE and a rectangular wave AC of 1800 Hz voltage V1.

According to the above configuration, since the transformer Tl itself is driven at a high frequency, there is no need to use a large transformer that can be driven at a low frequency as in the past, and the power supply section can be configured to be small and lightweight, and noise countermeasures can be easily implemented. There is an advantage.

However, in the conventional configuration described above, the load is the developing device of the electrophotographic apparatus, and the power supply to the developing roller is controlled in the image forming process by controlling the outputs of the oscillators 1 and 2 by a control system (not shown in FIG. 7). Turns on/off as progress is made.

However, with the above configuration, there is a problem in that overshoot or undershoot occurs when power supply to the developing device is started or cut off, resulting in fog or reverse fog on the image.

An object of the present invention is to solve the above problems and improve the characteristics when starting and cutting off power supply to a high voltage load.

[Means for Solving the Problems] In order to solve the above problems, the present invention provides a power supply device that outputs high voltage in which alternating current and direct current are superimposed.
a low-frequency oscillator, a high-frequency oscillator, a transformer whose primary side low-voltage DC input is controlled according to one of the outputs of these oscillators depending on the output voltage, and the output of this transformer is rectified in flyback mode. a rectifier, a switch means for connecting and disconnecting the output point of the rectifier and ground potential in synchronization with the output signal of the low frequency oscillator, and controlling the AC voltage generated at the connection point between the switch means and the rectifier to a predetermined DC level. a clamp circuit that supplies power to the load after clamping it to the
iii. Means for detecting the output voltage of the rectifier and comparing it with a predetermined reference voltage, and adjusting the amount of current on the primary side of the transformer according to the comparison result, and the rectifier at the time of starting power supply and the time of stopping power supply. A configuration is adopted in which means is provided for processing the reference voltage applied to the adjusting means so as to gradually change the output voltage of the adjusting means.

[Operation] According to the above configuration, it is possible to prevent overshading and undershoot of the output amplitude when starting and stopping power supply to the load, and stable load control is possible.

f Example] The present invention will be described in detail below based on the example shown in the drawings.

FIG. 1 shows the configuration of a power supply device employing the present invention. In FIG. 1, the same reference numerals are used for the same members as in the conventional example shown in FIG.

In this embodiment, the output of the low frequency (f1) oscillator l and the output of the high frequency (f2) oscillator 2 are connected to the diode D42,
Transistor Q via D43 and transistor Q3
It is input to the base of l. Diode D42. D4
3 and transistor Q3 have a function corresponding to the modulation circuit 3 of FIG.

That is, as is clear from the orientation of the diodes D42 and D43, the high voltage output of the oscillator 1.2 turns on the transistor Q3, which causes the transistor Ql to become conductive.
is cut off, and as a result, the high frequency drive by oscillator 2 is interrupted in synchronization with the low frequency output from oscillator l,
The output of oscillator 2, which is 100% modulated by the output of oscillator l, causes the transistor ? :r1Js works.

Furthermore, a diode D4 is connected to the base of the transistor Q3.
The output of the comparator 6 is inputted through the input terminal 1, and driving of the transformer Tl can be stopped by setting the output of the comparator 6 to a high level. The input circuit of the comparator 6 will be described later.

On the other hand, the secondary output of the transformer Tl is connected to the diode D6.
It is converted to direct current by a half-wave rectifier circuit using capacitor C5,
Diode D1. Switch circuit 4 via resistor R1. and is manually powered by a clamp circuit consisting of a capacitor C1 and a DC power supply E301.

In this embodiment, the switch 4 is a high-voltage transistor Q2.
It is turned on/off by the output of the oscillator l. The clamp output is supplied to a load, for example, a developing device of an electrophotographic apparatus, via a terminal PL. The load is shown here by a capacitor symbol to indicate that it is a capacitive load.

Collector voltage VO of transistor Q2 constituting switch 4 is input to one input terminal of comparator 6 via a voltage dividing circuit including resistors R41 and R42.

The comparator 6 is constituted by an operational amplifier or the like capable of high-speed operation, and the output signal of the integrating circuit 31 is inputted to its input terminal via an attenuator composed of resistors R32 and R33. The integrating circuit 31 is an output circuit that integrates the collector voltage of the transistor Q31 and is composed of a known CR filter or the like.

The collector of the transistor Q31 provided with an emitter is connected to the power supply voltage Vcc via a resistor R31, and its base is connected via a terminal P31 to the main control unit of the device (
(In electrophotographic equipment, image forming sequence control unit)
A low-level active power supply control signal is supplied from.

Next, regarding the operation in the above configuration, FIGS. 2(A) to (D)
). Figures 2 (A) to (D) show the first
The signal waveforms at each part of the figure are shown. In the following, it is assumed that the power supply load is a developing device of an electrophotographic apparatus, and the power supply control signal of the terminal P31 is a development bias control signal (remote signal).

A power supply voltage Vcc is supplied to each application point, and the oscillator l.

When the oscillation of 2 is started and the developing bias signal at terminal P31 is set to high level, the circuit enters a standby state.

That is, the rectified output FC+ of the high frequency f2 of the transformer TI
is divided at a predetermined ratio by resistors R41 and R42, and compared with a reference voltage (low level via a tiger resistor Q31) output from an integrating circuit 31 by a comparator 6. The resistors R41 and R42 simply divide the output vO directly and input it to the comparator 6, and the transmission delay caused by the circuit at this time is small.

As a result, when the output of comparator 6 rises to high level, diode D41 becomes conductive and transistor Q3
is further made conductive to cut off transistor Ql, and energization of the primary side of transformer TI is stopped.

To start supplying power to the load developing device, proceed as shown in Figure 2 (A).
As shown in FIG. 3, the developing bias control signal at terminal P31 is set to low level. The development bias control signal shuts off transistor Q31 and connects the collector of transistor Q31 to the second
As shown in figure (B), the low level is Ov, and the high level is Vc.
An inverted signal of c is obtained.

This collector output is processed by the integrating circuit 31 as shown in FIG.
), the rising part is integrated as shown in ().

After this signal is divided into a predetermined ratio by resistors R32 and R33, it is input to the comparator 6 as a reference voltage.

Since the output voltage of comparator 6 gradually decreases with a waveform that is an inversion of FIG. 2(C), the conductivity of transistor Q3 gradually decreases, and power supply to the primary side of transformer TI gradually starts be done.

Therefore, the waveform of the collector voltage 0 of the transistor Q2 on the secondary side of the transformer T2 gradually rises as shown in FIG. 2(D).

To stop power supply to the developing device, the developing bias signal at the terminal P31 is returned to high level (FIG. 2(A)). At this time, since the integrating circuit 31 similarly integrates the fall of the reference voltage of the comparator 6, the output of the secondary side of the transformer T2 also gradually decreases.

As described above, the amplitude of the power signal supplied to the developing device can be gradually raised and lowered, and overshoot and undershoot of the amplitude can be prevented.

In the conventional circuit shown in Fig. 7, excessive overshoot and undershoot occur in the PL ratio output as shown in Fig. 3 (A) when the developing bias control piece signal is turned on and off, and the magnitude of this is proportional to the output amplitude. It reaches 1/2. but,
According to the present invention, when a developing bias control signal as shown in FIG. 3(C) is applied, it is possible to completely reduce overshoot and undershoot to 0 as shown in FIG. 3(B). Image defects such as fog due to overshoot, undershoot, and reverse fog can be eliminated.

4 and 6 show modified examples of the circuit shown in FIG. 1. In FIG. I'm trying to control it. The other configurations are the same.

In this configuration, digital voltage data is supplied to the A/A converter 33 at a rate of change corresponding to the rise and fall time constants shown in FIG. 2(C), and by controlling the reference voltage of the comparator 6, the same Control characteristics can be obtained. Digital voltage data given to the D/A converter 33 is controlled by software of the CPU 32. Specifically, the software of the CPU 32 may be configured to gradually increase or decrease the voltage data input to the D/A converter 33 at predetermined intervals.

According to this configuration, it is possible to give the reference voltage of the comparator 6 a change characteristic that is impossible with an integral filter such as a CR filter, and it is possible to perform output control suitable for load control.

FIG. 5 shows a configuration in which the D/A converter 33 of the embodiment shown in FIG. 4 is removed and the hardware and control procedure of the CPU 32 are simplified.

In FIG. 5, the developing bias control signal 32a outputted by the CPU 32 is applied during the start-up period 'r t and the start-up period T2, as shown in FIG. These are pulses with the same interval, but whose pulse widths are gradually changed. This kind of pulse control is
It can be easily generated using a built-in timer of the CPU 32 or the like.

The developing bias control signal 32a is input to the base of the transistor Q5. A capacitor C43 and a DC power supply E30 are connected in parallel to the corephthal emitter of the transistor Q5.
A series circuit of 2 and resistor R43 is connected, and the transistor Q
The collector voltage of No. 5 is inputted to one terminal of the comparator 6 as a reference voltage.

The other configurations are the same as in FIGS. 1 and 4.

The resistor R43 and the capacitor C43 constitute a charging/discharging circuit by the DC power supply E302, and the CPU 3
) at startup, the developing bias control signal 32a
By gradually decreasing the pulse width of the developing bias control signal 32a and gradually increasing the pulse width of the developing bias control signal 32a at the time of falling, the standard corresponding to FIG. 2(C) shown in FIG. 6(C) is achieved. A signal can be formed at the collector of transistor Q5 and input to comparator 6.

Even in this configuration, the rate of change in the pulse width of the developing bias control signal 32a can be arbitrarily set by software settings of the CPU 32, and desired load control characteristics can be obtained.For example, in the control example shown in FIG. The characteristics are set such that the time constant at the time of falling is larger than that of the previous one.

Although bias control of a developing device of an electrophotographic apparatus has been described above as an example, it goes without saying that a similar configuration can be implemented even when power is supplied to other loads.

[Effects of the Invention] As is clear from the above, according to the present invention, in a power supply device that outputs high voltage in which alternating current and direct current are superimposed, a low frequency oscillator, a high frequency oscillator, and these oscillators can a transformer whose primary side low-voltage DC input is controlled in accordance with one of the outputs of the transformer, a rectifier which rectifies the output of this transformer in flyback mode, and a connection between the output point of this rectifier and ground potential with said low frequency DC input. A switch means that is turned on and off in synchronization with an output signal of an oscillator, a clamp circuit that clamps an AC voltage generated at a connection point between the switch means and the rectifier to a predetermined DC level and then supplies power to a load, and an output voltage of the rectifier. means for detecting and comparing with a predetermined reference voltage, and adjusting the amount of energization on the primary side of the transformer according to the comparison result, and gradually adjusting the output voltage of the rectifier at the time of starting power supply and when power supply is stopped. Since the configuration includes a means for processing the reference voltage applied to the adjustment means so as to change the reference voltage, it is possible to prevent overshoot and undershoot of the output amplitude when starting and stopping power supply to the load, and to maintain stable output amplitude. Load control is possible, and especially when connecting a developing unit of an electrophotographic apparatus, there is an excellent advantage that development fog can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a power supply device adopting the present invention, FIGS. 2(A) to (D) are waveform diagrams showing the operation of the device in FIG. 1, and FIGS. 3(A) to (C) is a waveform diagram explaining the advantages of the circuit in Figure 1, Figures 4 and 5 are circuit diagrams showing modified examples of the circuit in Figure 1, and Figures 6 (A) to (C) are FIG. 5 is a waveform diagram showing the operation of the circuit, FIG. 7 is a circuit diagram showing the configuration of a conventional device, and FIGS. 8(A) to (D) are waveform diagrams of each part of FIG. 7. l, 2...Oscillator 4...Switch circuit 6...Comparator Tl-...Transformer 32-...CPU 33...D/A converter f! ? ! ■Ryo Shiba Higashi's Vp Table 5 RIJ Giant 2 Figure 7 in ω of 1

Claims (1)

[Claims] 1) A power supply device that outputs a high voltage in which alternating current and direct current are superimposed, including a low frequency oscillator, a high frequency oscillator, and a primary-side power source according to the output of one of these oscillators depending on the output voltage. a transformer that controls low-voltage DC input; a rectifier that rectifies the output of the transformer in flyback mode; and a connection between the output point of the rectifier and ground potential in synchronization with the output signal of the low-frequency oscillator. switch means; a clamp circuit that clamps an AC voltage generated at a connection point between the switch means and the rectifier to a predetermined DC level and then supplies power to the load; detects the output voltage of the rectifier and compares it with a predetermined reference voltage; and a means for adjusting the amount of current flowing through the primary side of the transformer according to the comparison result, and a reference given to the adjusting means so as to gradually change the output voltage of the rectifier at the time of starting and stopping the power supply. A power supply device characterized by being provided with means for processing voltage. 2) The power supply device according to claim 1, wherein the processing means is comprised of an integrating circuit. 3) The power supply device according to claim 1, wherein the processing means comprises a program control means and a voltage control means for changing the reference voltage according to the output of the program control means.