JPH03165019A - Composite-type ceramic capacitor - Google Patents

Composite-type ceramic capacitor

Info

Publication number
JPH03165019A
JPH03165019A JP1304141A JP30414189A JPH03165019A JP H03165019 A JPH03165019 A JP H03165019A JP 1304141 A JP1304141 A JP 1304141A JP 30414189 A JP30414189 A JP 30414189A JP H03165019 A JPH03165019 A JP H03165019A
Authority
JP
Japan
Prior art keywords
electrodes
lead wires
dielectric substrate
terminals
ceramic capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1304141A
Other languages
Japanese (ja)
Inventor
Akio Hidaka
晃男 日高
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1304141A priority Critical patent/JPH03165019A/en
Publication of JPH03165019A publication Critical patent/JPH03165019A/en
Pending legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To prevent noises at high frequencies by using both tip parts of each of three lead wires which are soldered to three electrodes formed on both surfaces of a dielectric substrate as terminals, and providing six terminals. CONSTITUTION:Two electrodes 12 and 13 are juxtaposed on one surface of a dielectric substrate 11 so that the electrodes are separated to each other. One electrode 14 is provided on the surface facing the electrodes 12 and 13. Three electrodes 12, 13 and 14 are formed in this way. Lead wires are horizontally soldered to the surfaces of the electrodes 12, 13 and 14, respectively. Both tips of each of the lead wires 15, 16 and 17 are made to extend from the end part of the dielectric substrate 11, and six terminals of (a), (b), (c), (d), (e), and (f) are formed. Therefore, three lead wires 15, 16 and 17 are operated as the three lines of two power-source lines and one grounding line. This pattern is equal to the pattern wherein the electrodes are directly connected to the lines. Therefore, the increase in impedance due to the skin effects of the lead wires 15, 16 and 17 is avoided, and the noise preventing effect high frequencies can be improved.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は電源回路にあるラインフィルり部に利用される
ラインバイパス用の複合形セラミックコンデンサに関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a composite ceramic capacitor for line bypass used in a line fill section in a power supply circuit.

従来の技術 従来、この種のセラミックコンデンサは、第5図(al
、 (b)に示すような構成であった。即ち、第5図(
al、(b)において、51は誘電体基板であり、方の
面に相互に離間させて並設する2つの電極52を設け、
これに対向するようにして他方の面に1つの電極53を
設けている。前記の3つの電極52゜52.53からそ
れぞれ導出した3本のリード線54が1つの方向に伸び
て3つの端子を構成しているものであった。
2. Prior Art Conventionally, this type of ceramic capacitor is shown in FIG.
, The configuration was as shown in (b). That is, Fig. 5 (
In al. (b), 51 is a dielectric substrate, and two electrodes 52 are provided on one side of the substrate and spaced apart from each other.
One electrode 53 is provided on the other surface so as to face this. Three lead wires 54 led out from the three electrodes 52, 52, 53, respectively, extend in one direction to constitute three terminals.

以上のように構成された複合形セラミックコンデンサに
ついて、第4図はその回路図を示すものでa、b、c、
d、e、fの符号は、第5図の符号と対応するものであ
る。
Figure 4 shows the circuit diagram of the composite ceramic capacitor constructed as described above.
The symbols d, e, and f correspond to those in FIG.

発明が解決しようとする課題 このような従来の構成では、高い周波数でリード線54
の表皮効果が発生し、インピーダンスの増大のため、ノ
イズの防止効果がなくなるという課題があった。
Problems to be Solved by the Invention In such a conventional configuration, the lead wire 54 is
There was a problem that the skin effect occurred and the noise prevention effect was lost due to the increase in impedance.

本発明はこのような課題を解決するもので、高い周波数
でのノイズを防止することを目的とするものである。
The present invention solves these problems and aims to prevent noise at high frequencies.

課題を解決するための手段 この課題を解決するために本発明は、誘電体基板の両面
に形成された3つの電極にそれぞれに半田付けされた3
つのリード線のそれぞれの両先端部を端子として、6個
の端子を設けたものである。
Means for Solving the Problems In order to solve this problem, the present invention provides three electrodes each soldered to three electrodes formed on both sides of a dielectric substrate.
Six terminals are provided, with both ends of each of the two lead wires serving as terminals.

作用 この構成により、リード線間で発生する表皮効果が、電
源ラインに電極が直付けしたものと同等の状態となり、
表皮効果が発生しなくなる。このことにより、高周波で
のインピーダンス増大がなくなり、ノイズ防止効果が向
上することとなる。
Function: With this configuration, the skin effect that occurs between the lead wires is equivalent to the case where the electrodes are directly connected to the power supply line.
Skin effect no longer occurs. This eliminates impedance increase at high frequencies and improves the noise prevention effect.

実施例 (実施N1) 第1図(a)、 (b)は本発明の第1の実施例による
複合形セラミックコンデンサの斜視図であり、第1図(
al、(blにおいて、11は誘電体基板であり、この
誘電体基板11の一方の面に相互に離間させて並設する
2つの電極12.13を設け、この電極12.13と対
向する面に1つの電極14を設けて構成されたそれぞれ
の3つの電極12.13゜14に、それぞれリード線1
5,16.17を電極面に水平に半田付けして構成され
ている。それぞれのリード線15.16.17の両先端
は誘電体基板11の端部からつき出しており、a、b。
Example (Example N1) FIGS. 1(a) and 1(b) are perspective views of a composite ceramic capacitor according to a first example of the present invention.
In al, (bl, 11 is a dielectric substrate, and two electrodes 12.13 are provided on one surface of this dielectric substrate 11 and arranged in parallel at a distance from each other, and a surface facing this electrode 12.13 is provided. A lead wire 1 is connected to each of the three electrodes 12.
5, 16, and 17 are horizontally soldered to the electrode surface. Both ends of each lead wire 15, 16, 17 protrude from the end of the dielectric substrate 11, a and b.

c、d、e、fの6個の端子を形成するように構成され
たものである。
It is configured to form six terminals c, d, e, and f.

以上のように構成された複合形セラミックコンデンサは
、3本のリード線15.16.17が2つの電源ライン
と1つのアースラインの3つのラインとして働くことに
なり、ラインに電極が直付けされたことと同じことにな
る。したがって、リード線15.16.17の表皮効果
によるインピーダンスの増大はなくなり高周波でのノイ
ズ防止効果を向上することができる。
In the composite ceramic capacitor configured as described above, the three lead wires 15, 16, and 17 function as three lines, two power lines and one ground line, and the electrodes are directly attached to the lines. It will be the same thing. Therefore, the impedance increase due to the skin effect of the lead wires 15, 16, 17 is eliminated, and the noise prevention effect at high frequencies can be improved.

(実施例2) 第2図tal、(blは本発明の第2の実施例による複
合形セラミックコンデンサの斜視図であり、第2図(a
l、(blにおいて、21は誘電体基板であり、この誘
電体基板21の一方の面に相互に離間させて並設する2
つの電極22.23を設け、この電極22.23と対向
する面に1つの電極24を設けて構成されたそれぞれの
3つの電極22,23゜24に、それぞれリード線25
,26.27を電極面に水平に半田付けして構成されて
いる。それぞれのリード線25.26.27の先端はす
べて同一方向に出るように誘電体基板21の片端で折り
曲げて対向する一方の面にもってくる。そして面に水平
に、対向する面のリード線と平行に伸ばし、1つの方向
に6個の端子を形成させる。
(Example 2) Fig. 2 tal and (bl are perspective views of a composite ceramic capacitor according to a second embodiment of the present invention, and Fig. 2
1, (in bl, 21 is a dielectric substrate, and 2 parallel to each other are spaced apart from each other on one surface of this dielectric substrate 21.
Lead wires 25 are connected to each of the three electrodes 22, 23° 24, which are configured by providing two electrodes 22, 23 and one electrode 24 on the surface facing the electrodes 22, 23.
, 26 and 27 are horizontally soldered to the electrode surface. The tips of the respective lead wires 25, 26, and 27 are bent at one end of the dielectric substrate 21 so that they all come out in the same direction, and are brought to one opposing surface. Then, it is stretched horizontally to the surface and parallel to the lead wires on the opposing surface to form six terminals in one direction.

以上のように構成された複合形セラミックコンデンサは
、第1実施例と同じように高周波でのノイズ防止効果が
向上するとともに、プリント基板面に垂直に実装するこ
とができることから、実装面積を改善することになる。
The composite ceramic capacitor configured as described above improves the noise prevention effect at high frequencies as in the first embodiment, and also improves the mounting area because it can be mounted perpendicular to the printed circuit board surface. It turns out.

発明の効果 以上のように本発明によれば、リード線の両先端を端子
にして、6個の端子を構成することにより、電極面の直
付けと同じように高周波でのインピーダンスの増大をな
くシ、周波数特性を向上させる効果が得られる。
Effects of the Invention As described above, according to the present invention, by using both ends of the lead wire as terminals to form six terminals, the increase in impedance at high frequencies can be eliminated in the same way as when directly attaching the electrode surface. In addition, the effect of improving frequency characteristics can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(al、 (b)は本発明の第1の実施例による
複合形セラミックコンデンサの斜視図、第2図(a)。 由)は本発明の第2の実施例による複合形セラミックコ
ンデンサの斜視図、第3図は本発明の複合形セラミック
コンデンサの等価回路図、第4図は従来の複合形セラミ
ックコンデンサの等価回路図、第5図(a)、 (b)
は従来の複合形セラミックコンデンサの要部の上面図と
下面図である。 11.21・・・・・・誘電体基板、12.13,14
゜22,23.24・・・・・・電極、15.16.1
7゜25.26.27・・・・・・リード線。
1(al) and (b) are perspective views of a composite ceramic capacitor according to a first embodiment of the present invention, and FIG. 2(a) is a perspective view of a composite ceramic capacitor according to a second embodiment of the present invention. FIG. 3 is an equivalent circuit diagram of a composite ceramic capacitor of the present invention, FIG. 4 is an equivalent circuit diagram of a conventional composite ceramic capacitor, and FIGS. 5(a) and (b)
1 is a top view and a bottom view of the main parts of a conventional composite ceramic capacitor. 11.21...Dielectric substrate, 12.13, 14
゜22, 23.24... Electrode, 15.16.1
7゜25.26.27...Lead wire.

Claims (3)

【特許請求の範囲】[Claims] (1)2つの電極を誘電体基板の一方の面に相互に離間
させて並設すると共に、前記2つの電極に対向するよう
にして1つの電極を前記誘電体基板の他方の面に設け、
前記3つの電極にそれぞれ半田付けした3本のリード線
の両先端が端子となり、6個の端子を有する複合形セラ
ミックコンデンサ。
(1) Two electrodes are arranged in parallel and spaced from each other on one surface of the dielectric substrate, and one electrode is provided on the other surface of the dielectric substrate so as to face the two electrodes,
Both tips of the three lead wires soldered to the three electrodes serve as terminals, and the composite ceramic capacitor has six terminals.
(2)前記3つの電極面に水平にそれぞれ平行して半田
付された3本のリード線の先端部が、前記誘電体基板の
上端部および下端部より突き出し、6個の端子を形成し
てなる請求項(1)記載の複合形セラミックコンデンサ
(2) The tips of the three lead wires soldered horizontally and parallel to the three electrode surfaces protrude from the upper and lower ends of the dielectric substrate, forming six terminals. A composite ceramic capacitor according to claim (1).
(3)前記3つの電極面に水平にそれぞれ平行して半田
付けされた3本のリード線の先端部が、前記誘電体基板
の片端部で折曲し、前記電極面に対向する他方の面に水
平に前記電極面に半田付けされたリード線と平行に伸び
、1つの方向に6個の端子を形成してなる請求項(1)
記載の複合形セラミックコンデンサ。
(3) The tips of the three lead wires soldered horizontally and parallel to the three electrode surfaces are bent at one end of the dielectric substrate, and the other surface facing the electrode surface is bent at one end of the dielectric substrate. Claim (1), wherein the lead wire extends horizontally in parallel to the lead wire soldered to the electrode surface, and six terminals are formed in one direction.
Composite ceramic capacitor as described.
JP1304141A 1989-11-22 1989-11-22 Composite-type ceramic capacitor Pending JPH03165019A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1304141A JPH03165019A (en) 1989-11-22 1989-11-22 Composite-type ceramic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1304141A JPH03165019A (en) 1989-11-22 1989-11-22 Composite-type ceramic capacitor

Publications (1)

Publication Number Publication Date
JPH03165019A true JPH03165019A (en) 1991-07-17

Family

ID=17929539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1304141A Pending JPH03165019A (en) 1989-11-22 1989-11-22 Composite-type ceramic capacitor

Country Status (1)

Country Link
JP (1) JPH03165019A (en)

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