JPH03159193A - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPH03159193A JPH03159193A JP1298306A JP29830689A JPH03159193A JP H03159193 A JPH03159193 A JP H03159193A JP 1298306 A JP1298306 A JP 1298306A JP 29830689 A JP29830689 A JP 29830689A JP H03159193 A JPH03159193 A JP H03159193A
- Authority
- JP
- Japan
- Prior art keywords
- connector
- substrates
- integrated circuit
- hybrid integrated
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 claims abstract description 20
- 230000002093 peripheral effect Effects 0.000 claims abstract description 12
- 229920005989 resin Polymers 0.000 claims abstract description 12
- 239000011347 resin Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims description 74
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 239000011889 copper foil Substances 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims description 3
- 239000004840 adhesive resin Substances 0.000 claims 1
- 229920006223 adhesive resin Polymers 0.000 claims 1
- 238000005192 partition Methods 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 208000000260 Warts Diseases 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000003014 reinforcing effect Effects 0.000 description 2
- 201000010153 skin papilloma Diseases 0.000 description 2
- 238000010396 two-hybrid screening Methods 0.000 description 2
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006355 external stress Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
Landscapes
- Coupling Device And Connection With Printed Circuit (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
（イ）産業上の利用分野
本発明は混成集積回路装置に関し、特に二枚の混成集積
回路基板とコネクターを備えた混成集積回路装置の構造
に関する。DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a hybrid integrated circuit device, and more particularly to the structure of a hybrid integrated circuit device including two hybrid integrated circuit boards and a connector.
（ロ）従来の技術
第６図および第７図を参照して従来の混成集積回路を説
明する。(b) Prior Art A conventional hybrid integrated circuit will be explained with reference to FIGS. 6 and 7.
第６図に示す混成集積回路は、セラミックス基板あるい
は絶縁金属基板（５１）の表面に所定形状の導電路（図
示しない）を形成し、その導電路上に複数の回路素子（
５３）を固着すると共に所定の導電路に連続する固着パ
ッド（図示しない）に金属性のリード端子（５６）を固
着して混成集積回路基板を形成し、この混成集積回路基
板を樹脂製のケース（５２）によって回路素子（５３）
が密封されるよう耐重し、さらに樹脂（５９）を充填し
てリード端子（５６）の固着部を補強したものである。The hybrid integrated circuit shown in FIG. 6 has a conductive path (not shown) of a predetermined shape formed on the surface of a ceramic substrate or an insulated metal substrate (51), and a plurality of circuit elements (
53) and a metal lead terminal (56) is fixed to a fixing pad (not shown) that is continuous with a predetermined conductive path to form a hybrid integrated circuit board, and this hybrid integrated circuit board is placed in a resin case. (52) by circuit element (53)
The lead terminal (56) is reinforced by filling it with resin (59) and reinforcing the fixing portion of the lead terminal (56).
混成集積回路の高密度化に伴って、第７図に図示するよ
うな二枚の混成集積回路基板（６１）（６２）から構成
される混成集積回路が提案されている。With the increasing density of hybrid integrated circuits, a hybrid integrated circuit constructed from two hybrid integrated circuit boards (61) and (62) as shown in FIG. 7 has been proposed.
同図において、基板（６１）（６２）はアルミニウム等
の金属の一面を樹脂被覆した絶縁金属基板であり、夫々
の基板上には所定形状の導電路（図示しない）が形成さ
れ、その導電路上に複数の回路素子（６３）（６４）が
固着されている。また、所定の導電路に連続する固着パ
ッド（図示しない）には外部接続のための金属性のリー
ド端子（６５）（６６）が固着されている。回路素子お
よびリード端子が固着されて混成集積回路が形成された
基板（６１）（６２）は夫々の回路素子（６３）（６４
）が対向するようにケース材（６７）に固着され、一体
止される。なお、リード端子の上下方向のピッチ２を規
格化されたソケットの１極間ピッチに適合させるために
、リード端子は所定部位で２°だけ基板から離間され、
略り字形状を呈する。In the same figure, substrates (61) and (62) are insulated metal substrates in which one side of metal such as aluminum is coated with resin, and a conductive path (not shown) of a predetermined shape is formed on each substrate. A plurality of circuit elements (63) (64) are fixed to. Furthermore, metal lead terminals (65) and (66) for external connection are fixed to fixed pads (not shown) that are continuous with predetermined conductive paths. The circuit elements (61) (62) to which the circuit elements and lead terminals are fixed to form the hybrid integrated circuit are connected to the respective circuit elements (63) (64).
) are fixed and integrally fixed to the case material (67) so as to face each other. In order to match the vertical pitch 2 of the lead terminals to the standardized pitch between one pole of the socket, the lead terminals are separated from the board by 2 degrees at a predetermined location.
It has an abbreviated shape.
断る混成集積回路は主回路基板に取り付けられるか、あ
るいはリード端子（６５）（６６）にソケット（図示し
ない）が挿入されて一外部回路との接続がなされる。The hybrid integrated circuit is either attached to the main circuit board or a socket (not shown) is inserted into the lead terminals (65) and (66) to connect it to an external circuit.
（ハ）発明が解決しようとする課題
従来の混成集積回路は、リード端子の固着作業に先立っ
て、リード端子の上下、左右の位置合わせおよび傾きの
調節を同時に行って、リード端子の固着部を導電路に正
しく相対させねばならず、組み立て作業に高度の熟練を
要した。(c) Problems to be Solved by the Invention In conventional hybrid integrated circuits, prior to fixing the lead terminals, the vertical and horizontal positioning and tilt adjustment of the lead terminals are simultaneously performed to fix the fixed portion of the lead terminals. The assembly required a high degree of skill as it had to be aligned correctly with the conductive path.
また、リード端子の上下方向の電極間ピッチが設計され
た値とならないことも多かった。Furthermore, the pitch between the electrodes in the vertical direction of the lead terminals often did not reach the designed value.
さらにまた、リード端子の固着部は外力により剥離し易
く、特にリード端子固着直後の混成集積回路基板の取り
扱いには注意を要した。Furthermore, the fixed portions of the lead terminals are likely to peel off due to external force, and special care must be taken when handling the hybrid integrated circuit board immediately after the lead terminals are fixed.
さらにまた、リード端子の固着部をある程度補強したと
しても振動のある例えば車載用に用いた場合などでは、
振動によるリード端子に挿入した外部コネクターの離脱
あるいはリード端子の固着部分の剥離が発生し車載用と
して用いることが困難であった。Furthermore, even if the fixed part of the lead terminal is reinforced to some extent, it may cause vibrations, such as when used in a car.
It has been difficult to use this device in vehicles because the external connector inserted into the lead terminal may come off due to vibration, or the fixed portion of the lead terminal may peel off.
さらにまた、従来の二枚基板からなる混成集積回路の基
板サイズはあまり大きくないために外部回路との接続を
行う入力端子は内幕板の一側辺に設けられていた。しか
し基板サイズが大型化になるにつれて二側辺あるいは四
側辺の内基板周端辺からリード端子が導出され、その結
果、リード端子の位置ズレ等は更に発生し取付は作業が
困難となる。Furthermore, since the board size of a conventional hybrid integrated circuit consisting of two boards is not very large, an input terminal for connection with an external circuit is provided on one side of the inner panel. However, as the size of the board increases, the lead terminals are led out from the inner peripheral edge of the board on the second or fourth side, and as a result, the lead terminals become more misaligned and the mounting becomes difficult.
（ニ）課題を解決するための手段
本発明は上述した課題に鑑みて為されたものであり、所
望形状の導電路が形成され且つ前記導電路上に複数の回
路素子が接続された第１の絶縁基板と前記第１の絶縁基
板に対向して配置され且つ複数の回路素子が搭載された
第２および第３の絶縁基板と夫々の前記基板を一体化す
るケース材とを具備し、前記第１および第２の基板ある
いは第１および第３の基板周端部間に第１のコネクター
を配置し、前記第１の基板上の所定位置に搭載され且つ
その接続用開口部を前記第２および第３の基板面側とな
るように第２のコネクターを配置したことを特徴とする
。(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and provides a first method in which a conductive path of a desired shape is formed and a plurality of circuit elements are connected to the conductive path. The method includes an insulating substrate, second and third insulating substrates arranged opposite to the first insulating substrate and on which a plurality of circuit elements are mounted, and a case material that integrates each of the substrates, A first connector is disposed between the peripheral edges of the first and second substrates or the first and third substrates, and is mounted at a predetermined position on the first substrate and has its connection opening connected to the second and third substrates. A feature is that the second connector is arranged on the third board surface side.
（ホ）作用
この様に本発明に依れば、比較的大型サイズの第１の基
板と第３の基板との周端部分で形成される空間部に第１
のコネクターを配置し、第１の基板上にその接続用開口
部を上面側となる様に第２のコネクターを配置すること
により、複数枚、即ち、三枚の基板よりなる混成集積回
路の外部回路との接続が第１および第２のコネクターの
みで行える。(E) Function As described above, according to the present invention, the first substrate is placed in the space formed by the peripheral end portions of the relatively large-sized first substrate and the third substrate.
By arranging the connector on the first substrate and arranging the second connector on the first substrate so that the connection opening faces the top side, it is possible to Connection to the circuit can be made using only the first and second connectors.
また、三枚の基板よりなる集積度の高い混成集積回路に
もかかわらずリード端子レスの構造が行える。Further, even though the hybrid integrated circuit is composed of three substrates and has a high degree of integration, a structure without lead terminals can be achieved.
（へ）実施例
以下に第１図乃至第５図に示した図面に基づいて本発明
の一実施例を説明する。(F) Embodiment An embodiment of the present invention will be described below based on the drawings shown in FIGS. 1 to 5.
第１図は本発明の混成集積回路装置を示す断面図であり
、（ｌａ） （ｌｂ） （ｌｃ）は第１．第２および第
３の絶縁基板、（２）は夫々の絶縁基板（ｔａ）（ｔｂ
）（ｔｃ）上に形成された導電路、（３）は夫々の絶縁
基板（１ａ）（ｌｂ）（ｌｃ）を連結するフレキシブル
フィルム、（４）はフレキシブルフィルム（３）上に形
成された導電路（２）と接続された第１のコネクター、
（４０）は第１の基板（１ａ）上に搭載された第２のコ
ネクター、（５）は夫々の基板（ｌａ）（ｌｂ）（ｌｃ
）を固着するケース材、（６）は第１および第３の基板
（ｌａ）（ｌｃ）によって形成された空間部、（７）（
７ａ）は空間部（６）内に注入された樹脂である。FIG. 1 is a sectional view showing a hybrid integrated circuit device of the present invention, and (la) (lb) (lc) are the first . second and third insulating substrates, (2) are respectively insulating substrates (ta) (tb);
) (tc), (3) is a flexible film connecting the respective insulating substrates (1a) (lb) (lc), and (4) is a conductive path formed on the flexible film (3). a first connector connected to the channel (2);
(40) is the second connector mounted on the first board (1a), and (5) is the respective board (la), (lb), (lc).
), (6) is the space formed by the first and third substrates (la) and (lc), (7) (
7a) is the resin injected into the space (6).
夫々の絶縁基板（ｌａ）（ｌｂ）（ｌｃ）としてはガラ
スエポキシ樹脂基板、セラミックス基板、フェノール基
板あるいは絶縁処理が施された金属基板が主として用い
られる。本実施例では放熱性およびシールド性を考慮し
アルミニウムの如き、金属基板を用いるものとする。そ
の金属基板の表面にはアルマイト膜が形成され絶縁処理
が行われている。As the respective insulating substrates (la), (lb), and (lc), glass epoxy resin substrates, ceramic substrates, phenol substrates, or metal substrates subjected to insulation treatment are mainly used. In this embodiment, a metal substrate such as aluminum is used in consideration of heat dissipation and shielding properties. An alumite film is formed on the surface of the metal substrate to perform insulation treatment.
夫々の基板（ｌａ）（ｌｂ）（ｌｃ）は第２図に示す如
く、夫々、所定の間隔だけ離間する様フレキシブルフィ
ルム（３）によって連結支持される。フィルム（３）と
してはフレキシブル性を有するものであればよく、ここ
では−膜面なポリイミドフィルムを用いるものとする。As shown in FIG. 2, the respective substrates (la), (lb), and (lc) are connected and supported by flexible films (3) so as to be spaced apart from each other by a predetermined distance. The film (3) may be any film as long as it has flexibility, and here a polyimide film with a -membrane surface is used.
そのフィルム（３）の略全面には銅箔より形成された所
望形状の導電路（２）が形成される。A conductive path (2) of a desired shape made of copper foil is formed on substantially the entire surface of the film (3).
第２図から明らかにされないが、第１の基板（１ａ）と
第３の基板（１ｃ）との離間距離は後述する第１のコネ
クター（４）を夫々の基板（ｌａ）（ｌｃ）の周端間に
配置する必要性から十分な距離が保れている。Although it is not clear from FIG. 2, the distance between the first board (1a) and the third board (1c) is the distance between the first board (1a) and the third board (1c), which will be described later. Sufficient distance is maintained due to the need to place it between the ends.
それに対して、第１の基板（１ａ）と第２の基板（１ｂ
）の離間距離は夫々の基板（１ｇ） （ｌｂ）を折り曲
げ配置できるだけあればよい、即ち、第１の基板（１ａ
）と連結される第２の基板（１ｂ）と第３の基板（１ｃ
）との離間距離をあえて異なる様に設計される。On the other hand, the first substrate (1a) and the second substrate (1b
) should be as long as possible to bend and arrange the respective substrates (1g) (lb), that is, the distance between the first substrate (1a
) and a third substrate (1c) connected to the second substrate (1b) and the third substrate (1c
) is intentionally designed to have a different separation distance from the
第１の基板（１ａ）と第３の基板（ＩＣ）との間のフィ
ルム（３）上に形成される複数の導電路（２）は略直線
状となる様に形成される。そのフィルム（３）上に形成
された導電路（２）上には後述する第１のコネクター（
４）の接続端子が接続される複数のスルーホール（３ｃ
）が形成される。また、スルーホール（３Ｃ）を設けた
フィルム（３）の近傍の領域には補強用のフィルム板（
３ｄ）が貼着された第１のコネクター（４）の接続端子
固着部分で発生する歪を最小限に抑制する様に設計され
ている。The plurality of conductive paths (2) formed on the film (3) between the first substrate (1a) and the third substrate (IC) are formed in substantially straight lines. On the conductive path (2) formed on the film (3) is a first connector (described later).
There are multiple through holes (3c) to which the connection terminals of 4) are connected.
) is formed. In addition, a reinforcing film plate (
3d) is designed to minimize distortion occurring at the connection terminal fixed portion of the first connector (4).
夫々の基板（ｔａ）（ｌｂ）（ｌｃ）上に形成された導
電路（２）の所望位置・に複数の回路素子が搭載される
。A plurality of circuit elements are mounted at desired positions of conductive paths (2) formed on the respective substrates (ta), (lb), and (lc).
第１の基板（１ａ）上にはパワートランジスタあるいは
メモリーＩＣ等の発熱を有する回路素子（８）が主に搭
載きれ、近傍の導電路（２）とワイヤで接続され、第２
および第３の基板（ｌｂバｌｃ）上にはトランジスタ、
チップ抵抗、チップコンデンサー等の発熱を有さない回
路素子（８）が主に搭載された近傍の導電路（２）とワ
イヤで接続される。On the first substrate (1a), heat-generating circuit elements (8) such as power transistors or memory ICs can be mainly mounted, and are connected to the nearby conductive path (2) with wires, and the second
and a transistor on the third substrate (lb/lc),
Circuit elements (8) that do not generate heat, such as chip resistors and chip capacitors, are mainly connected to conductive paths (2) in the vicinity by wires.
また第１の基板（１ａ）上にはもう一方のコネクター、
即ち、第２のコネクター（４０）が固着きれる。Also on the first board (1a) is the other connector,
That is, the second connector (40) is completely fixed.
ここで第１および第２のコネクター（４）（４０）につ
いて簡単に説明する。Here, the first and second connectors (4) (40) will be briefly explained.
第１および第２のコネクター（４）は第３図および第４
図に示す如く、−膜面に標準化された雌型コネクターが
用いられる。第１および第２のコネクター（４）（４０
＞の開口部（４ａ）（４０ａ）内には図示されないが多
数本の外部接続用の端子が配置きれている。その外部接
続用端子から延在されたリード端子（４ｂ）（４０ｂ）
が第１および第２のコネクター（４）（４０）から導出
されている。この第１のリード端子（４ｂ）は第１．第
３の基板（１ｇ）（ｌｃ）間のフレキシブルフィルム（
３）のスルーホール（３Ｃ）ニ挿入すレ導ｔ。The first and second connectors (4) are shown in Figures 3 and 4.
As shown, a standardized female connector is used on the membrane surface. First and second connectors (4) (40
Although not shown, a large number of external connection terminals are arranged inside the openings (4a) (40a). Lead terminals (4b) (40b) extending from the external connection terminals
are derived from the first and second connectors (4) (40). This first lead terminal (4b) is the first lead terminal (4b). Flexible film between third substrate (1g) (lc) (
3) Insert the lead into the through hole (3C).
路（２）と半田で固着接続され、第２のリード端子（４
０ｂ）は第１の基板（１日）上の導電路（２）に固着接
続される。It is firmly connected to the lead terminal (2) by soldering, and the second lead terminal (4
0b) is fixedly connected to the conductive track (2) on the first substrate (1).
夫々＋７）基板（１ｇ＞（ｌｂ）（ｌｃ）はケース材（
５）で夫々の回路素子（８〉が対向する様に一体化され
る。+7 respectively) The board (1g>(lb) (lc) is the case material (
In step 5), the respective circuit elements (8>) are integrated so as to face each other.
第５図はケース材（５）を示す斜視図であり、枠状に形
成され枠体部（５８）と、その枠体部（５ａ）の長手方
向の両端部に枠体部（５８）より延在形成された延在板
（５ｂ）と、枠体部（５ａ）と同一の高さを有した補助
枠（５ｃ）と、補助＃（５Ｃ）と枠体部（５ａ）とを連
結する連結体（５ｄ）とから構成され、絶縁樹脂材で形
成される。ケース材（５）の周端部と夫々の基板（１ａ
）（ｌｂ＞（ｌｃ）との周端部は実質的に等しくなる様
に設計されている。FIG. 5 is a perspective view showing the case material (5), which is formed into a frame shape and has a frame portion (58) and a frame portion (58) attached to both ends of the frame portion (5a) in the longitudinal direction. Connecting the extended plate (5b), the auxiliary frame (5c) having the same height as the frame body part (5a), and the auxiliary # (5C) and the frame body part (5a). The connecting body (5d) is made of an insulating resin material. The peripheral edge of the case material (5) and each substrate (1a
) (lb>(lc) and the peripheral edges are designed to be substantially equal.
夫々の基板（ｌａ）（１ｂ）（ｌｃ）とケース材（５）
とを固着する場合、第１の基板（１ａ）を下側、第２．
第３の基板（ｌｂ）（ｌｃ）を上側となる様に夫々の基
板間のフィルム（３）を折り曲げ配置させケース材に基
板を固着一体止する。このとき、ケース材（５）の補助
枠（５ｃ）内には第２のコネクター（４０）が完全に収
納配置されると共に補助枠（５Ｃ）によって第２．第３
の基板（ｌｂ） （ｌｃ）が同一面で区画されることに
なる。Each board (la) (1b) (lc) and case material (5)
When fixing the first substrate (1a) to the lower side, the second substrate (1a) to the lower side, and the second substrate (1a) to the lower side.
The film (3) between the respective substrates is bent and arranged so that the third substrates (lb) and (lc) are on the upper side, and the substrates are fixed and integrally fixed to the case material. At this time, the second connector (40) is completely accommodated within the auxiliary frame (5c) of the case material (5), and the second connector (40) is completely housed within the auxiliary frame (5C). Third
The substrates (lb) and (lc) are partitioned on the same surface.
夫々の基板（ｌａ）（ｌｂ）（ｌｃ）をケース材（５）
で一体止すると、ケース材（５）の延在板（ｓｂ）と第
１．第３の基板（ｌａ）（ｌｃ）の周端部分で形成され
た空間部（６）にフレキシブルフィルム（３）が蛇腹状
に折り曲げ配置されて第１のコネクター（４）が収納配
置される。Each board (la) (lb) (lc) is made of case material (5)
When the extension plate (sb) of the case material (5) and the first. A flexible film (3) is bent into a bellows shape in a space (6) formed at the peripheral end portion of the third substrate (la) (lc), and the first connector (4) is housed therein.
第１および第３の基板（ｌａ）（ｌｃ）周端部で形成き
れた空間部（６）の高さと第１のコネクター（４）の厚
みとは実質的に同一で形成されているために第１のコネ
クター（４）に設けられた突出部（４Ｃ）と基板（ｌａ
） （ｌｂ）の周端表面に設けられた凸部（ｌａ’）（
ｌｂ’）とが当接され空間部（６）内でコネクター（４
）が仮固定される。Because the height of the space (6) completely formed at the peripheral edges of the first and third substrates (LA) (LC) and the thickness of the first connector (4) are substantially the same, The protrusion (4C) provided on the first connector (4) and the board (la
) (lb) has a convex portion (la') (
lb') is in contact with the connector (4) in the space (6).
) is temporarily fixed.
空間部（６）内にはエポキシ樹脂（７）が充填され第１
のコネクター（４）が固定きれる。空間部（６）内に樹
脂（７）を充填する注入口はコネクター（４）の突出部
（４Ｃ）と基板（ｌａ）（ｌｂ）の凸部（ｌａ’）（ｌ
ｂ’）とで形成されたすき間（矢印）あるいぼ図示され
ないが第１のコネクター（４）の長手方向の両端のすき
間から注入される。樹脂（７）注入の際にコネクター（
４）は突出部（４Ｃ）、凸部（ｌａ’ ）（ｌｂ’ ）
および突出棒（５ｃ）とで位置規制されるために位置ズ
レを起こすことはない。The space (6) is filled with epoxy resin (7) and the first
The connector (4) can be fixed. The injection port for filling the resin (7) into the space (6) is connected to the protrusion (4C) of the connector (4) and the protrusion (la') (l) of the board (la) (lb).
b') is injected from the gap (arrow) formed between the wart and the wart (not shown) at both longitudinal ends of the first connector (4). When injecting resin (7), connect the connector (
4) is a protrusion (4C), a convex part (la') (lb')
Since the position is regulated by the projecting rod (5c) and the protruding rod (5c), no misalignment occurs.
一方、第２のコネクター（４０）とケース材（５〉の補
助枠（５ｃ）間のスペース内にもエポキシ樹脂（７ａ）
が充填され、第２のコネクター（４０）が強固に固定さ
れる。On the other hand, epoxy resin (7a) is also applied in the space between the second connector (40) and the auxiliary frame (5c) of the case material (5>).
is filled, and the second connector (40) is firmly fixed.
なお、第１の基板（１ａ）と第２の基板（１ｂ）との折
り曲げ部分は蓋体〈１０）によって完全被覆される。Note that the bent portion of the first substrate (1a) and the second substrate (1b) is completely covered by the lid (10).
°斯る本発明に依れば、比較的大型サイズの第１の基板
（１ａ）と第３の基板（１ｃ）との周端部分で形成され
る空間部（６）に第１のコネクター（４）を配置し、第
１の基板（１ａ）上にその接続用開口部を上面側となる
様に第２のコネクター（４０）を配置することにより、
複数枚、即ち、三枚の基板よりなる混成集積回路の外部
回路との接続が第１および第２のコネクター（４）（４
０）のみで行えるので外部回路との接続を極めて容易に
行うことが可能となる。According to the present invention, the first connector ( 4), and the second connector (40) is placed on the first board (1a) with its connection opening facing upward.
The connection of a hybrid integrated circuit made of multiple boards, that is, three boards, to an external circuit is through the first and second connectors (4) (4).
0), it is possible to connect to an external circuit extremely easily.
（ト）発明の効果
以上に詳述した如く、本発明に依れば、複数枚の基板よ
りなる比較的大型の混成集積回路装置の接続構造がコネ
クターのみで行えるため接続が極めて容易に行える。(G) Effects of the Invention As detailed above, according to the present invention, the connection structure of a relatively large hybrid integrated circuit device consisting of a plurality of substrates can be made using only a connector, so that connection can be made extremely easily.
また、第１および第２のコネクターは樹脂によって強固
に固定されているため、振動等の外部応力に対して非常
に強度の優れたコネクター一体型の混成集積回路装置を
提供することができる。Further, since the first and second connectors are firmly fixed with resin, it is possible to provide a connector-integrated hybrid integrated circuit device that has excellent strength against external stress such as vibration.
また、本発明で用いられる夫々のコネクターは標準化さ
れたものを使用できるのでコスト高となることはない。Further, since each connector used in the present invention can be standardized, the cost will not be high.
更に、本発明では第１のコネクターはフレキシブルフィ
ルムを介して取り付けられているために第１の基板で発
熱する熱の影響を全く受けることはない。Furthermore, in the present invention, since the first connector is attached via a flexible film, it is not affected by the heat generated by the first board at all.
更に、本発明ではフレキシブル材上に形成きれる導電路
に銅箔を用いているために大電流を流すことが可能であ
る。Furthermore, in the present invention, since copper foil is used for the conductive path that can be formed on the flexible material, it is possible to flow a large current.
更に本発明では夫々のコネクターは標準化きれたものを
用いるために基板サイズの変更あるいはコネクター自体
の変更があったとしても容易に設計変更が行えるメリッ
トを有する。Furthermore, the present invention has the advantage that since each connector is standardized, the design can be easily changed even if the board size or the connector itself is changed.
第１図は本発明を示す断面図、第２図Ａ、Ｂは本実施例
で用いられるフレキシブルフィルムおよび基板を示す断
面図、平面図、第３図および第４図はコネクターを示す
斜視図、第５図はケース材を示す斜視図、第６図および
第７図は従来例を示す断面図である。
（ｌａ）（ｌｂ） （ｌｃ） ・・・基板、 （２）・
・・導電路、 （３）−・・フレキシブルフィルム、（
４）・・・第１のコネクター （４０）・・・第２の
コネクター （５）・・・ケース材、 （６）・・・
空間部、 （７）・・・樹脂。FIG. 1 is a sectional view showing the present invention, FIGS. 2A and B are sectional views and plan views showing the flexible film and substrate used in this embodiment, and FIGS. 3 and 4 are perspective views showing the connector. FIG. 5 is a perspective view showing a case material, and FIGS. 6 and 7 are sectional views showing a conventional example. (la) (lb) (lc) ... board, (2)
...Conducting path, (3)-...Flexible film, (
4)...First connector (40)...Second connector (5)...Case material, (6)...
Space part, (7)...Resin.
Claims (10)
複数の回路素子が接続された第１の絶縁基板と 前記第１の絶縁基板に対向して配置され且つ複数の回路
素子が搭載された第２および第３の絶縁基板と 夫々の前記基板を一体化するケース材とを具備し、 前記第１および第２の基板あるいは第１および第３の基
板周端部間に第１のコネクターを配置し、 前記第１の基板上の所定位置に搭載され且つその接続用
開口部を前記第２および第３の基板面側となるように第
２のコネクターを配置したことを特徴とする混成集積回
路装置。(1) A first insulating substrate on which a conductive path of a desired shape is formed and a plurality of circuit elements connected to the conductive path; and a first insulating substrate disposed opposite to the first insulating substrate and on which a plurality of circuit elements are mounted. and a case material that integrates the first and second insulating substrates, and a first connector between the first and second substrates or the peripheral edge portions of the first and third substrates. and a second connector mounted at a predetermined position on the first board and with its connection opening facing the second and third board surfaces. Integrated circuit device.
シブルフィルムによって連結されていることを特徴とす
る請求項１記載の混成集積回路装置。(2) The hybrid integrated circuit device according to claim 1, wherein the first substrate is connected to the second and third substrates by a flexible film.
記導電路が形成されたことを特徴とする請求項２記載の
混成集積回路装置。(3) The hybrid integrated circuit device according to claim 2, wherein the conductive path made of copper foil is formed on the flexible film.
板を連結する前記フレキシブルフィルム上に形成された
導電路に接続され、前記第１および第３の基板周端部分
で形成される空間部で前記フレキシブルフィルムの所定
部分を折り曲げ配置させるように前記コネクターを収納
し、前記空間部に注入される接着性樹脂剤で前記第１の
コネクターを固定したことを特徴とする請求項１記載の
混成集積回路装置。(4) The first connector is connected to a conductive path formed on the flexible film that connects the first and third substrates, and the space is formed by the peripheral edge portions of the first and third substrates. 2. The connector according to claim 1, wherein the connector is housed in such a manner that a predetermined portion of the flexible film is bent and arranged in the space, and the first connector is fixed with an adhesive resin injected into the space. Hybrid integrated circuit device.
第２および第３の基板とを実質的に同一面としたことを
特徴とする請求項１記載の混成集積回路装置。(5) The hybrid integrated circuit device according to claim 1, wherein the tip end surface of the opening of the second connector and the second and third substrates are substantially on the same surface.
面には複数の突出部を設けたことを特徴とする請求項１
記載の混成集積回路装置。(6) Claim 1 characterized in that a plurality of protrusions are provided on the surface of the first connector disposed in the space.
The hybrid integrated circuit device described.
させた一定の厚みを有する枠体を用いたことを特徴とす
る請求項１記載の混成集積回路装置。(7) The hybrid integrated circuit device according to claim 1, wherein the case material is a frame having a constant thickness that is substantially coincident with the peripheral edge of each of the substrates.
画し且つ前記枠体の一部として設けられた補助枠を有す
ることを特徴とする請求項１記載の混成集積回路装置。(8) The hybrid integrated circuit device according to claim 1, wherein the case material has an auxiliary frame that partitions the second and third substrates and is provided as a part of the frame.
前記補助枠内に充填される樹脂で前記第２のコネクター
を固定することを特徴とする請求項１記載の混成集積回
路装置。(9) arranging the second connector within the auxiliary frame;
2. The hybrid integrated circuit device according to claim 1, wherein said second connector is fixed by resin filled in said auxiliary frame.
基板を用いたことを特徴とする請求項１記載の混成集積
回路装置。(10) The hybrid integrated circuit device according to claim 1, wherein each of the insulating substrates is a metal substrate subjected to an insulation treatment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29830689A JP2854041B2 (en) | 1989-11-16 | 1989-11-16 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29830689A JP2854041B2 (en) | 1989-11-16 | 1989-11-16 | Hybrid integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03159193A true JPH03159193A (en) | 1991-07-09 |
| JP2854041B2 JP2854041B2 (en) | 1999-02-03 |
Family
ID=17857938
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29830689A Expired - Lifetime JP2854041B2 (en) | 1989-11-16 | 1989-11-16 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2854041B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109121291A (en) * | 2017-06-26 | 2019-01-01 | 英飞凌科技奥地利有限公司 | Semiconductor devices and method for constructing semiconductor devices |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61171280U (en) * | 1985-04-11 | 1986-10-24 | ||
| JPS6365246U (en) * | 1986-10-17 | 1988-04-30 | ||
| JPH0189488U (en) * | 1987-12-04 | 1989-06-13 |
-
1989
- 1989-11-16 JP JP29830689A patent/JP2854041B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61171280U (en) * | 1985-04-11 | 1986-10-24 | ||
| JPS6365246U (en) * | 1986-10-17 | 1988-04-30 | ||
| JPH0189488U (en) * | 1987-12-04 | 1989-06-13 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109121291A (en) * | 2017-06-26 | 2019-01-01 | 英飞凌科技奥地利有限公司 | Semiconductor devices and method for constructing semiconductor devices |
| CN109121291B (en) * | 2017-06-26 | 2023-07-04 | 英飞凌科技奥地利有限公司 | Semiconductor device and method for constructing semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2854041B2 (en) | 1999-02-03 |
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