JPH03159178A - Manufacture of capacitive schottky diode - Google Patents

Abstract

PURPOSE:To obtain a manufacturing method for suppressing concentration of an electric field without increasing its cost by forming an ohmic electrode on a first high concentration layer, and forming a Schottky electrode on a second high concentration layer and a low concentration layer. CONSTITUTION:A protective film 2 for through-ion implanting is formed on a semiconductor substrate 1, an opening 4a is formed in the film 2, and ions are implanted from the film 2 and the opening 4a to form a first high concentration layer 5, a second high concentration layer 6 and a low concentration layer 7. Thereafter, the film 2 is removed, an ohmic electrode 9 is formed on the layer 5, and a Schottky electrode 8 is formed on the layers 6, 7. For example, an SiN film 2 is formed on a semi-insulating GaAs substrate 1, an opening 4a is formed, a resist 3 is formed on the film 2, and an opening 4b is formed. Then, with the resist 3 as a mask Si ions are implanted, the resist 3 is then removed, it is annealed to form n<+>-channels 5, 6 and n-channel 7.

Description

Detailed Description of the Invention (a) Industrial Application Field The present invention relates to a method for manufacturing a capacitive Schottky diode for L-Si using a semi-insulating GaAs substrate, and in particular to a method for manufacturing a capacitive Schottky diode with a high reverse withstand voltage. Regarding the manufacturing method.

(b) Conventional technology In LSIs using semi-insulating GaAs substrates, FET (i.e.
WSi alloy/fL (an alloy of tungsten; ~■ and silicon + Sr), which has high resistance and heat resistance, is used as the gate electrode material of field effect transistors for boat fishing. This is because, unlike microwave applications, digital signal processing does not necessarily require the use of low-resistance gate electrode materials.

It is also desirable to use a WSi alloy for the Schottky electrode of a capacitive Schottky diode required in an LSI using a semi-insulating GaAs substrate.

FIG. 4 is a schematic cross-sectional view of a conventional capacitive Schottky diode, and the conventional capacitive Schottky diode will be explained based on this diagram.

By implanting Si ions etc. into the semi-insulating GaAs substrate 41 and annealing it, an n"channel 42 is formed, and on this n" channel 42 there is formed a WSi alloy.
A VSi electrode 43 and an ohmic electrode 44 are formed.

In the capacitive Schottky diode manufactured in this way, when a negative potential is applied to the WS first Si electrode 43 and the ohmic electrode 44, a current is concentrated on the end face of the WS i electrode 43. Therefore, there is a problem that the reverse withstand voltage is low due to this electric field concentration.

FIG. 5 is a schematic sectional view of another conventional capacitive Schottky diode, and the other conventional capacitive Schottky diode will be explained based on this diagram.

By implanting Si ions etc. into the semi-insulating GaAs substrate 51 and annealing it, an n+ channel 52,53 is formed.
and n-channel 54, and these channels 52
．． A WSi electrode 55 and an ohmic electrode 56 made of a WSi alloy are formed on 53 and 54. In this case, the ion implantation process is performed twice, once to form n" channels 52 and 53 and once to form n channel 54.
times are required.

In the capacitive Schottky diode manufactured in this manner, the electric field concentration that was a problem in the prior art shown in FIG. 4 is alleviated. That is, in this other conventional technique, since the end face of the WSi electrode 55 is located on the lightly doped n-channel 54, the electric field concentration on the end face of the WSi electrode 55 can be alleviated.

(c) 5! However, in the other conventional technique shown in FIG. 5, it is necessary to carry out the ion implantation process twice in the production of a capacitive Schottky diode, resulting in an increase in cost.

The present invention has been made in view of the above problems, and it is an object of the present invention to provide a method for manufacturing a capacitive Schottky diode that can suppress the electric field concentration without increasing costs.

(d) Means for Solving the Problems The present invention includes a step of forming a protective film for through ion implantation on a semiconductor substrate, a step of forming an opening in the insulating film, and ion implantation from the insulating film and the opening. a step of forming a first high concentration layer, a second high concentration layer, and a low concentration layer; a step of removing the insulating film; and a step of forming an ohmic electrode on the first high concentration layer. and the second high concentration layer and the low i! A method for manufacturing a capacitive Schottky diode, comprising the step of forming a Schottky electrode on a single layer.

(E) The concentration profile of the ion-implanted layers (first and second high concentration layers) formed by ion implantation from the functional insulating film (through ion implantation) is approximately the same as shown in FIG. The concentration profile of the ion implanted layer (low concentration layer) formed by ion implantation (normal ion implantation) through an opening formed in the film is as shown in FIG. From this, it can be seen that the concentration peak position of the ion implanted layer formed by through ion implantation is closer to the substrate surface than that of the ion implanted layer formed by normal ion implantation.

Therefore, by positioning the end face of the Schottky electrode on the ion implantation layer formed by normal ion implantation, concentration of the electric field on the end face can be suppressed.

(F) Example The method of the present invention will be explained in detail based on FIGS. 1A to 1E.

SiNM (
Form an insulating film 2, and form an opening 4a by photolithography (FIG. 1A). Form a resist 3 on the eSiN film 2, and form an opening 4b in the resist 3.
Figure 1B). This opening 4b is located in the region of the substrate 1 where the capacitive Schottky diode is formed.

By implanting Si ions through the opening 4b using the resist 3 as a mask, and after removing the resist 3, annealing (850° C., 5 seconds) is performed using the 7-eighth-to-7-eighth method.
n channel (first and second high concentration layers) 5.6 and n
A channel (low concentration layer) 7 is formed (FIG. 1C). In this ion implantation step, an n-channel 7 is formed in a portion of the substrate 1 corresponding to the opening 4a, and the S remaining in the substrate 1 is
An 04 channel 5.6 is formed in a portion corresponding to the iN film 2. That is, the n-channel 7 is formed by ion implantation directly into the substrate 1, and the n" channel 5.6 is formed by ion implantation from the SiN film 2 (through ion implantation). As explained in the operation section, through ion implantation is performed. The peak concentration of the ion-implanted layer formed by ion implantation is closer to the substrate surface than that of the ion-implanted layer formed by normal ion implantation.
．． 6 has a high concentration, and n-channel 7 has a low concentration.

A resist is formed over the entire surface, and an opening is formed in the resist. This opening is located at a portion where the connecting portion of n''' channel 6 and n channel 7 is exposed.
04 channel 6 and n channel 7 by depositing i-alloy and removing, i.e., lifting off, the resist.
A WSi electrode (Schottky electrode) 8 is formed on top (first
Figure D).

The area of the WSi electrode 8 was 30×3071 m”.

A resist is formed over the entire surface, and an opening is formed in the resist. This opening is located at a location where the 04 channel 3 is exposed. 04 by forming an AuGe/Ni/Au film on the entire surface, lifting off, and performing heat treatment.
Form an ohmic tL pole 9 on the channel 5 (first
Figure E).

Incidentally, in the above-mentioned embodiment, a method of manufacturing only a capacitive Schottky diode was described, but in order to manufacture an LSI, it is preferable to simultaneously form FETs and the like using each of the above steps.

(G) Effects of the Invention As is clear from the above description, the present invention can realize a structure that suppresses electric field concentration on the end face of a Schottky electrode by a single ion implantation, and can reduce costs. .

[Brief explanation of the drawing]

1A to 1E are process explanatory diagrams for explaining one embodiment of the method of the present invention, FIGS. 2 and 3 are diagrams showing the concentration profile of the ion-implanted layer, and FIGS. 4 and 5 are diagrams showing the conventional method. FIG. 2 is a schematic cross-sectional view of a capacitive Schottky diode. l... Semi-insulating GaAs substrate (semiconductor substrate), 2...
・SiN film (insulating film), 3.4...opening, 5...19
Channel (first high concentration layer), 6...n'' channel (second high concentration layer), 7...-n channel (low concentration layer), 8...W S i @ pole (Schottky electrode) ,9
... Ohmi 7 electrode. Figure 1A

Claims (1)

[Claims] 1. A step of forming a protective film for through ion implantation on a semiconductor substrate, a step of forming an opening in the insulating film, and a step of implanting ions through the insulating film and the opening to form a first high concentration layer,
a step of forming a second high concentration layer and a low concentration layer; a step of removing the insulating film; a step of forming an ohmic electrode on the first high concentration layer; and a step of forming the second high concentration layer. and forming a Schottky electrode on the low concentration layer.