JPH0315848B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a timer circuit, and more particularly to a timer circuit in which a capacitor having a negative temperature versus capacitance characteristic within a working temperature range is used in a charging/discharging circuit for determining timer time.

[Technical background of the invention and its problems]

In this type of timer circuit, ceramic capacitors are often used as charging/discharging capacitors. The temperature characteristics of this ceramic capacitor are generally negative up to about 85°C.
As the temperature rises further, the characteristic changes to positive. Therefore, when the operating temperature range of the timer circuit is set to about 85° C. or lower, there is a drawback that the timer time changes depending on the temperature due to the negative characteristics of the ceramic capacitor.

[Purpose of the invention]

The present invention has been made to eliminate the above-mentioned drawbacks, and provides a timer circuit that can obtain a constant timer time with respect to temperature changes within the operating temperature range.

[Summary of the invention]

That is, the timer circuit of the present invention has a timer period that has a time width from when a capacitor having negative characteristics in the operating temperature range starts being charged or discharged with a constant current from a constant current source until the terminal voltage reaches a constant value. A device for outputting a signal, in which the constant current has a positive temperature characteristic by using a diffused resistor having a positive temperature characteristic in the integrated circuit as a part of the constant current generation reference resistor in the constant current source. The present invention is characterized in that the negative characteristics of the capacitor are offset. Therefore, a constant timer time can be obtained in response to temperature changes within the operating temperature range.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

In FIG. 1, 1 is a bipolar integrated circuit, and 2 to 5 are provided as external terminals thereof, and a part of a timer circuit is provided as part of its internal circuit. That is, in this timer circuit, 5 is a constant current source that generates a constant current for charging, and includes a PNP type transistor _Q1 whose base is supplied with the first reference voltage V _R1 and whose collector is grounded, and this transistor _Q1. A current source circuit 6 connected between the emitter of the transistor and the +Vcc power supply, and the transistor
An NPN transistor Q ₂ whose base is connected to the emitter of Q ₁ , a resistor R ₁ (P ^- diffused resistor with positive temperature characteristics) connected between the emitter of this transistor Q ₂ and external terminal 2, and , a collector-emitter connection is established between a resistor (for example, a carbon resistor) whose resistance value changes due to temperature changes, which is externally connected to this external terminal 2 and connected to ground (for example, a carbon resistor), and the collector of the transistor Q ₂ and the +Vcc power supply. A PNP transistor _Q3 whose collector and base are connected together, and this transistor
The base is connected to the base of Q ₃ and the emitter is +Vcc
It consists of a PNP transistor _Q4 connected to the power supply and whose collector serves as a constant current outflow output terminal. The transistors Q ₃ and Q ₄ constitute a current mirror circuit 7, the output terminal of which is connected to an external terminal 3, which has a negative characteristic in the operating temperature range (for example, about 85°C or less). A capacitor (for example, a ceramic capacitor) C having a capacitor C is externally connected to ground. Further, a series circuit of a resistor R ₂ and an NPN transistor Q ₅ is connected to the output terminal of the current mirror circuit 7, and an external terminal 4 for timer operation start input is connected to the base of the transistor Q ₅ . has been done. Reference numeral 8 denotes a voltage comparator circuit whose (+) input terminal is connected to the output terminal of the current mirror circuit 7, the second reference voltage VR ₂ is applied to its (-) input terminal, and the output terminal thereof is connected to the base of NPN transistor _Q6 . The emitter of this transistor _Q6 is grounded, and the collector is connected to the external terminal 5 for outputting a timer time signal.

Next, the operation of the above timer circuit will be explained. In the constant current source 5, the emitter potential Va of the transistor _Q1 is V _R1 +V _BEQ1 (emitter-base voltage of the transistor _Q1 ),
The emitter potential Vb of Q ₂ is Va−V _BEQ2 (transistor
Q ₂ emitter-emitter voltage) = V _R1 + V _BEQ1 −
V _BEQ2 . Here, if we design in advance so that V _BEQ1 ≒ V _BEQ2 at room temperature (Ta = 25℃) within the operating temperature range, then V _BEQ1 and V _BEQ2
and almost cancel each other out, including the temperature characteristics, and Vb becomes approximately V _R1 . Therefore, the current I ₁ of the transistor Q ₂ is I ₁ =V _R1 /R ₁ +RT (1), and the output current of the current mirror circuit 7 is approximately equal to the above current I ₁ and is constant from the constant current source 5. A current I ₁ is output.

Now, when a predetermined voltage is applied to the external terminal 4 and the transistor _Q5 is turned on, the charge in the capacitor C is discharged through the transistor _Q5 ,
The terminal voltage Vc becomes zero, the output level of the voltage comparison circuit 8 becomes low, and the transistor _Q6 is turned off. Next, by setting the voltage of the external terminal 4 to 0V, for example, the transistor Q ₅
is reversed to the off state and timer operation starts. That is, charging of capacitor C by constant current I ₁ begins, its terminal voltage Vc begins to rise, and eventually Vc
When V _R2 is reached and exceeded, the level of the voltage comparison circuit 8 becomes high, and the transistor Q ₆ is turned on. Therefore, a timer time signal is obtained at the external terminal 5 which becomes approximately at the ground level after a timer time _T1 expressed by the following equation from the start of the timer operation.

T ₁ =V _T ×V _R2 /I ₁ =R ₁ +RT/V _R1 ×C _T ×V _R2 ...(2) Therefore, the negative characteristic of C _T and the positive characteristic of R ₁ cancel each other out. I know it fits.

Next, a concrete explanation will be given using a numerical example. RT=60K
Ω, CT = 0.2μF, R ₁ = 40KΩ, V _R1 = 1v, then from equations (1) and (2) I ₁ = 1v/(40+60)KΩ = 10μA...(3) T ₁ = 0.2×10 ^-6 ×V _R2 /10×10 ^-6 =0.02V _R2 ...(4) is found. The temperature characteristics of capacitor C are -10% at the upper limit of the operating temperature range (Ta = 85℃).
If so, the capacitance decrease at Ta = 85℃ is △C _T =C _T ×10% = 0.02μF, and C _T ′ = C _T
−△C _T =0.18μF. Also, if the characteristic of resistor R ₁ is +5000ppm, the increase in resistance value at Ta = 85℃ is △R ₁ = R ₁ × 0.5% × (= 85-25 = 60℃) =
It becomes 12KΩ, and R ₁ ′=R ₁ +△R ₁ =52KΩ.
Therefore, the constant current I ₁ ′ and timer time T ₁ ′ at Ta=85°C are I ₁ ′=1v/(52+60)KΩ=8.9μA ……(3′) T ₁ ′=0.18×10 ^-6 × V _R2 /8.9×10 ^-6 =0.0202V _R2 ……(4
′), T ₁ ′ in the above equation (4′) is almost equal to T ₁ in the previous equation (4), and a constant timer time can be obtained with respect to temperature changes.

Note that the temperature correction of constant current I ₁ ' by resistor R ₁ shown in equation (3') above can be slightly corrected by changing the size relationship between resistor R ₁ and external resistor RT. , R ₁ becomes larger, the correction amount becomes larger, and R ₁ becomes smaller, the correction amount becomes smaller.

FIG. 2 is related to another embodiment of the present invention,
This shows a timer circuit that performs a timer operation by discharging the charge of a capacitor C with a constant current.Compared to the timer circuit of FIG. 3
A current mirror circuit 21 for constant current inflow between
, a circuit that charges the capacitor C instead of a circuit that discharges the charge of the capacitor C is used as the timer operation start control circuit, and a circuit that charges the capacitor C is used as the timer operation start control circuit. ) The difference is that V _R2 is applied to the input terminal and the (-) input terminal is connected to external terminal 3, but the other parts are the same, so the same parts in Fig. 2 as in Fig. 1 are given the same symbols and explained. will be omitted and the different parts will be mainly explained below. The current mirror circuit 21 is
It consists of an NPN transistor _Q7 whose collector and base are connected to each other and whose emitter is grounded, and an NPN transistor _Q8 whose base is connected to the base of this transistor _Q7 , whose emitter is grounded and whose collector serves as a current inflow end. When the constant current I ₁ flows through the transistor Q ₇ , the constant current I ₁ flows into the transistor Q ₈ . In addition, an NPN type transistor is connected to external terminal 4 for timer operation start input.
The base of Q ₅ is connected, the emitter of this transistor Q ₅ is grounded, and the collector is connected to the current source circuit 22.
Connected to +Vcc power supply via. moreover,
The base of an NPN transistor Q ₉ is connected to the collector of the transistor Q ₅ , the collector of this transistor Q ₉ is connected to the +Vcc power supply via a resistor R ₃ , and the emitter is connected to the external terminal 3 .

In the timer circuit shown in FIG. 2, when, for example, 0V is applied to the external terminal 4, the transistor _Q5 is turned off and the transistor _Q9 is turned on _. As constant current _I1 flows in, capacitor C
is rapidly charged through R ₃ and Q ₉ , and the terminal voltage Vc of this capacitor C becomes larger than V _R2 , so
The output level of the voltage comparator circuit 8 becomes low, and the transistor _Q6 is turned off. Next, by setting the voltage of the external terminal 4 to a predetermined voltage, the transistor _Q5 is turned on and the transistor _Q9 is turned off, thereby starting the timer operation. That is, the capacitor C starts discharging due to the constant current _I1 , and its terminal voltage Vc starts to drop. When Vc eventually reaches V _R2 and becomes lower than that, the output level of the voltage comparator circuit 8 becomes high, and the transistor _Q6 is reversed to the on state. Therefore, a timer time signal that reaches approximately the ground level after a timer period from the start of the timer operation is obtained at the external terminal 5.

Note that a P ⁺ resistor having a small temperature coefficient may be used instead of the P ^- resistor (resistance made of a relatively low concentration P-type semiconductor region) in the above embodiment.

〔Effect of the invention〕

As described above, according to the timer circuit of the present invention,
It is possible to obtain a constant timer time with respect to temperature changes within the operating temperature range, and is conveniently applied to hybrid integrated circuits that use capacitors with negative temperature characteristics, such as ceramic capacitors, in the charging/discharging circuit for determining the timer time. be.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of a timer circuit according to the present invention, and FIG. 2 is a circuit diagram showing another embodiment. 1... integrated circuit, 5, 20... constant current source, 8...
...Voltage comparison circuit, _R1 , RT...Resistor, C...Capacitor.

Claims (1)

[Claims] 1. A constant current source, a capacitor connected to this constant current source that is charged or discharged with a constant current by the constant current source at the time of timer operation start input, and has negative characteristics in the operating temperature range, and a terminal voltage of this capacitor. In the timer circuit, the constant current source uses a diffused resistor in the integrated circuit as a part of the resistor that determines the constant current, and the A timer circuit characterized in that the negative temperature characteristic of the capacitor is offset by the positive temperature characteristic.