JPH0315343B2 - - Google Patents

Info

Publication number
JPH0315343B2
JPH0315343B2 JP60114873A JP11487385A JPH0315343B2 JP H0315343 B2 JPH0315343 B2 JP H0315343B2 JP 60114873 A JP60114873 A JP 60114873A JP 11487385 A JP11487385 A JP 11487385A JP H0315343 B2 JPH0315343 B2 JP H0315343B2
Authority
JP
Japan
Prior art keywords
temperature
trimming
semiconductor device
wafer
temperature sensor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP60114873A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61272960A (ja
Inventor
Minoru Odajima
Michiaki Yamagata
Yukikyo Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP60114873A priority Critical patent/JPS61272960A/ja
Publication of JPS61272960A publication Critical patent/JPS61272960A/ja
Publication of JPH0315343B2 publication Critical patent/JPH0315343B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP60114873A 1985-05-28 1985-05-28 半導体装置のトリミング方法 Granted JPS61272960A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60114873A JPS61272960A (ja) 1985-05-28 1985-05-28 半導体装置のトリミング方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60114873A JPS61272960A (ja) 1985-05-28 1985-05-28 半導体装置のトリミング方法

Publications (2)

Publication Number Publication Date
JPS61272960A JPS61272960A (ja) 1986-12-03
JPH0315343B2 true JPH0315343B2 (enrdf_load_stackoverflow) 1991-02-28

Family

ID=14648818

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60114873A Granted JPS61272960A (ja) 1985-05-28 1985-05-28 半導体装置のトリミング方法

Country Status (1)

Country Link
JP (1) JPS61272960A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5016080A (en) * 1988-10-07 1991-05-14 Exar Corporation Programmable die size continuous array

Also Published As

Publication number Publication date
JPS61272960A (ja) 1986-12-03

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