JPH03152676A - Conversion circuit for video rate density - Google Patents

Abstract

PURPOSE:To perform the conversion of density at the video rate with no tempo rary stop by providing two sets of density conversion table memories to perform the density conversion via one of both sets of memories while performing the change of the table contents via the other set. CONSTITUTION:The selectors 10 and 11 input the output of an input register 90 as the inputs Ain and Bin and a rewrite address as the inputs Ain and Bin respectively. Then one of those inputs is selected based on the rewrite enable status produced by the registers 4 and 5 in a rewrite/frame enable state. When the picture element value is inputted to a density conversion memory 20, the memory 20 converts the picture element value into the density value based on the contents written previously and outputs the conversion value to an output register 91. Under such conditions, the selector 11 functions to select a rewrite address and inputs the rewrite data to a memory 21 to change the contents of the temperature conversion. Then the density conversion process is switched at a break of a picture frame obtained right after the end of the rewrite. Thus it is possible to perform the density conversion at the video rate with no temporary stop.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to a circuit that converts the density of an input image at a video rate, and which does not temporarily stop the density conversion output even when changing the contents of a table memory for density conversion. In order to eliminate disturbances in the output image and perform density conversion at the video rate, a plurality of sets, for example, two sets of table memories for density conversion are provided, and one table memory is used to perform density conversion. When the other table memory is used, the contents of the table for density conversion can be selectively changed in the other table memory.

[Industrial application field]

The present invention is in the field of video rate image processing.
The present invention relates to a video rate density conversion circuit that can change the calculation contents of density conversion without disturbing the image.

Fields that have traditionally required image processing using video rate density conversion include video effects, factory automation (FA), and monitoring.

Fields include driving cars and airplanes.

In these image processing fields, it is necessary to process a TV image without missing any frame, and it is also necessary to change the contents of density conversion sequentially.

For example, in the field of controlling automobiles and airplanes, in order to clearly extract images of roads and runways necessary for the operation according to external conditions (for example, changes in the amount of solar radiation), the density conversion calculation described above is required. The contents may be changed sequentially in response to the circumstances of the external world.

Even in such a case, there is a need for a density conversion circuit that can output a converted image without being stopped for a long time.

[Prior art and problems to be solved by the invention] FIG. 3 is a diagram showing a conventional video rate density conversion circuit.

An image from a television camera is input, selected by a selector 1, and input to a density conversion memory (table memory) 2.

At this time, using the density of the input image as an address,
By accessing the density conversion memory, a predetermined density value is output, and the density conversion of the input image is performed at the video rate.

In this video rate density conversion state, if you want to change the contents of the density conversion memory 2 from a host computer (not shown), for example, connect the image output to an image memory (not shown) and perform the density conversion. After temporarily stopping (freezing) the output, the rewrite enable is set to "1", the rewrite address from the host computer is input to the density conversion memory 2 via the selector 1, and the rewrite data is input.

Enter write enable.

When the rewrite is completed, set the rewrite enable to “
0'', the input image is input to the density conversion memory 2, and the contents of the frozen image memory are output.

Alternatively, the rewriting process of the density conversion memory 2 may be performed at most 2 times.
Focusing on the fact that the image is for one frame, when changing the contents of the density conversion memory 2 to 8, the software discards the output image for the two frames.

Conventional circuits can perform density conversion at the video rate, but if you try to change the content of the density conversion, you must either stop the output at - time (in this case, connect an image memory to the output and freeze it), as described above. ), you will either have to allow some image distortion.

At this time, if the density conversion operation is performed frequently, the density-converted image will not be output for a long time from the perspective of image processing. There was a problem in that it became impossible to extract roads and runways, making it impossible to maneuver.

In view of the above-mentioned drawbacks of the conventional art, the present invention provides a circuit that converts the density of an input image at a video rate, without temporarily stopping the density conversion output even when changing the contents of a table memory for density conversion. It is an object of the present invention to provide a density conversion circuit that can perform density conversion in videoreto without causing disturbances in output images.

[Means to solve the problem]

FIG. 1 is a diagram for explaining the present invention in detail, and shows an operation time chart of the present video rate density conversion circuit.

The above problem is solved by a video rate density conversion circuit configured as follows.

This circuit converts the density of an input image at a video rate, and is provided with a plurality of sets, for example, two sets of table memories 20 and 21 for density conversion. Alternatively, when density conversion is being performed in step 21, the other table memory 21 or 20 is configured to selectively change the table contents for density conversion.

[Effect]

That is, according to the present invention, for example, by having two sets of table memories for performing density conversion, one table memory performs the density conversion operation, while the other table memory performs the rewriting or rewriting of the contents. By adopting a method of waiting for rewriting and performing the switching at the break of the image frame immediately after the rewriting, the image does not freeze, and the output image is not distorted, and the input This has the advantage that image density conversion can be performed at video rate.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

The aforementioned FIG. 1 is a diagram showing the principle of the present invention, and FIG. 2 is a diagram showing an embodiment of the present invention, in which, for example, two sets of density conversion memories are provided, and the density of one Conversion memory 2
0, the other density conversion memory 21 rewrites the contents or waits for rewriting, and the density conversion process is performed at the break of the image frame immediately after the rewriting of the contents is completed. The means for performing the switching are the means necessary to implement the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

Hereinafter, the configuration and operation of the videoretodensity conversion circuit of the present invention will be explained with reference to FIG. 2 while referring to the operation time chart shown in FIG.

In the video camera [4 degree conversion circuit] of the present invention, as shown in the figure, for example, two sets of density conversion memories (1) are provided.
20. (2) Equipped with 21.

In addition, the input image is, for example, 8-pill (256 gradation) image data, and is input to an input register (Rg) 90 that uses a clock at the rate of the image processing cycle as a clock input, and at that clock speed, the next is input to selector (1) 10.

The selector (1) 10 is the input register (Rg)
The output of 90 is designated as A data input (Ain), and the rewrite address from the MPU of the host computer (not shown) is designated as B.
Data input (Bin) and register (Rg) by rewriting enable and frame enable from the MPU 4
．． By the rewrite enable status generated in 5,
Select one of them. For example, when the rewriting enable status is 0, the input register (Rg) 90 on the A data input (Ain) side is selected.

In this state, as shown in FIG. 1, the pixel value of the image input (8 bits: 25
Ei gradation) is input as an address, the density conversion memory (1) 20 functions as a well-known lookup table according to the contents written in advance, and converts the input pixel value (density value). is converted into a density value defined in the lookup table and outputted, and outputted to the output register (Rg) 91 via the selector (3) 3.

At this time, the selector (2) 11 functions to select the above rewriting address from the MPU of the host computer on the 8A data input (Ain) side.

As for the rewrite enable status, the MPII first looks at the rewrite enable status ('O', 'l°) and outputs '1' if the status is 'O', and outputs '0' if the status is '1'. do.

Therefore, in register (Rg) 5, the value of the rewriting enable status is inverted in synchronization with the frame enable functioning as a clock.

Then, at the point in time when the rewrite enable value output by the MPU and the rewrite enable status value become equal (
In other words, when the liver υ recognizes the point in time when the frame enable is reversed in synchronization with the frame enable, the rewrite address,
Outputs rewrite data and write enable.

Therefore, when the rewrite enable status is "0", the rewrite address is selected in the selector (2) 11 as described above, and the density conversion memory (2) is
The density conversion memory (2) 21 is inputted to the address (add) of 21, the rewrite data is inputted to the data input (dada in), and the write enable is inputted to -E via the three-state gate 8. The contents of the density conversion are changed.

When the change in the contents of the density conversion is completed, the write enable is set to 0'', the MPU sends the rewrite enable again, and, for example, the rewrite enable status is changed from the frame immediately after the rewrite is completed. When reversed, the image data from the input register (Rg) 90 is sent to the density conversion memory (2) via the selector (2) 11.
By switching to the address (add) of No. 21 and inputting it, density conversion is performed according to the changed contents.

At this point, the rewrite address is stored in the density conversion memory (1) 20 via the selector (1) 10.
dd), but if the light energy etc. is not sent from the liver υ, the concentration conversion memory (1) 20 will have
The system enters a standby state for rewriting the density conversion contents, and after that, when the MPU sends the write enable, etc., the density conversion contents are rewritten in the density conversion memory (1) 20. Become.

In the above embodiment, the density conversion memory 20 is
Although the example in which sets are provided has been described, it goes without saying that the number is not limited to two sets.

In this way, the present invention provides a density conversion memory for example 2
When one density conversion memory 20 is performing density conversion, the other density conversion memory 21 is rewritten or stands by for rewriting, and the image immediately after the content rewriting is completed. The feature is that the density conversion process is switched at the frame break.

〔Effect of the invention〕

As described above in detail, the video rate density conversion circuit of the present invention is provided with a plurality of sets, for example, two sets of table memories for density conversion, and one table memory performs density conversion. Sometimes, the contents of the table for density conversion can be selectively changed in the other table memory, without freezing the image or distorting the output image. This has the advantage that the density conversion of the input image can be performed at the video rate.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the present invention in detail. FIG. 2 is a diagram showing an embodiment of the present invention. FIG. 3 is a diagram showing a conventional video rate density conversion circuit. It is. In the drawing, l is a selector, and 2 is a density conversion memory. 10 is selector (1), '11 is selector (2)
. 20 is a density conversion memory (1), 21 is a density conversion memory (
2). 3 is the selector (3), 4.5 is the register (Rg
). 7.8 is a three-state gate. 90 is a manual register, 91 is an output register. are shown respectively. Rewriting completed.

Claims (1)

[Claims] A circuit for converting the density of an input image at a video rate, the circuit comprising a table memory for multiple sets of density conversion (
20, 21), and when one table memory (20 or 21) is performing density conversion, the other table memory (21,
Alternatively, in 20), the video rate density conversion circuit is configured to selectively change table contents for density conversion.