JPH0315196B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a display device suitable for graphic display using a raster scan type display.

(b) Prior art As disclosed in Japanese Patent Application Laid-Open No. 59-91486, an image memory for storing image data is divided into memory blocks of a predetermined size, and each divided image data is stored in the image memory. A mapping memory is provided that stores partition data indicating partitioned areas in accordance with the reading order of partition image data from the image memory, and by rewriting the contents of this mapping memory, the contents of the image memory are directly rewritten. Display devices that change the arrangement of images have been proposed in the past.

(c) Problems to be solved by the invention In the conventional technology, the image arrangement can only be changed in units of memory blocks of a predetermined size.
It has been impossible to perform processes such as changing the arrangement of images of arbitrary size, moving images continuously in dot units, or inverting images. For this reason,
To carry out such processing, it was necessary to rewrite the image data in the image memory.

Furthermore, when moving an image in dot units, that is, dot scrolling, the CRT controller is usually equipped with a start address register that specifies the start address for reading out the image memory, so a continuous area of the image memory can be displayed on the screen. In some cases,
It is possible to dot scroll the entire screen, but when displaying a screen by combining discontinuous memory blocks of image memory using mapping memory, it is not possible to change the start address as in the conventional method. It was impossible to perform dot scrolling.

(d) Means for Solving the Problems The present invention provides an image memory having a capacity of one screen or more for storing image data of a dot image to be displayed, a display address representing the screen position to be displayed, and the screen. address generating means for generating a raster address representing a raster to be scanned at a position, and converting the display address into a block address consisting of a column address and a row address representing the coordinates of a memory block in which the image memory is divided into predetermined sizes. and a rewritable line address map memory that converts the row address and raster address into serial line addresses obtained by dividing the row direction of the image memory into units of one dot line corresponding to the raster. The above problem is solved by configuring a graphic display device so that image data is read out by addressing the image memory using the column address and the line address.

(E) Effect In the present invention, the display address from the address generation means is generated by the block address map memory.
It is converted into a block address consisting of a column address and a row address indicating the coordinates of a memory block of a predetermined size in the image memory, and in the line address map memory, the raster address from the address generation means and the row address from the block address map memory are converted into a block address. , the row direction of the image memory is divided into dot line units corresponding to the raster, and each dot line is converted into a line address representing a serial address, and the image memory is addressed by the column address and the line address. Therefore, the image data addressed by the column address and line address of the image memory will be displayed at the screen position specified by the display address and raster address, and by changing the contents of both map memories, the image data will be displayed at the screen position specified by the display address and raster address. The image can be rearranged or moved in dot line units.

(F) Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention. 1R to 1B are provided for each of R, G, and B, and one plane for storing image data corresponds to one screen. 3-plane image memory with a capacity of
3 is a block address map memory to which display address MA is given as an address and outputs column address X and row address Y; 4 is to which row address Y and raster address RA are given as addresses, and line address Line address map memory that outputs LA,
5R to 5B are R, G, and B image memories 1R each
A parallel/serial conversion circuit P/ which converts the parallel data read from ~1B into serial data and sends it to a color CRT display (not shown).
S, 6 is a CPU for writing data to both map memories and image memory via the data bus DBUS;
7 to 9 are the addresses given from the CPU via the address bus ABUS, and the addresses given from the CRT controller or map memory.
A multiplexer MPX 10, which is selected according to the character clock CLK from a timing control circuit (not shown), inputs an address from the CPU, a read strobe signal RSTB, and a write strobe signal WSTB, and maps memories 3 and 4.
and a read/write control circuit that performs memory selection of the image memories 1R, 1G, and 1B, and controls reading and writing.
Image data is stored in 1B in a predetermined order from the CPU.

The CRT controller 2 is, for example, manufactured by Hitachi.
If it is a general device like the HD46505S and the display screen has a configuration of 640 x 400 dots, that is, 80 characters x 25 lines as shown in Figure 2, the display address MA is M x N dots on the screen. , for example, 8×
It indicates the position of the 16-dot display space, and in this case, from 0 to
1999 address has been assigned. Furthermore, the raster address RA represents the raster to be scanned in one display space of the screen specified by the display address, and in this case, raster addresses from 0 to 15 are output for each display space.

On the other hand, one plane of image memory 1R to 1B is
For example, as shown in Figure 3, the capacity for one screen is
It has a capacity of 1024 x 512 dots, which is more than 640 x 400 dots, and divides the image memory 1R into memory blocks of m x n dots, for example, 8 x 16 dots.
The coordinates of each memory block are set to block addresses 0, 0 to 1 consisting of column address X and row address Y.
27, 31. Further, the row direction of the image memory 1R is divided into dot line units corresponding to rasters, and each dot line is represented by a serial line address 0 to 511.

Therefore, in block address map memory 3,
As shown in Figure 4A, block addresses X and Y are written to display address MA, and in line address map memory 4, as shown in Figure 4B, block addresses X and Y are written to display address MA, and as shown in Figure 4B, block addresses If you write the line address LA, it will be in the normal setting state, and the column address
The area indicated by the thick line in FIG. 3 where LA is 0 to 399 will be displayed on the screen. Then, by appropriately changing the contents of both map memories 3 and 4, it becomes possible to change and move the image arrangement.

Next, the manner of changing and moving images will be explained using a specific example. Here, for convenience of explanation, the display address MA is 4 on the screen as shown in Figure 5.
Addressing the display space of ×4 dots, one screen has a capacity of 16 × 16 dots, and the display address is 0 to 15.
is assigned, and the raster address is 0 to 3.
is output. It is also assumed that the image memory 1R has a capacity of 32.times.32 dots and is divided into 4.times.4 dot memory blocks, as shown in FIG. Therefore, column address X and row address Y are 0 to 7, and line address LA is 0 to 31.
becomes.

Therefore, image data corresponding to the image shown in Fig. 6 is currently stored in the screen memory 1R by the CPU 6, and by combining these images, a display as shown in Fig. 7 A is displayed on the display screen. Suppose you are trying to do this. In this case, the block address map memory 3 stores the column address X and row address Y of the memory block storing the image data to be displayed at the screen position corresponding to the display address MA, as shown in FIG. Write. That is, for example, since we want to display the image data of the memory block with X and Y of 5 and 4 at the screen position of display address ``2'', we would like to display the image data of the memory block of 5 and 4 for display address ``2''. Write. Further, the line address map memory 4 may be set to normal settings as shown in FIG. 8B.

Then, for example, when the CRT controller 2 gives "2" as the display address MA and "0" as the raster address RA, the column address X becomes "5" and the line address LA
is converted to "16", so the example address X of image memory 1R is "5" and the line address LA is "16".
The 1-word, 4-bit image data is displayed on the screen at the screen position where the display address MA is "2" and the raster address RA is "0". Thereafter, the display shown in FIG. 7A is performed in the same manner.

Next, suppose that in the screen display as shown in FIG. 7A, it is desired to dot scroll the lower half of the image vertically upward. In this case, the contents of the block address map memory 3 are not rewritten, and the line address map memory 4 is written as shown in FIG.
Change the line address LA values "8", "9", ..., "15" corresponding to the lower half image to "9", "10", ..., "16", which are incremented respectively, and After the screen scan is completed, similar rewriting can be performed sequentially. In this way, on the screen, the image data one dot line after the next in the image memory 1R will be displayed sequentially at the same raster address of the same display address. Then, dot scrolling is executed as shown in FIG. 7B. In this case, for example, image data other than space data is not written to the final line address "31" of the image memory 1R, and the row addresses Y of the line address map memory 4 are "2" and "3". ” is the line address LA corresponding to “16” shown by the dotted line in Figure 8 C.
By writing the line address "31" instead of the above line address, it is possible to prevent unrelated image data from being displayed by dot scrolling.

Furthermore, after the screen in Figure 7A is displayed, in the lockhole-shaped image in the upper right half, you want to replace the image data in the lower 3/4 with other image data as shown in Figure 7C. do.

In this case, the contents of the block address map memory 3 are not rewritten, but the line address for the image to be replaced can be changed in the line address map memory 4, as shown in FIG. 8D.

In addition, if the value of the line address LA corresponding to the triangular image in the upper left half of the screen display in Figure 7A is written in reverse as shown in Figure 8E, an image as shown in Figure 7D will be obtained. Data can also be inverted.

The specific examples described above are only some of the applications of the present invention, and it goes without saying that dot scrolling and image reversal can be performed on the entire screen, and many other processes are also possible.

By the way, in this embodiment, the display space M×N dots specified by the display address and the capacity m×n of one memory block of the divided image memory
Although we have explained the case where the dots are set to be the same, it is not necessarily necessary to set them to be the same, and m>M, n
>N.

In this way, in the present invention, two map memories 3
By simply changing the contents of and 4, the image can be moved by one dot line in the vertical direction of the screen without rewriting the contents of the image memory.

(G) Effects of the Invention According to the present invention, it is possible to move an image in the vertical direction of the screen in units of one dot line, so you can change the arrangement of image data of any size, dot scroll, or Inversion can be easily performed and processing speed can be increased. In particular, dot scrolling and image reversal can be performed even when displaying a combination of image data stored in discontinuous memory blocks of the image memory, and furthermore, dot scrolling and image reversal can be performed not only for the entire screen but also for a part of the image. can also be done,
It will be very convenient.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Figs. 2 and 5 are explanatory diagrams showing the correspondence between the screen, display address, and raster address, and Fig. 3 is an illustration of the correspondence between the image memory, block address, and line address. Figure 4 A and B are explanatory diagrams showing the contents of each map memory, Figure 6 is an explanatory diagram showing the relationship between image memory and image data, and Figure 7 A to D are display examples. The explanatory diagrams shown in FIGS. 8A to 8E are explanatory diagrams showing the contents of each map memory corresponding to FIGS. 7A to 7D. Explanation of main drawing numbers, 1R to 1B...image memory,
2...CRT controller, 3...Block address map memory, 4...Line address map memory, 6...CPU.

Claims (1)

[Claims] 1. An image memory having a capacity of one screen or more for storing image data of a dot image to be displayed, and an address for generating a display address representing the screen position to be displayed and a raster address representing the raster to be scanned at the screen position. a rewritable block address map memory for converting the display address into a block address consisting of a column address and a row address indicating the coordinates of a memory block in which the image memory is divided into predetermined sizes; a rewritable line address map memory for converting the row address and raster address into serial line addresses divided in the row direction in units of one dot line corresponding to a raster; A graphic display device characterized in that image data is read out by specifying an address.