JPH0315194B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal display device used in stop watches and the like.

[Prior Art] Conventionally, a technique for cumulatively displaying information using a liquid crystal display element is disclosed in Japanese Patent Laid-Open No. 55-67790.

According to this, integrated display is performed by selectively supplying three types of pulses, on, active, and off, to the common electrode and two types of pulses, on and off, to the segment electrodes.

[Problems to be Solved] The above device has the advantage that the operating margin, which is the ratio between the effective value of the on-voltage and the effective value of the off-voltage, can be as large as 3 or more.

However, since the signals supplied to each electrode include voltages that are not integral multiples of the reference voltage V0, there is a drawback that the power supply circuit for generating these signals becomes complex.

Furthermore, since the watch is configured to display only one piece of information, for example, if a stop watch is to display seconds and 1/10 seconds at the same time, two display devices with the same configuration must be used.

An object of the present invention is to provide a liquid crystal display device that can display two types of information with a simple configuration without reducing the operating margin.

[Means for Solving the Problem] The present invention makes the segment electrodes of the second display element that displays the time of the smallest digit and the first display element that displays the upper digit common, and that the common electrodes are respectively the second unit common electrode and the first
Using a unit common electrode of
, and selectively supplies a common selection pulse, a common non-selection pulse, and a common all selection pulse to the first unit common electrode according to the output of the upper digit, and A common all selection pulse and a common non-selection pulse are selectively supplied to the unit common electrode, and the potential difference between the common selection pulse and the segment selection pulse, the potential difference between the common selection pulse and the segment selection pulse, and the common all selection pulse and A lighting voltage with a minimum effective value of 3α is applied to the liquid crystal depending on the potential difference with the segment non-selection pulse, and the potential difference between the common selection pulse and the segment non-selection pulse, the potential difference between the common non-selection pulse and the segment selection pulse, and The above object is achieved by applying a non-lighting voltage with an effective voltage value α to the liquid crystal due to the potential difference between the common non-selection pulse and the segment non-selection pulse.

[Embodiment] An embodiment in which the present invention is applied to a stopwatch capable of displaying from 1/10 seconds to 60 seconds will be described below with reference to the drawings. In FIG. 1, 1 is a time unit of 1/10 second, and 2 and 3 are hexadecimal and decimal counters, respectively, which measure time in seconds.

4 to 6 are memory latch circuits, 7 to 11 are gate circuits, and 12 and 13 are flip-flop circuits. Decoders 14 to 16 are decoders that hold outputs cumulatively, decoders 14 and 15 generate outputs from 0 to 9, and terminals a0 and b0 are 0 to 9, terminals a0 and b0 are
a1, b1 are 1 to 9, terminals a2, b2 are 2 to 9...terminals
A9 and a9 produce an output at each terminal while each output of 9 is generated. The decoder 16 generates the same integrated output as described above, and generates each output from 0 to 5.

Reference numeral 17 denotes an output switching circuit whose output state is inverted depending on whether the output value of the memory latch circuit 6 is even or odd. Reference numeral 18 denotes a common voltage supply circuit constituting the third pulse supply circuit, which selectively outputs a set voltage value and applies it to a common electrode to be described later.
Reference numeral 19 denotes a segment voltage supply circuit constituting the first pulse supply circuit, which selectively outputs a set voltage value and applies it to segment electrodes to be described later. A common voltage supply circuit 20 constitutes the second pulse supply circuit, and applies a selection voltage to a common electrode, which will be described later. 21 is a manual switch for timing start/stop, 22 is a manual switch for counter set and latch control, and 23
is an inverter.

Figure 2 shows the arrangement pattern of common electrodes, 24a to 24j are unit common electrodes for displaying time units of 1/10 seconds, and 25a to 24j are unit common electrodes for displaying time units of 1/10 seconds.
25j is a unit common electrode for displaying the 1st and 10th time units of seconds.

FIG. 3 shows the arrangement pattern of segment electrodes, in which 26a to 26a are segment electrodes for displaying time units of 1/10 seconds;
b to 26b are segment electrodes for displaying the 1st and 10th digits of seconds, and segment electrodes 26a
~26a and 26b~26b are electrically coupled. Furthermore, the segment electrodes in each group of ten segment electrodes are commonly connected by a strip-shaped wiring.

FIG. 4 is a circuit diagram showing the common voltage supply circuit 18 in detail, 27 to 31 are analog switches, and 32 and 33 are inverters. Note that a plurality of circuits whose constituent units are analog switches 28 and 29 and an inverter 32 are provided in the portion omitted by the dotted line.

FIG. 5 is a circuit diagram showing the output switching circuit 17 and the segment voltage supply circuit 19 in detail.
4 to 47 are gate circuits, 48 to 53 are analog switches, and 54 to 56 are inverters. Note that analog switches 50, 51 and inverter 55
A plurality of circuits corresponding to a circuit unit consisting of are provided in the omitted dotted line portion.

FIG. 6 is a detailed circuit diagram of the common voltage supply circuit 20, in which 57-62 are gate circuits, 63-73 are analog switches, and 74-77 are inverters. Note that the dotted line portion shows gate circuits 61, 62,
Analog switches 69 to 71 and inverter 7
A plurality of circuits corresponding to a circuit configuration consisting of 6 are provided.

FIG. 7 shows a pulse generation circuit that generates pulses to be supplied to the common electrode and segment electrode.
78 to 93 are analog switches, 94 is an inverter, and 95 and 96 are flip circuits. terminal
A pulse signal having a constant frequency, for example a 64 Hz pulse signal, is applied to P0. With this pulse signal, as shown in FIGS. 8A and 8B,
A segment selection pulse S0, a segment non-selection pulse S1, a common selection pulse C2, a common non-selection pulse C1, and a common all selection pulse C0 are generated.
The figure shows a pulse waveform with a cycle of T/2, and the figure B shows a pulse waveform with a next cycle of T/2, and W1 to W12 indicate the voltage difference between the common voltage and the segment voltage. In this embodiment, the liquid crystal responds by cumulatively applying pulses of maximum 3 |V|, and becomes non-responsive by cumulatively applying pulses of maximum |V|. The effective voltage value of on-voltage W1, W7 is √92, on-voltage W3, W6, W9,
That of W12 is √102, and the operating margin, which is the ratio of the off-voltage to the effective voltage value, is 3 or √10.

Next, the operation will be explained. In Figure 1,
It is assumed that flip-flop circuit 12 is initially reset. When switch 22 is turned on in this state, the output of gate circuit 8 becomes "1" and flip-flop circuit 13 and counters 1-3 are reset. When the switch 21 is turned on to start timing, the output Q of the flip-flop circuit is inverted to "1" and the gate circuit 7 is turned on.
and - input of 9 is held at "1".

Since a 10 Hz pulse signal is input to the terminal φ1, a 10 Hz pulse signal is generated at the output terminal of the gate circuit 7 and input to the counter 1. The counters 2 and 3 sequentially measure time as time passes. On the other hand, since the output of the gate circuit 11 is held at "1", the gate circuit 10 is open, and a pulse signal with a frequency higher than the 10 Hz input to the terminal φ2 is generated at the output terminal of the gate circuit. . The clock output is written into the memory latch circuits 4-6 by this pulse signal. When 6 seconds 2 is counted on counters 1 to 3, switch 2
2 is turned on, the output of the gate circuit 9 is "1", and therefore the flip-flop circuit 13 is turned on.
The output Q becomes "1". Therefore, gate circuit 1
The output of the gate circuit 10 becomes "0", and the output of the gate circuit 10 becomes "0". As a result, 6 seconds 2, which is the time measurement output of counters 1 to 3, is stored and held as "2", "0" and "1" in memory latch circuits 4, 5 and 6, respectively. First, the output value "2" of the memory latch circuit 4 is input to the decoder 14.

Referring to FIG. 4, "1" is generated at terminals a0 to a2, and the analog switch corresponding to terminal a2 corresponding to analog switches 27, 28 and analog switch 28 is turned on. Therefore, a common non-selection pulse C1 is generated at the terminal K9, a common all-selection pulse C0 is generated at the terminals K0 and K1, and a common selection pulse C1 is generated at the remaining terminals K2 to K8.

Next, the output value "0" of the memory latch circuit 5 is input to the decoder 16. Therefore, in FIG. 5, the terminal "0" becomes "1" and the other terminals are "0", so the gate circuits 34, 35, 44
The output of ~47 becomes "0". As a result, analog switches 49, 51 and 53 are turned on, and segment non-selection pulses S1 are generated at terminals x0 to x5.

Further, the output value "1" of the memory latch circuit 6 is input to the decoder 15. Therefore, in FIG. 6, since the terminals b0 and b1 become "1", the outputs of the gate circuits 58 and 59 are "1", and the inverter 7
Since the outputs of switches 6 and 77 become "1", analog switches 65, 67, 69 and 72 are turned on. Therefore, common all selection pulse C0 is applied to terminal g0,
A common selection pulse C2 is generated at terminal g1, and a common non-selection pulse C1 is generated at terminals g2 to g9.

Looking at the relationship between the pulses applied to the common electrode and the segment electrodes in Figures 8A and B,
A display element whose constituent elements are segment electrodes conductively connected to terminals x0 to x5, common electrodes connected to terminals K0 to K1, and common electrode connected to terminal g0 lights up as shown in FIG. That is, 6 seconds for the inner display element and 2/10 seconds for the outer display element (6 display elements indicate a unit time of 1/10 second).
is lit, and therefore 6 seconds 2 is displayed.

Below, even when the output values of the memory latch circuits 4 to 6 change, in the same manner as above, the time unit of 1/10 second is cumulatively displayed by the outer display element, and the 1st and 10th digit of the second is displayed by the inner display element. The number of units of time is displayed cumulatively.

Looking at the operating margin of this example, the 8th
As is clear from Figures A and B, it shows a large value of 3.0 or more.

[Effect] As detailed above, according to the present invention, one of the common selection pulse, the common non-selection pulse, and the common all selection pulse is selectively supplied to the common electrode of the first display element. Lighting is controlled for each display element, and either a common non-select pulse or a common all-select pulse is selectively supplied to the common electrode of the second display element to control lighting in groups, and each pulse is connected to a reference voltage. and an integral multiple thereof, and the effective value of the on-voltage is the minimum.
3α, and each pulse is configured so that the off voltage is α, so with a simple configuration, two types of information can be displayed, and the operating margin is high at 3 or more, for example, it can display up to 1/10 second. When applied to a stopwatch, it is possible to display a changing clock time with almost no delay.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention; FIG. 1 is a block diagram mainly showing the display drive circuit, FIG. 2 is a plan view showing the arrangement pattern of the common electrodes, and FIG. 3 is the arrangement of the segment electrodes. 4 to 7 are electrical circuit diagrams of the main parts shown in FIG. FIG. 9 is an explanatory diagram showing one mode of display of the voltage waveform of the difference between the electrodes. 1 to 3... Counter, 4 to 6... Memory latch circuit, 14 to 16... Integration type decoder, 1
8... Common voltage supply circuit, 19... Segment voltage supply circuit, 20... Common voltage supply circuit.

Claims (1)

[Claims] 1. Segment electrodes are arranged radially, a plurality of segment electrodes are made into a group, and segment electrodes at symmetrical positions in each adjacent group are conductively coupled, and the time of the minimum digit to be displayed and its upper order are A counter is provided to measure time in digits, and a first unit common electrode is provided for each group, which faces a part of each segment electrode constituting the above group via a liquid crystal. 1 display element, and each group is provided with a second unit common electrode that faces the remaining part of each segment electrode constituting the group through the liquid crystal, and a second unit common electrode corresponding to the number of segment electrodes is provided for each group. Configures the display element and generates segment selection pulses, segment non-selection pulses, common selection pulses, common non-selection pulses, and common all selection pulses made of a reference potential and any voltage having a potential difference of V0, 2V0, or 3V0 from this potential. a first pulse supply circuit that selectively supplies the segment selection pulse and the segment non-selection pulse to each segment electrode according to the output of the upper digit of the counter; a second pulse supply circuit that selectively supplies the common selection pulse, the common non-selection pulse, and the common all selection pulse to the first unit common electrode according to the output of the higher-order digit; a third pulse supply circuit selectively supplies a common all selection pulse and a common non-selection pulse to the second unit common electrode according to the output of the minimum digit of the counter; Due to the potential difference with the segment selection pulse, the potential difference between the common all selection pulse and the segment selection pulse, and the potential difference between the common all selection pulse and the segment non-selection pulse, a lighting voltage with a minimum effective value of 3α is set. A voltage is applied to the liquid crystal depending on the potential difference between the common selection pulse and the segment non-selection pulse, the potential difference between the common non-selection pulse and the segment selection pulse, and the potential difference between the common selection pulse and the segment non-selection pulse. A liquid crystal display device characterized in that a non-lighting voltage having an effective value α is applied to a liquid crystal.