JPS5823637B2 - liquid crystal display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display circuit in digital electronic devices such as electronic wristwatches and electronic desk calculators.

An object of the present invention is to control the signals applied to the display segments and to minimize the power consumed by the display and its driving circuitry.

Another object of the present invention is to reduce flickering of the display to make it easier to see, and to extend the life of the display element.

In general, in digital devices, significant power reduction is achieved by using liquid crystal for the display and CMO8 for the electronic circuit.

However, ultra-low power devices such as electronic wristwatches require even lower power consumption.

In addition, a serial signal system is used that facilitates the transfer of display information signals, and a shift register is used as a circuit component, but when static display is performed using a shift register, signals are written serially to the shift register, and a shift register is used as a circuit component. After that, this shift register, which also serves as a drive circuit, holds the display signal, and since the shift register output and the display are directly connected, the transfer signal is directly applied to the display during the signal transfer period, and the display is displayed with equal constraints. AC was being applied to the body.

Therefore, there is a drawback that power consumption during the transfer period increases due to the capacitance component originally included in the display body.

In this case, the more the number of digits displayed increases,
If the transfer period is long, the display will flicker and the visibility will be poor.

Furthermore, in the case of liquid crystals, the life span has been shortened due to an imbalance in the actual applied voltages involved in signal transfer.

In order to improve the above-mentioned drawbacks, the present invention aims to reduce power consumption by providing a cutoff switch means for cutting off the display body and the shift register during the signal transfer period.

The present invention will be explained in detail below using an example applied to a liquid crystal display.

FIG. 1 is a block diagram showing an example of a display circuit having a conventional circuit configuration, and FIG. 2 is a time chart thereof.

In the figure, reference numeral 1 denotes a storage circuit for display contents, in which the time contents are stored in the case of an electronic watch, and the contents of set numbers and calculation results in the case of an electronic desktop calculator are stored in BCD codes.

2 sequentially reads BCD data for each display digit using a shift register consisting of 4 bits, and
It is transferred to the decoder circuit 3 for segment conversion.

15 is a timing signal for transferring one digit (4 bits) to the shift register 2, and 16 is a timing signal for reading in the decoder circuit 3.

Both timing signals 15 and 16 are synchronized.

4 converts segment signals transferred in parallel into serial segment signals using a 7-bit shift register.

12 is a clock signal applied to the shift register 4, and in this example, one cycle is 7×4 in order to display 4 digits.
=28 pulses transfer the minute digits to the AC drive circuit 5.

This AC drive circuit 5 drives the liquid crystal with AC, and is configured with an exclusive OR circuit, and the lighting segment signal is inverted and the non-lighting segment signal is non-lighting with respect to the AC signal 11 applied to the common electrode 17 of the liquid crystal display 10. This is a reversal signal.

13 shows inverted and non-inverted signals when displaying (1200) as shown in the figure.

This signal 13 is sequentially transferred to a shift register 6°7.8.9 consisting of 7 bits for one digit.

These shift registers 6.7, 8.9 are controlled by the same clock signal 12 as the previous shift register 4, so after 28 pulses (4X7) are applied, the signals to be displayed are displayed in the registers 6 to 9. is being transferred.

This transfer period is T1 as shown in the AC signal 11, and since the registers 6 to 9 are static type, they retain the transferred contents after the transfer.

Each output of each of the registers 6 to 9 corresponds to each segment (at to g1), . . . (24 to g4) of the display body 10, so the purpose is Display the number.

Now, the number corresponding to register 9 is "1", so b
Only the ljcl segment is lit.

The signal 14 applied to the non-lit segment a1 is in phase with the AC signal 11.

Clock signal 12°15.16 in synchronization with AC signal 11
The display segment signals are newly transferred to the registers 6 to 9 and held therein through a process similar to that described above for applying the signal to each register.

This holding period is T2 as shown in 11.

The display method using the shift register, which functions both to transfer the display signal and to drive the display, is as described above. However, since the display segments using crystalline crystals are directly connected to each output of the shift register, the transfer period is The display signal 13 is applied to all segments of middle number 5.

Due to its structure, a liquid crystal display is a capacitive load. For example, the capacity per segment of a display used in a wristwatch is approximately several tens to 100 FF, and therefore the transfer signal (display signal 13) during the transfer period is Therefore, charging and discharging are repeated in each segment, and the power consumption in the display body is the power consumption in the holding period (in the holding period, it becomes a resistive load).

).

Further, as the number of displayed digits increases, the number of digits increases as well.

Furthermore, if the frequency of the clock signal is increased in order to shorten the transfer period, the display signal will be distorted due to the capacitive load, and the power consumption in the register will increase.

If this is configured with shift register CMO8,
Remarkable.

By configuring the circuit using shift registers in this way, the signal system becomes a serial system, which facilitates signal transfer.
Moreover, although it becomes easier to implement on a circuit, it causes a significant increase in power consumption.

Furthermore, since the transfer signal is directly applied to the display, the display tends to flicker during the transfer period.

In consideration of these points, the present invention attempts to reduce the current consumption in the display body by cutting off signals to the display body segments during the transfer period and taking into account the display signal transfer period. It is.

FIG. 3 shows its principle block diagram and time chart.

In the figure, 27 is the conventional shift register 6 of FIG.
A shift register corresponding to 9 to 9 controls the display signal 23 with the clock signal 22, transfers the signal, holds the transferred signal, and drives the display.

As can be seen from the time chart, the position of the clock signal 22, that is, the transfer period, is different from the conventional one, and is before the rise and fall of the pulse of the AC signal 11, and each output of the shift register 27 and the liquid crystal display segment are cut off. connected via switch means.

For example, the output 25 to the 31st segment of the display 28 is connected to the a1 segment terminal 26 via cutoff switch means 29.

This cutoff switch means is controlled by a switching signal 24, and as shown in the time chart in the figure, since the switching signal 24 is synchronized with the signal transfer period, while the shift register 27 holds the display signal, the switch means 24
9 is turned ON and terminals 25 and 26 are in a conductive state, but
While the display signal is being transferred, the switch means is OFF, and the terminals 25 and 26 are in a non-conducting state.The signal waveform of the 0 terminal 26 becomes as shown in the time chart, and the display body 28
The transfer signal will not be superimposed on the drive signal.

Furthermore, since the transfer period is before the rising and falling of the AC signal 11, that is, before the polarity of the AC signal 11 changes, even when the output of the shift register 27 is cut off by the terminal 26, the capacitance of the display 28 and the wiring capacitance are etc. 30 has the effect of maintaining the previous state.

Next, FIG. 4 shows an embodiment in which a transmission gate is used as the cutoff switch means to embody the principle of the present invention shown in FIG.

Reference numeral 41 is a memory circuit that stores display contents in BCD, and 42 is a shift register that sequentially reads the output of the memory circuit 41.

43 is a BCD-7 segment conversion decoder circuit; 44
converts parallel segment signals into serial segment signals using a 7-bit shift register.

45 is an exclusive OR circuit forming an AC drive circuit.

A shift register 46 transfers display signals, holds the transferred signals, and drives the display body.

Since these structures are similar to the conventional example shown in FIG. 1, detailed explanations will be omitted.

Each output of the shift register 46 is connected to each segment of the display 47 via a transmission gate.

Now, the a1 segment drive terminal 33 of the shift register 46
is connected to the segment terminal 35 of the display body 47 via a transmission gate 48, and the transmission gate 48 is controlled by the switching signal 34.

This switching signal 34 is connected to the gate of the N-channel MO8 of the transmission gate 48, and a signal obtained by inverting the switching signal 34 via an inverter 49 is connected to the gate of the P-channel MO8. The terminal 35 becomes conductive, and becomes non-conductive when the switching signal 34 becomes LOW.

Therefore, since the relationship between the terminal 33 and the switching signal 34 is configured as shown in the time chart, the transmission gate 48 is OFF during the signal transfer period and ON during the signal holding period.

In this way, it is possible to avoid the transfer signal from coming to the a1 segment terminal 35 of the display body 47 in addition to the drive signal as shown in the time chart.

Also, since other segments are configured in the same way, the shift register 46 and display 4
7 is completely cut off, charging and discharging of the load capacitance by the display signal is eliminated, and the power consumption of the display body can be significantly reduced compared to the conventional display.

Furthermore, since the cut-off period, that is, the transfer time, is before the polarity of the AC signal changes, as explained in FIG.
The previous state is maintained and the flickering of the display is eliminated.

Furthermore, even though the frequency of the transfer clock signal has been increased, the capacitive load has become extremely small, so waveform distortion of the display signal is less likely to occur.

In this way, it is easy to transfer signals, it is easy to implement on a circuit, and it consumes less power.It also makes the display easier to see, making it an optimal circuit configuration for static drive systems such as liquid crystal displays. did it.

Furthermore, in the present invention, the transfer period of the output signal from the switch means to the segment electrode is set immediately before the polarity of the alternating current signal changes, so that the display signal from the storage means is cut off by the switch means. Even in the case of odor, the display state can be maintained by the capacitance of the liquid crystal display, the wiring capacitance, etc., and therefore, there is an effect that good display quality can be obtained without flickering.

Although the embodiment has been explained using a liquid crystal as the display body, it is also possible to use it for other devices, such as an electrochromic device.Although a transmission gate is used as the cutoff switch means, other circuits may be used. It is also possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional display circuit.
The figure is the time chart. FIG. 3 is a block diagram showing the principle of an embodiment of the display circuit of the present invention, and FIG. 4 is a block diagram showing a specific example thereof. 1...Memory circuit, 2...Shift register, 3...Decoder, 4...Shift register, 6-9...Shift register , 10...
... Display body, 29 ... Cutoff switch means,
24... Switching signal, 48...
Transmission gate, 49...Inverter.

Claims (1)

[Claims] 1. In a liquid crystal display device in which a liquid crystal is sandwiched between a segment electrode and a common electrode and driven by an alternating current signal, there is provided a storage means for holding a display signal, and a switch means for transferring an output signal from the storage means to the segment electrode. A liquid crystal display device comprising: a period of time during which the output signal is transferred from the switch means to the segment electrode immediately before the polarity of the alternating current signal changes.