JPS59835B2 - display circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display circuit in a digital electronic device such as a liquid crystal wristwatch.

The present invention relates to reducing current in a display circuit.

An object of the present invention is to control the current flowing through the display body by controlling signals applied to the display body segments, thereby reducing the current flow of the display circuit.

BACKGROUND ART In recent years, in various digital devices such as digital wristwatches and electronic desktop calculators, the use of LSI circuits has become active as the current of the circuits has been reduced. In order to reduce the current,
A liquid crystal was used for the display, a serial signal system was used that was easy to connect with the display system to solve problems in LSI integration, and signal transfer was easy, and a shift register was used as a circuit component. It became. However, conventionally, when attempting to perform static display using a shift register, the shift register transfers the display signal every fixed period, and the shift register, which also serves as a drive circuit, stops the display signal for a fixed period. was.

Since the shift register and the display body are directly connected, a transfer signal is directly applied to the display body during a time other than the display period, that is, during the transfer period, and equivalently, an alternating current is applied to the display body. Therefore, the current consumption during the transfer time increases due to the capacitance component originally included in the display body, reaching several tens of times the current consumption during the display period, and the current consumption increases as the number of display digits increases. In consideration of the above, the present invention attempts to reduce current consumption by cutting off the display and shift register during the transfer period and applying a constant signal. Below, we will explain the case where a liquid crystal is used as the display.

FIG. 1 shows a block diagram of a display circuit with a conventional circuit configuration. 1 is a storage circuit which is used for timekeeping, and if the time content is used for a calculator, the content of numbers set and the content of calculations are stored in BCD code.

2 is a 4-bit shift register that sequentially reads BCD data corresponding to one display digit, and
It is transferred to the decoder circuit 3 for 7-segment conversion.

The reading timing 16 in the decoder circuit is one digit (4
Timing 1 when bit) is transferred to the shift register
It is in sync with 5. 4 is a 7-bit shift register that converts segment signals transferred in parallel into serial segment signals.

The clock signal applied to 4 is 12, but since 4 digits are displayed in this example, all digits are transferred to the AC drive circuit 5 with 7×4=28 pulses per cycle.

5 is an exclusive 0R circuit for driving the liquid crystal with an AC signal 11 applied to the common electrode 17 of the liquid crystal display 10;
The lighting segment signal is an inverted signal with respect to the polarity, and the non-lighting segment signal is a non-inverting signal.

13 shows inverted and non-inverted signals in the case of (1200) display. The above signal is sequentially transferred to shift registers 6, 7, 8, and 9 each consisting of 7 bits for one digit. shift register 6
, 7, 8, and 9 are applied with the same clock signal 12 as shift register 4, so after the 4X7 (28) pulse is applied, each register of 6, 7, 8, and 9 should display signal is being transferred. This transfer period is AC signal 1
As shown in FIG. 1, the registers 6, 7, 8, and 9 are static type, so they retain the transferred contents after the transfer. Each output of each of the registers corresponds to each segment Al, bl, cljdljel5fl5gllll of the display body 10.
Since it corresponds to G4, the target number is displayed according to the contents held in each register. The number corresponding to register 6 is (1
), only the b1 and C1 segments are lit. The signal 14 applied to the unlit segment a1 is in phase with the AC signal 11. Since clock signals 12, 15, 16 are applied to each register in synchronization with AC signal 11, registers 6, 7, 8,
A display segment signal is newly transferred to and held at 9. This holding period is T2 as shown in 11. The above is a display method using a shift register that functions both to transfer display signals and to drive the display. However, since the display segments using liquid crystal are directly connected to each output of the shift register, during the transfer period The display signal 13 will be applied to all segments.

Due to its structure, a liquid crystal display is a capacitive load, and for example, the capacity per segment of a display normally used in a liquid crystal wristwatch is about several + PF to 100 PF. Therefore, each segment is repeatedly charged and discharged by the transfer signal (display signal 13) during the transfer period, and the current consumption in the display body increases significantly compared to the current consumption during the holding period (which becomes a resistive load during the holding period). Moreover, if the number of display digits increases, the number increases similarly. Furthermore, if a high frequency clock signal is used to shorten the transfer period, the display signal will be distorted due to the capacitive load, and current consumption in the register will increase. This is remarkable when the shift register is composed of DMOS. In this way, by configuring the circuit using shift registers, the signal system becomes a series system, making signal transfer easier and implementation on the circuit easier, but at the same time increasing current consumption. I will invite you. In consideration of these points, the present invention aims to reduce the current consumption of the display body and further the current consumption of the display drive circuit by adding a constant signal unrelated to display to the display body segment during the transfer period. The present invention provides a display circuit for an all-electronic wristwatch, which is required to be powered by current. FIGS. 2A and 2B show an embodiment of the circuit block configuration of the present invention.

In FIGS. 2A and 2B, the same signals are applied to the blocks having the same functions and timing signals as in FIG. 1, which will be briefly explained.

1 is a memory circuit, 2 is a 4-bit shift register, and 3 is a BC.
The D-J segment conversion decoder circuit 4 converts parallel signals to serial signals using a 7-bit shift register.

5 is an exclusive 0R gate; 6, 7, 8, and 9 are shift registers for display signal transfer and display drive; and 10 is a display using liquid crystal.

Signal 11 is a signal for AC driving of the liquid crystal, and is 20H from the visual point of view.
A frequency band from z to several hundred Hz is selected. This signal transfer between circuit blocks is similar to that described in FIG. The output signal of the exclusive 0R gate is as shown in 13,
In this example, the display segment signal is [1200]. A gate circuit 22 cuts off the display 10 and the outputs of the registers 6 to 9 during the transfer period and applies a constant signal.

At this rotation axis, a cutoff signal 18 synchronized with the clock signal 12 causes the AN provided at each output terminal of the registers 6 to 9 to
By controlling the D gate groups 23 to 29, the display body and the registers 6 to 9 are shut off only during the transfer period.

In the shutdown state only, each segment is LO during the shutdown period.
The balance signal 19 is applied by the 0R gate group 30 to 36 to prevent the liquid crystal from reaching the W level, resulting in unbalance in terms of direct current and shortening the life of the liquid crystal. This allows each segment to receive one AC signal during the transfer period.
An in-phase signal is added to 1, regardless of the display signal.
Segment is not lit. Further, during the holding period T2, since the gate circuit 22 is turned ON, the contents of the shift register are transferred to the display, and a predetermined display is performed. The ratio of the transfer period T and the holding (display) period T2, T1/T2, is small and confusing, but it depends on the clock signal and the number of display digits, but T
, /T2-1 is also practical. Specific segment signals are shown at 20 and 21. 20 is a signal of the segment a1 which is not lit, and is in the same phase as the AC signal 18, and 21 is a signal of the segment b1 which is lit, which is in opposite phase to the AC signal 18.

Note that 1', 20'', and 21' are the time axes (horizontal axes) of 11, 20, and 21 that are shortened, and the changes between each waveform are clearly shown. Regarding the example, Part 3
This will be explained in the figure.

Circuits and blocks having the same numbers as those in FIG. 2 have the same functions and perform the same operations, so detailed explanations will be omitted. 5
is an exclusive 0R gate circuit for display AC 5 drive, 6, 7,
8 and 9 are display shift registers, 10 is a liquid crystal display, and 22 is a display control circuit.

In the above circuit configuration, the signals applied to the display body during the transfer period and the holding period (display period) will be explained. The control circuit 22 is composed of a transmission gate group of two transmission gates TG, , tgl per segment, and cuts off the display signal and applies a constant signal during the transfer period (T1). The explanation here is display body 1
The explanation will be given regarding segment a1 of 0, but the other segments perform similar operations.

The input of the transmission gate TG, is connected to one of the outputs of the shift register 9, the output is connected to the display a1 segment, the input signal of the transmission gate Tgl is AC signal 11, 11', and the output is connected to the input signal of the transmission gate Tgl. Like the output, it is connected to the display body a1 segment. A control signal 18 having a pulse width T1 and the same frequency as the AC signals 11 and 11' is applied to each of the transmission gates TGl and tgl to perform a switching operation. Note that 37 is an inverter for inverting the control signal 18, which is applied to one gate of the transmission gates TGl and tgl, and converts the gate signal of TGl into TG since the gate signal of Tgl has the opposite polarity.
If l is in a conductive state, Tg is in a non-conductive state, and if TGl is in a non-conductive state, Tgl is in a conductive state. Therefore, the control signal 18, 18'' makes TGl non-conductive during the transfer period T, and since Tgl is in the conductive state, the signal of the shift register is cut off, and the AC signal 11, 1V is applied to the display, and during the holding period (Display period) At T2, TG is conductive, Tg
, are in a non-conductive state, the display body is directly connected to the shift register, a display signal is applied, and a predetermined display is performed. Note 2
0,20'' is the segment signal of a1 when not lit, 21,
21' is a segment signal of b1 at the time of lighting, which is inverted with respect to the AC signal. In this way, with a very small number of elements, the transfer signal is cut off and the constant signal is applied during one transfer period. As described above, during the transfer period when display segment signals are transferred, the display body and shift register are completely cut off, the load capacitance (segment capacitance) is no longer charged or discharged by the display signal, and the lights-off signal is also enabled. Therefore, all segments are not lit, and the current consumption of the display is significantly reduced compared to conventional methods.

Furthermore, even though the frequency of the transfer clock signal has been increased, since the capacitive load has become extremely small, waveform distortion of the display signal (transfer signal) does not occur. As described above, since signal transfer is easy and implementation on a circuit is easy, the circuit configuration is capable of low current display, making it ideal as a circuit for an all-electronic wristwatch. Although the display is explained using a liquid crystal, other display bodies such as electrochromic or the like can also be applied.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a display circuit using a conventional shift register. 2 and 3 are display circuit block diagrams according to the present invention. 2, 4, 6, 7, 8, 9...Shift register, 3...Decoder, 10...Display body, 22...Control gate circuit ,TG,,tgl
...transmission gate.

Claims (1)

[Claims] 1 means for serially extracting a display signal; a shift register having a number of bits corresponding to at least the total number of display segments, which transfers the extracted signal every fixed period and holds the signal for display for a fixed period; A display circuit comprising means for applying a constant signal to the display body or segment during the transfer period.