JPH03151675A - End face radiation type semiconductor light emitting device and manufacture thereof - Google Patents

End face radiation type semiconductor light emitting device and manufacture thereof

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Publication number
JPH03151675A
JPH03151675A JP1290050A JP29005089A JPH03151675A JP H03151675 A JPH03151675 A JP H03151675A JP 1290050 A JP1290050 A JP 1290050A JP 29005089 A JP29005089 A JP 29005089A JP H03151675 A JPH03151675 A JP H03151675A
Authority
JP
Japan
Prior art keywords
mesa
layer
region
edge
active layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1290050A
Other languages
Japanese (ja)
Inventor
Soichi Kimura
木村 壮一
Nagataka Ishiguro
永孝 石黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1290050A priority Critical patent/JPH03151675A/en
Publication of JPH03151675A publication Critical patent/JPH03151675A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To solve problems of light emission efficiency, yield, and reliability, etc., being lowered by LPE(liquid phase epitaxial)-growth of an active layer for performing optical amplification on a striped mesa directly or through a predetermined LPE growth layer, isolated from parts other than the striped mesa. CONSTITUTION:A striped mesa part m is formed on the upper surface of an N-InP substrate 11 into an island shape, interrupted longitudinally of a device, on which substrate 11 there are grown four layers of an N-InP buffer layer 12, an InGaAsP active layer 13, a P-InP cladding layer 14, and a P-InGaAsP contact layer 15. The InGaAsP active layer 13 is grown such that its part on the upper part of the mesa part m is separated from other parts thereof, and about 2mum width thereof is buried in the P-InP cladding layer 14, whereby the so-called buried hetero structure is formed with the once LPE growth. Thus, since an end face radiation type LED of a window structure can be manufactured with the once LPE growth, there are eliminated problems on the manufacture which might be caused by lowering of light emission efficiency, yield, or reliability, etc.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、光通信に用いて好適な端面放射型の半導体発
光素子及びその製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an edge-emitting semiconductor light emitting device suitable for use in optical communications and a method for manufacturing the same.

(従来の技術) 一般に、端面放射型の発光素子(以下、LEDという)
は面発光のものに比べ、光ファイバーへの結合効率が高
く、シかもレーザより戻り光等の悪影響を受けにくく、
取扱いが容易な点から光通信にとって注目されている。
(Prior Art) Generally, an edge-emitting light emitting element (hereinafter referred to as an LED)
Compared to surface-emitting devices, the coupling efficiency to optical fibers is higher, and it is less susceptible to negative effects such as return light than lasers.
It is attracting attention for optical communications because it is easy to handle.

端面放射型LEDは臂開面から光を放射するが、レーザ
と異なり、レーザ発振を抑制するため臂開面を共振器に
しない工夫が必要である。これについて、璧開面をエツ
チングして傾斜させる方法、あるいは活性層のストライ
プ方向に光の励起領域と非励起領域を形成し、励起領域
に光が戻るのを非励起領域の活性層に吸収させて防止す
る方法等が提案されている。活性層を設けた励起領域と
設けない窓領域を有する、いわゆる窓構造は活性層端か
ら素子端面、または臂開面までの間で光が放射状に拡散
するため、端面からの反射光は活性層に入射され難く、
前述した2つの方法と組合せることにより、反射光の影
響はほぼ完全に除去される。
Edge-emitting LEDs emit light from the arm opening, but unlike lasers, it is necessary to take measures to prevent the arm opening from becoming a resonator in order to suppress laser oscillation. For this purpose, there is a method of etching and tilting the crack plane, or forming an excitation region and a non-excitation region of light in the stripe direction of the active layer, and absorbing the light returning to the excitation region into the active layer of the non-excitation region. Methods have been proposed to prevent this. In the so-called window structure, which has an excitation region with an active layer and a window region without an active layer, light is diffused radially from the edge of the active layer to the element end face or the open face of the arm. It is difficult for it to enter the
By combining the above two methods, the influence of reflected light can be almost completely eliminated.

そのような窓構造を有する端面放射型LEDの一例を第
7図に示す。図(a)1図(b)はそれぞれ断面構造図
及びそのD−D’線断面図である。71はN−InP基
板、72はN−InPクラッド層、73はInGaAs
P活性層、74はP−InPクラッド層であり、75は
P−InGaAsP層で、いわゆる埋め込みへテロ構造
を構成しており、窓領域のためにInGaAsP活性層
73が途中から除去されている。
An example of an edge-emitting LED having such a window structure is shown in FIG. Figures (a) and (b) are a cross-sectional structural view and a cross-sectional view taken along the line DD'. 71 is an N-InP substrate, 72 is an N-InP cladding layer, and 73 is InGaAs.
The P active layer 74 is a P-InP cladding layer, and the reference numeral 75 is a P-InGaAsP layer, which constitutes a so-called buried heterostructure, and the InGaAsP active layer 73 is removed from the middle to form a window region.

その除去された領域にはP−InP埋め込み層76と。A P-InP buried layer 76 is formed in the removed region.

N−InP電流ブロック層77が埋め込まれ、電流非注
入領域の窓領域を形成している。
An N-InP current blocking layer 77 is buried to form a window region of the current non-injection region.

励起領域のInGaAsP活性層73内に発生した4 光は、窓領域に入射すると屈折率による閉じ込めが起こ
らないので拡がり、窓領域の長さを適当にすることによ
って端面反射光がInGaAsP活性層73に入射する
帰還がほぼ防止され、それによって有害なレーザ発振は
ほぼ完全に抑制される。
When the light generated in the InGaAsP active layer 73 in the excitation region is incident on the window region, it is not confined by the refractive index and spreads. Incident feedback is substantially prevented, whereby harmful laser oscillations are almost completely suppressed.

(発明が解決しようとする課題) 以上のように、窓構造の端面放射型LEDは特性面で極
めて優れているが、しかしながら製造工程は2回以上の
液相エピタキシャル(以下、LPEという)成長を必要
とし、以下のような欠点を有している。
(Problems to be Solved by the Invention) As described above, edge-emitting LEDs with a window structure have extremely excellent characteristics, but the manufacturing process requires two or more liquid phase epitaxial (hereinafter referred to as LPE) growths. and has the following drawbacks:

すなわち、エツチングしたダブルへテロ(以下、DHと
略す)接合、N−InPクラッド層72゜InGaAs
P活性層73.P−InPクラッド層74を2回目のL
PE成長で埋め込む際、界面が高温の雰囲気ガス中にさ
らされるため、N−InPクラッド層72と、P−In
P埋め込みM2Cとにより形成されるPN接合が劣化し
やすく、リーク電流が増大して発光効率が低下する原因
となる。
That is, an etched double heterojunction (hereinafter abbreviated as DH), an N-InP cladding layer 72° InGaAs
P active layer 73. The P-InP cladding layer 74 is
When filling with PE growth, the interface is exposed to high temperature atmospheric gas, so the N-InP cladding layer 72 and the P-In
The PN junction formed by the P-embedded M2C is likely to deteriorate, causing an increase in leakage current and a decrease in luminous efficiency.

また、その2回目のLPE成長における昇温でDH接合
の不純物が拡散して、たとえばPN接合位置をN−In
Pクラッド層7層内2内動させ発光効率を低下させる。
In addition, due to the temperature increase during the second LPE growth, impurities in the DH junction are diffused, and the PN junction position is, for example, N-In.
The P cladding layer 7 moves within 2 layers to reduce the luminous efficiency.

さらに2回のLPE成長工程がコスト高を招来し、かつ
、長い工程のため歩留り、あるいは信頼性を低下させる
Furthermore, the two-time LPE growth process increases costs, and the long process reduces yield or reliability.

本発明は上述したような、従来の端面放射型LEDにお
ける、発光効率、歩留り、あるいは信頼性等の低下によ
る製造上の問題点を排除することを目的とする。
An object of the present invention is to eliminate the above-mentioned manufacturing problems of conventional edge-emitting LEDs due to deterioration in luminous efficiency, yield, reliability, etc.

(課題を解決するための手段) 本発明は上記の目的を、所定の第1の導電型の半導体基
板上に光の伝搬方向に延在する所定幅のストライプ状メ
サが、前記光の伝搬方向で部分的に除外されて、いわゆ
る島状に形成され、光増幅を行う活性層が前記ストライ
プ状メサ上に直接、または所定のLPE成長層を介して
、前記ストライプ状メサ部以外の部分と分離されLPE
成長することにより達成し、さらに発光効率の向上のた
め、電流ブロック層によるメサ領域への電流狭窄と、ス
トライプの長手方向に、メサ上の活性領域− 6− を光導波領域として他を非導波領域とする部分導波構造
を同時に形成する構成とし、さらに、それらの製造を容
易にするためメサ構造を2本の溝で挟まれた領域として
形成し、かつ基板の表面となす角をHrメタノール溶液
でエツチングして平滑化することにより達成する。
(Means for Solving the Problems) The present invention achieves the above object by forming a striped mesa having a predetermined width extending in the light propagation direction on a predetermined first conductivity type semiconductor substrate. The active layer that performs optical amplification is partially excluded from the striped mesa and formed in a so-called island shape, and is separated from the part other than the striped mesa directly on the striped mesa or via a predetermined LPE growth layer. and LPE
In order to further improve luminous efficiency, current confinement in the mesa region is achieved by a current blocking layer, and in the longitudinal direction of the stripe, the active region on the mesa is used as an optical waveguide region and the other regions are non-guiding regions. The configuration is such that the partial waveguide structure serving as the wave region is formed at the same time.Furthermore, in order to facilitate their manufacture, the mesa structure is formed as a region sandwiched between two grooves, and the angle formed with the surface of the substrate is Hr. This is achieved by etching and smoothing with a methanol solution.

(作 用) 本発明によれば、−度のLPE成長により窓構造の端面
放射型LEDを製造することが可能であるから、従来の
2回のLPIΣ成長によって生じていた上記種々の問題
点が解決される。
(Function) According to the present invention, since it is possible to manufacture an edge-emitting LED with a window structure by -degree LPE growth, the various problems described above caused by the conventional two-time LPI Σ growth can be solved. resolved.

(実施例) 以下、本発明の実施例を図面を用いて詳細に説明する。(Example) Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図は本発明の第1の実施例を示す図で図(a)。FIG. 1 is a diagram showing a first embodiment of the present invention, and is a diagram (a).

図(b)はそれぞれ断面構造図及びそのA−A’線断面
図で、N−InP基板11の上面にはストライプ状のメ
サ部mが、素子の長さ方向で途切れて島状に形成されて
おり、その高さは約3.5戸、幅は2.0戸である。こ
のようなN−InP基板11上にN−InPバッファ層
1:l!、 ■11GaAsP活性M13.P−InP
クラッドJP+14及びP−InGaAsPコンタクト
層15の4層を成長させた。メサ部mの形状を上記のよ
うに制御した場合、I n G a A s P活性層
13は図示のようにメサ部mの」二部と、その他の部分
とが途切れて成長し、約2pm幅のInGaAsP活性
層13がP−InPクラット層14によって埋め込めら
れ、いわゆる埋め込みへテロ構造が1回のLPE成長に
よって形成された。このとき素子の成長方向では、図(
b)のようにL n G aΔsP活性層1:(が途切
れており、襞間端面の反射による光帰還が抑制されてレ
ーザ発振が阻止され、端面放射型LEDとしての安定性
が増太し、しかもPN接合は高温のガスに長時間さらさ
れないため、従来の信頼性低下は起こらない。
Figure (b) is a cross-sectional structure diagram and a cross-sectional view taken along the line A-A', respectively, in which a striped mesa portion m is formed in the upper surface of the N-InP substrate 11 in the form of an island, discontinuous in the length direction of the element. The height is approximately 3.5 units and the width is 2.0 units. An N-InP buffer layer 1:l! is formed on such an N-InP substrate 11. , ■11GaAsP activity M13. P-InP
Four layers, cladding JP+14 and P-InGaAsP contact layer 15, were grown. When the shape of the mesa part m is controlled as described above, the InGaAsP active layer 13 grows with the two parts of the mesa part m cut off from the other parts as shown in the figure, and the size of the InGaAsP active layer 13 is about 2 pm. A wide InGaAsP active layer 13 was buried by a P--InP crat layer 14, and a so-called buried heterostructure was formed by one LPE growth. At this time, in the growth direction of the device, the figure (
As shown in b), the L n GaΔsP active layer 1: ( is interrupted, suppressing optical feedback due to reflection from the end facet between the folds, preventing laser oscillation, and increasing stability as an edge-emitting LED. Moreover, since the PN junction is not exposed to high-temperature gas for a long period of time, the conventional reliability degradation does not occur.

第2図は第2の実施例咎示す図で、図(a)は要部断面
図、図(b)はそのB−B′断面図である。
FIG. 2 is a diagram showing a second embodiment, in which FIG. 2(a) is a sectional view of a main part, and FIG. 2(b) is a sectional view taken along line BB'.

これは第1の実施例と異なり、メサ部mを形成するN−
InP基板21」―にN−InPバッファ層22、In
GaAsP活性層23に続いて、P−InPクラッ8− ド層24を苔く成長させ、続けてN−InP電流ブロッ
ク層25を、上記メサ部m以外の部分に成長させること
により、電流を効率的にメサ部mに集中させることを1
’iJ能にしたものであり、第1の実施例より一段と優
れた特性が実現された。
This differs from the first embodiment in that the N-
An N-InP buffer layer 22, an InP substrate 21''
Following the GaAsP active layer 23, a P-InP cladding layer 24 is grown in a mossy manner, and then an N-InP current blocking layer 25 is grown in a portion other than the mesa portion m, thereby increasing current efficiency. 1 to concentrate on the mesa part m
'iJ function, and even better characteristics than the first embodiment were realized.

第:3図は第33の実施例を示す部で図(a)、図(b
)はそれぞれ断面構造lメ1及びそのc−c′線断面図
である。
Figure 3 shows the 33rd embodiment; Figure (a) and Figure (b).
) are the cross-sectional structure 1 and its sectional view taken along the line c-c'.

一般に、電流狭窄を効果的に行うには電流ブロック層と
、活性層との間の層は抵抗率が高く、厚さが薄いことが
必要で、その層には通常P型層が用いられる。前述の第
2の実施例では全6層の成長を行い、各層の成長条件を
精密に制御する必要があったか、第3図の実施例は従来
のN−InP基板に代えてP−InP基板31を採用す
ることによりL P E成長の数を減らして工程の簡略
化を図っている。
Generally, in order to effectively constrict a current, the layer between the current blocking layer and the active layer needs to have high resistivity and be thin, and a P-type layer is usually used for this layer. In the second embodiment described above, a total of six layers were grown, and it was necessary to precisely control the growth conditions for each layer.In the embodiment shown in FIG. 3, a P-InP substrate 31 was used instead of the conventional N-InP substrate. By adopting this method, the number of LPE growths is reduced and the process is simplified.

すなわち、島状にメサ部mを形成したP−I nP基板
31上に、まず、メサ部m以外の領域にNInP電流フ
電流クロッ9層32させてから、引続きP−InPバッ
ファ層33 + I n G a A s P活性層3
4゜N−InPクラッド層35及びN−InGaAsP
コンタクト層36の4層を成長させることにより端面放
射型LEDを作成した。
That is, on a P-I nP substrate 31 on which an island-shaped mesa portion m is formed, first, a NInP current flow layer 32 is formed in a region other than the mesa portion m, and then a P-InP buffer layer 33 + I is formed. nGaAsP active layer 3
4°N-InP cladding layer 35 and N-InGaAsP
An edge-emitting LED was created by growing four layers of contact layer 36.

このように、P−InP基板を使用するとLPE成長層
を6層から5層に減することができる。この場合、N型
層へのオーミックコンタクトが容易であるから、N−I
nGaAsPコンタク1−層36を設けなくとも容易に
電極38をN−InPクラッド層35に形成でき、さら
にLPE成長層を減することができる。
Thus, when using a P-InP substrate, the number of LPE grown layers can be reduced from six to five. In this case, since ohmic contact to the N-type layer is easy, N-I
The electrode 38 can be easily formed on the N-InP cladding layer 35 without providing the nGaAsP contact layer 36, and furthermore, the number of LPE growth layers can be reduced.

埋め込みへテロ構造の端面放射型LEDを1回のLPE
成長で作成するポイントは、光を増幅する活性層をメサ
部で分離し、LPE成長させるようにメサ部を所定の高
さに制御することである。
One-time LPE of embedded heterostructure edge-emitting LED
The key point in creating the active layer by growth is to separate the active layer that amplifies light at the mesa portion, and to control the mesa portion to a predetermined height so as to allow LPE growth.

すなわち、そのため上記の第3の実施例はP−InPバ
ッファ層33の成長後の段差を制御するために、N−I
nP電流電流クロッ9層32さを極力薄くする必要があ
る。しかしながら1通常のメサ形状ではN−InP電流
電流クロッ9層32サ部m以10 外で均一に、しかも途切れなく成長させるには厚さを、
0.7μm以上にする必要があることを発明者らは究明
した。成長層が薄いとメサ部m付近で途切れがでるのは
、成長の速度が平坦部と湾曲部とで異なり、湾曲部が速
いため本来平坦部に成長すべき溶質が湾曲部に、いわゆ
る食われるためである。この現象の解決法を発明者らは
精密な実験によって、メサ部をU字溝中に形成すること
に見出し、成長層の厚さが0.5pn+以下になっても
途切れを生じないことを究明した。
That is, in the third embodiment described above, in order to control the step difference after the growth of the P-InP buffer layer 33, the N-I
It is necessary to make the nP current cross layer 32 as thin as possible. However, in a normal mesa shape, in order to grow the N-InP current cross layer uniformly and without interruption beyond 32 m, the thickness must be
The inventors have found that it is necessary to make the thickness 0.7 μm or more. When the growth layer is thin, there is a break near the mesa part m because the growth rate is different between the flat part and the curved part, and because the curved part is faster, the solute that should originally grow in the flat part is eaten by the curved part. It's for a reason. Through precise experiments, the inventors found a solution to this phenomenon by forming a mesa part in a U-shaped groove, and found that no discontinuity occurs even when the thickness of the growth layer is 0.5 pn+ or less. did.

第4図は、上述の究明結果による第4の実施例の要部断
面図である。まず、P−InP基板41の表面に幅約7
μm、深さ約3.57zmの溝Tを2本、約2pの間隔
で平行に形成した。この基板上にNInP電流ブ電流ク
ロッ9層42InPバッファ層43゜InGaAsP活
性層44.N−InPクラッド層45の4層を成長させ
て素子構造を形成した。これによリメサ部mは素子長方
向に島状に形成され、レーザ動作が抑制される安定した
端面放射型LEDが形成できた。
FIG. 4 is a sectional view of the main part of the fourth embodiment based on the above investigation results. First, on the surface of the P-InP substrate 41, a width of approximately 7 mm is applied.
Two grooves T each having a diameter of .mu.m and a depth of about 3.57 zm were formed in parallel with an interval of about 2p. On this substrate, NInP current block 9 layers 42 InP buffer layer 43° InGaAsP active layer 44 . Four N-InP cladding layers 45 were grown to form a device structure. As a result, the mesa portion m was formed in an island shape in the device length direction, and a stable edge-emitting LED in which laser operation was suppressed could be formed.

LPE成長層において最適な形状を得るには、各層の過
飽和度を精密に制御する必要があり、かつ、溝Tのエツ
ジにおいても良好にLPE成長層の厚さを保つには、第
5図に断面図を示したように、形成後の溝Tにさらに追
加エツチングを行って、エツジ部Eの角部を平滑にする
ことが効果的である。
In order to obtain the optimal shape for the LPE grown layer, it is necessary to precisely control the degree of supersaturation of each layer, and to maintain the thickness of the LPE grown layer well even at the edges of the groove T, the method shown in Fig. 5 is required. As shown in the cross-sectional view, it is effective to further perform additional etching on the groove T after it has been formed to make the corners of the edge portion E smooth.

第6図は、その追加エツチングを示す工程断面図で、P
−InP基板61上にレジストマスク62を用いて溝パ
ターンを形成しく図(a))、Brメタノールの0.6
%溶液エツチングにより、溝63を形成(図(b))、
次に中央のメサ部mを再度レジストマスク64で覆って
(図(C))、上記Brメタノール溶液でエツチングす
ると、溝63の外側のエツジ部65が適度に平滑になる
(図(d))。この平滑性は他のエツチング液、たとえ
ばH(l系の溶液では得られず。
FIG. 6 is a process cross-sectional view showing the additional etching.
- A groove pattern is formed on an InP substrate 61 using a resist mask 62.
% solution etching to form grooves 63 (Figure (b)),
Next, the central mesa portion m is covered again with the resist mask 64 (Figure (C)) and etched with the Br methanol solution, so that the edge portion 65 on the outside of the groove 63 becomes appropriately smooth (Figure (D)). . This smoothness cannot be obtained with other etching solutions, such as H(I)-based solutions.

Brメタノールの場合が最も容易に最適な形状にするこ
とができた。
In the case of Br methanol, the optimum shape could be obtained most easily.

前記、第5図の端面放射型LEDは電流値がI f =
100m Aで、光出力P o =1.5mWと高効率
11− 12− であり、電流値を増加してもI) N I) Nサイリ
スタ構造の電流狭窄の不安定性はなく、また周囲温度T
=−60℃のときもレーザ動作のない安定動作をした。
The edge-emitting LED shown in FIG. 5 has a current value of I f =
At 100 mA, the optical output P o = 1.5 mW and high efficiency 11-12- There is no instability of current confinement in the I)N thyristor structure even when the current value is increased, and the ambient temperature T
Even when the temperature was -60°C, the device operated stably without any laser movement.

以上、本発明の実施例をInGaAsP/InP系材料
を用いて詳細に説明したが、本発明は、他の例えばAl
)GaAs/GaAs系の化合物半導体材料を用いて、
また、基板にはP−InP基板に限らずN−InP基板
を用いることにより、同様に信頼性が高く、高効率で製
造コストの低い端面放射型LEDが実現できる。
Although the embodiments of the present invention have been described in detail using InGaAsP/InP-based materials, the present invention is also applicable to other materials such as Al
) Using a GaAs/GaAs-based compound semiconductor material,
Furthermore, by using an N-InP substrate instead of a P-InP substrate, an edge-emitting LED with high reliability, high efficiency, and low manufacturing cost can be realized.

(発明の効果) 以上説明して明らかなように本発明は、発光効率、歩留
り、信頼性等の低下及び製造のニス1−高の問題点を解
決した、1回のLPE成長層によって形成できる窓構造
の端面放射型LEDであり、さらに製造]1程の短縮化
、効率化が可能な利点を有するから実施して大きな効果
が得られる。
(Effects of the Invention) As is clear from the above explanation, the present invention solves the problems of deterioration of luminous efficiency, yield, reliability, etc. and the problem of varnish 1-high in manufacturing, and can be formed by a single LPE growth layer. It is an edge-emitting LED with a window structure, and has the advantage of being able to be manufactured in a shorter time and more efficiently, so it can be implemented with great effects.

4、 図面の簡、11Iな説明 第1図は本発明の第1の実施例を示す断面図、第2図は
同じく第2の実施例を示す断面図、第3図は同じく第3
の実施例を示す断面図、第4図。
4. Brief Description of the Drawings FIG. 1 is a sectional view showing the first embodiment of the present invention, FIG. 2 is a sectional view showing the second embodiment, and FIG. 3 is a sectional view showing the third embodiment.
FIG. 4 is a sectional view showing an embodiment of the invention.

第5図は第4の実施例の要部断面図、第6図は本発明要
部の形成工程を示す断面図、第7図は従来例を示す断面
図である。
FIG. 5 is a sectional view of the main part of the fourth embodiment, FIG. 6 is a sectional view showing the process of forming the main part of the present invention, and FIG. 7 is a sectional view of a conventional example.

11、21.71− N−I nP基板、12.22−
N−TnPバッファ層、13.23.34゜44 =−
InGaAsP活性層、31.41−・・P−InP基
板、32.42− N−InP電流電流クロッ9層3.
43・・・P−InPバッファ層、62.64・・・ 
レジストマスク、65゜E ・・・エツジ部、 m・・
・メサ部、63゜T・・・溝。
11, 21.71- N-I nP substrate, 12.22-
N-TnP buffer layer, 13.23.34°44 =-
InGaAsP active layer, 31.41-...P-InP substrate, 32.42- N-InP current current clock 9 layer 3.
43...P-InP buffer layer, 62.64...
Resist mask, 65°E...Edge part, m...
・Mesa part, 63°T...groove.

Claims (5)

【特許請求の範囲】[Claims] (1)第1導電型の半導体基板上に、光の伝搬方向に延
在するストライプ状メサが部分的に欠除されて島状メサ
に形成され、その島状メサ上に直接、または所定のエピ
タキシャル成長層を介して活性層が他の部分と離間して
エピタキシャル成長されていることを特徴とする端面放
射型半導体発光素子。
(1) On a semiconductor substrate of the first conductivity type, a striped mesa extending in the light propagation direction is partially removed to form an island mesa, and the island mesa is directly or predetermined. An edge-emitting semiconductor light emitting device characterized in that an active layer is epitaxially grown separated from other parts via an epitaxial growth layer.
(2)活性層に続いて第2導電型の半導体層がエピタキ
シャル成長され、その上に第1導電型の半導体層がメサ
以外の領域に形成され、メサ領域への電流狭窄と同時に
、メサ上の活性領域を光の導波領域に、他を非導波領域
とする部分導波構造が一体的に形成されていることを特
徴とする請求項(1)記載の端面放射型半導体発光素子
(2) A semiconductor layer of the second conductivity type is epitaxially grown following the active layer, and a semiconductor layer of the first conductivity type is formed on the active layer in a region other than the mesa. 2. The edge-emitting semiconductor light emitting device according to claim 1, wherein a partial waveguide structure is integrally formed in which the active region is a light waveguide region and the other region is a non-waveguide region.
(3)島状メサを形成した第1導電型の半導体基板上に
、第2導電型の第1の半導体層を上記メサ上以外に選択
的に形成し、続いて第1導電型の第2の半導体層を、少
なくともメサ上以外の領域に成長させ、さらに続いて活
性層が成長されて、メサ領域への電流狭窄と同時に、メ
サ上の活性領域を光の導波領域、他を非導波領域とする
部分導波構造が一体的に形成されていることを特徴とす
る請求項(1)記載の端面放射型半導体発光素子。
(3) On the semiconductor substrate of the first conductivity type on which the island mesa is formed, a first semiconductor layer of the second conductivity type is selectively formed other than on the mesa, and then a second semiconductor layer of the first conductivity type is formed. A semiconductor layer is grown at least in a region other than on the mesa, and then an active layer is grown to simultaneously constrict current to the mesa region and to transform the active region on the mesa into a light guiding region and the other non-guiding region. 2. The edge-emitting semiconductor light emitting device according to claim 1, wherein the partial waveguide structure serving as the wave region is integrally formed.
(4)半導体基板上にメサ部を2本の溝で挟持した形に
形成させ、その溝が半導体基板となす角部が平滑にエッ
チングされていることを特徴とする請求項(1)または
請求項(3)記載の端面放射型半導体発光素子。
(4) Claim (1) or claim characterized in that the mesa portion is formed on the semiconductor substrate in the form of two grooves sandwiched between them, and the corners that the grooves form with the semiconductor substrate are etched smoothly. The edge-emitting semiconductor light-emitting device according to item (3).
(5)第1導電型の半導体基板上に、光の伝搬方向に延
在させたストライプ状メサ部を部分的に欠除して島状メ
サに形成し、その島状メサ上に直接、または所定のエピ
タキシャル成長層を介して活性層を、他の領域部分と離
間してエピタキシャル成長させる端面放射型半導体発光
素子の製造方法において、上記ストライプ状メサ部を2
本の溝で挟持した形に形成させ、その溝が半導体基板と
なす角部をBrメタノール溶液によって平滑にエッチン
グすることを特徴とする端面放射型半導体発光素子の製
造方法。
(5) A striped mesa extending in the light propagation direction is partially removed on a semiconductor substrate of the first conductivity type to form an island mesa, and the striped mesa is formed directly on the island mesa or In the method for manufacturing an edge-emitting semiconductor light emitting device in which the active layer is epitaxially grown separated from other regions via a predetermined epitaxial growth layer, the striped mesa portion is formed into two
1. A method for manufacturing an edge-emitting semiconductor light-emitting device, which comprises forming an edge-emitting semiconductor light-emitting device in the form of a book sandwiched between grooves, and etching the corner portions of the grooves with a semiconductor substrate to smooth them using a Br methanol solution.
JP1290050A 1989-11-09 1989-11-09 End face radiation type semiconductor light emitting device and manufacture thereof Pending JPH03151675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1290050A JPH03151675A (en) 1989-11-09 1989-11-09 End face radiation type semiconductor light emitting device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1290050A JPH03151675A (en) 1989-11-09 1989-11-09 End face radiation type semiconductor light emitting device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH03151675A true JPH03151675A (en) 1991-06-27

Family

ID=17751139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1290050A Pending JPH03151675A (en) 1989-11-09 1989-11-09 End face radiation type semiconductor light emitting device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH03151675A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4844086A (en) * 1971-10-08 1973-06-25
JPS60242692A (en) * 1984-05-17 1985-12-02 Oki Electric Ind Co Ltd Light-emitting element and manufacture thereof
JPS63114289A (en) * 1986-10-31 1988-05-19 Fujitsu Ltd Semiconductor light emitting element and manufacture thereof
JPS63122190A (en) * 1986-11-11 1988-05-26 Fujitsu Ltd Manufacture of semiconductor light-emitting device
JPS63222476A (en) * 1987-03-11 1988-09-16 Nec Corp Manufacture of edge light emitting diode
JPS6476786A (en) * 1987-09-17 1989-03-22 Nec Corp Semiconductor light-emitting diode and manufacture thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4844086A (en) * 1971-10-08 1973-06-25
JPS60242692A (en) * 1984-05-17 1985-12-02 Oki Electric Ind Co Ltd Light-emitting element and manufacture thereof
JPS63114289A (en) * 1986-10-31 1988-05-19 Fujitsu Ltd Semiconductor light emitting element and manufacture thereof
JPS63122190A (en) * 1986-11-11 1988-05-26 Fujitsu Ltd Manufacture of semiconductor light-emitting device
JPS63222476A (en) * 1987-03-11 1988-09-16 Nec Corp Manufacture of edge light emitting diode
JPS6476786A (en) * 1987-09-17 1989-03-22 Nec Corp Semiconductor light-emitting diode and manufacture thereof

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