JPH03147334A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent current drive capacity from being reduced due to injection of a hot carrier by providing a second electrode layer so that it covers a gate electrode and then by forming it so that it may be positioned on a low- concentration impurity region in LDD structure. CONSTITUTION:A second gate electrode 110 is formed after the pattern of a first gate electrode 104 is formed and then an insulating film is formed by the CVD. Then, by etching back the insulating film by the RIE, a side wall insulating film 105 is formed. Then, by etching the second gate electrode layer 110 with this side wall insulating film 105 as a mask, the second gate electrode 110 is formed on the first gate electrode 104 so that it may be in contact with it. Further, the second gate electrode 110 is extended onto a low-concentration region 107, thus preventing concentration of charge due to a hot electron which is generated at the channel side of an L drain region.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to semiconductor devices, particularly LDDs (Light
The present invention relates to an improvement in the structure of a semiconductor device having a 1y doped drain structure.

[Conventional technology]

As miniaturization of single-conductor devices, especially MO3 type transistors, progresses, bunch-through development and hot carrier injection phenomena due to short channel effects have become more apparent.

In particular, regarding the hot carrier injection phenomenon, due to the concentration of the electric field on the channel side of the drain end, they are concentrated and captured in the interface between the substrate and the insulating film at the end of the gate electrode or in the insulating film, which deteriorates the transistor characteristics and turns on the N-channel. The resistance increases and punch-through occurs in the P channel. LDD to solve this problem? M construction has been used.

FIG. 2 is a diagram showing the structure of a conventional MOS (MOS) run sister having an LDD structure. In the figure, 201 is "1".
- Conductor substrate, 202 is an element isolation insulating film, 203 is a gate insulating film, 204 is a gate electrode, 205 is a sidewall insulating film, 206 is a high concentration impurity region, 207 is a low concentration impurity region, 208 is an interlayer insulation film, 209 is a wire electrode. In such a structure, by lowering the impurity concentration outside the gate electrode, it is possible to not only prevent bunch-through but also to alleviate electric field concentration at the drain end and suppress deterioration due to hot carrier injection phenomenon. .

As a recent example, an inverted T-shaped gate electrode is adopted as a further improvement of the LDD IN structure, and the gate electrode has a channel i! There has been research published on creating a structure that covers the n region so that the above-mentioned problems will not occur even in further miniaturized devices.
It is disclosed in the following paper. (l shi, +t shi)
M2O, [31,7], (19116), (US) I”7
42-745: TIano-Yuan Iluang
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Inverse-T Gate 5LruetuO [Problem to be Solved by the Invention] Due to the further miniaturization of transistors, even in the LDD structure in the conventional example, the charge injected into the sidewall of the second low concentration impurity region The problem of increased resistance and reduced current drive capability became apparent.

From the standpoint of solving this problem, the structure and manufacturing method disclosed in the above-mentioned document are effective, but in the process of forming the gate electrode, etching of the multi-resistance silicon layer constituting the gate electrode is necessary. It stops midway and forms an inverted T-shape, but it can be pointed out that this is difficult to control and has poor reproducibility.

The present invention solves these problems and provides a gate electrode IN structure with good feasibility and reproducibility.

[Means to solve the problem]

A conductor device of the present invention is a MIS type semiconductor device, which includes a semiconductor substrate or substrate region of a first conductivity type; A second gate formed so that at least a part of the side surface of the first gate 7Ii electrode formed on the insulating film and the first electrode 11 are in contact with each other, and the second gate is formed larger than the first gate electrode. a sidewall insulating film formed on the side surface of the first gate electrode; A 711 conductor device comprising a first impurity layer of a second conductivity type with a low concentration and a second high concentration impurity layer of a second conductivity type formed outside the second gate electrode. be.

〔Example〕

FIG. 1 is a diagram illustrating the structure of a conductor device without showing an embodiment of the present invention.

In the figure, 101 is a conductive substrate, 102 is an element isolation insulating film, 103 is a gate insulating film, 104 is a first gate electrode made of a first film, and 110 is a second gate electrode made of a second film.
, 105 is a sidewall insulating film, 1[)6 is a high concentration impurity region, 107 is a low concentration impurity region, 108 is an interlayer insulating film, and 109 is a wiring such as AL ft! It is extreme.

As shown in the figure, the second gate electrode 110 is formed on and in contact with the first gate electrode 1.04, and extends over the low concentration region 1()7. Therefore, concentration of charge due to hot electrons generated on the channel side of the L drain region can be prevented more than in the conventional LDD structure.

To describe this manufacturing process, after patterning the first gate electrode 104, the second gate electrode layer 110 is formed, and then an insulating film is formed by CVD.

First, the insulating film is etched back by RIE to form a sidewall insulating layer H105. Furthermore, by etching the lower second gate m-pole layer 11 using this sidewall insulating film 105 as a mask, this structure can be realized.

〔Effect of the invention〕

As described above, according to the present invention, the second electrode layer is provided so as to surround the conventional gate electrode, and this is formed so as to be located on the low concentration impurity region of the LDD structure, so that the current due to hot carrier injection is Prevents significant decrease in driving ability +
L, I was able to do it.

Therefore, even if the element is miniaturized, the characteristics can be maintained, and this has the great effect of being applicable to highly integrated semiconductor devices.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an element showing an embodiment of the present invention, and FIG. 2 is a sectional view of an element showing a conventional technique. In the figure, 101.2 [] 1 102.202 103.203 104.204 1 (] 5. 106. 1 [] 7. 108. 109. 11 () ・ 205 ・ 206 ・ 207 ・ 208 ・ 209・71'-Conductor substrate Element isolation insulating film Gate insulating film D-Electrode (first gate electrode) Sidewall insulating film High concentration impurity layer Low I-Living room insulating film Wiring electrode Second gate electrode Fig. 2

Claims (1)

[Claims] In a semiconductor device, particularly an MIS type semiconductor device, a semiconductor substrate or substrate region of a first conductivity type, a first insulating film formed on the semiconductor substrate or substrate, and a first insulating film formed on the first insulating film are used. A second gate electrode is formed such that at least a part of the side surface of the first gate electrode is in contact with the first gate electrode, and the second gate electrode is formed to be larger than the first gate electrode. a sidewall insulating film formed on the side surface of the first gate electrode; and a first impurity layer of a second conductivity type with a low concentration formed outside the first gate electrode and under the second gate electrode. and a second highly concentrated impurity layer of a second conductivity type formed outside the second gate electrode.