JPH03142826A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a defective contact due to break ar a stepped part of an eaves part of an interlayer nitride film and to enhance a product yield by a method wherein a process to etch and remove a silicon nitride film at a contact hole part by using high-temperature phosphoric acid is added to a manufacturing method by which a laminate structure of a BPSG film and a silicon nitride film is formed as an interlayer insulating film between a conductor for interconnection use and a semiconductor substrate. CONSTITUTION:A contact hole is made by etching an upper-layer BPSG film 19, an interlayer silicon nitride film 18, a lower-layer BPSG film 17 and a gate oxide film 7 and an etching treatment as a damage repair treatment on the silicon surface is executed by the same method as that in conventional cases. Consequently, an eaves part 23 of the interlayer silicon nitride film is produced. Then, an etching operation by using high-temperature phosphoric acid at 100 to 180 deg.C is added; the interlayer silicon nitride film 18 is retreated from an end part of the BPSG film. After that, the BPSG film is made to reflow in an atmosphere of nitrogen gas at about 900 to 1000 deg.C; the BPSG film 18 creeps into a recessed part where the interlayer silicon nitride film 17 and the film 19 have been retreated; it is possible to form a good contact hole where the interlayer silicon nitride film does not protrude in an eaves shape.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, in particular, a method for manufacturing a semiconductor device using a boron phosphorus glass film (BP) as a glabellar insulating film between a wiring conductor and a semiconductor substrate. The present invention relates to a method for forming a contact hole in a semiconductor device having a laminated structure of a silicon nitride film (SG film) and a silicon nitride film.

[Prior Art] Conventionally, this type of semiconductor device, especially an EP having a floating gate and a control gate polysilicon electrode
In ROM devices, silicon, which has a blocking effect against external impurities, is used to prevent impurities from the outside from penetrating into the floating gate and causing poor retention characteristics, where the charge accumulated in the floating gate disappears. A structure in which a nitride film is also used as an insulating film between the eyebrows is used.

FIG. 5 shows a conventional MO with a built-in E P ROM having the above-mentioned flN structure of silicon nitride film and BPSG film.
This is an example of a 5-type semiconductor device.

A P-type well 2 is formed in a P-type silicon substrate 1, and a field oxide film 6 is formed on the surface of the silicon substrate 1 to define an element region. After forming the floating gate 9 of the EPROM, a gate electrode 13a of a normal N-channel transistor and a control gate 136 type crystalline silicon film of the EPROM portion are formed by separate photolithography processes. In addition, as an interlayer insulating film,
A three-layer structure is adopted in which a glabellar silicon nitride film 18 is sandwiched between the lower J'1iBPSG film 17, the upper BPSG film 19, and the glabella of the upper and lower BPSG films.

In the conventional manufacturing method, the aluminum wiring 21
The frontage of the contact hole when connecting the N-type conductor 14 and the diffusion layer such as the N-type conductor 15 is shown in FIG. 6(a).
), (b).

That is, as shown in FIG. 6(a), using the photoresist pattern 22 patterned by photolithography as a mask, the upper #BPSG film 19 is wet-etched using buffered hydrochloric acid to reduce the thickness of the formed film. Then, by anisotropic dry etching, the remaining portion of the upper BPSG film 19, the silicon nitride film between the eyebrows, the lower BPSG film 17, and the gate oxide film 7 are etched to form a contact hole. It has a frontage.

Thereafter, as shown in FIG. 6(b), wet etching using buffered hydrochloric acid was added for the purpose of recovering the damage to the silicon surface caused by dry etching at the time of opening the contact hole, and the formation of the contact hole was completed. After that, aluminum wiring 21 is applied and aluminum alloy is applied to complete all manufacturing steps.

[Problems to be Solved by the Invention] In the conventional contact hole forming method described above, as shown in FIG. 6(b), the BPS of the upper layer and the lower layer
The etching rate of the G film and the glabellar nitride film provided between the eyebrows is different, and
Wet etching is performed for the purpose of damage treatment after contact dry etching because the etching rate of the film is much faster than the etching rate of silicon nitride film, and silicon nitride film is hardly etched by buffered hydric acid. In this case, the frontage area of the BPSG film is larger than the frontage area of the glabellar nitride film, and as a result, the interlayer nitride film is doubled at the frontage of the contact hole.
It has a structure that protrudes like an eave from the edge of the BPSG film of the layer.

As a result, when the aluminum wiring 21 is formed by the sputtering method, as shown in FIG. This method had the disadvantage that contact failures due to breakage of aluminum wiring frequently occurred in the eaves of the device, resulting in a significant decrease in yield.

[Differences between the invention and the prior art] In the method of forming a contact hole in the prior art described above, the formation of an eaves of the silicon nitride film between the eyebrows due to side etching of the BPSG film due to wet etching during damage recovery processing after contact dry etching. Therefore, it had the disadvantage that the aluminum wiring was broken.

In contrast, the method for forming a contact hole according to the present invention includes a step of etching away the interlayer silicon nitride film in the contact hole portion using high-temperature phosphoric acid, and removes the glabella insulating film that has formed in the shape of a canopy using BP.
The difference is that the SG film can be set back from the edge of the SG film and removed reliably, and the reduction in yield caused by contact failures that occurred frequently in the past can be significantly improved.

[Means for Solving the Problems] The present invention aims to solve the above-mentioned conventional problems,
One method is to use a laminated insulating layer in which a second insulating film, which has a slower etching rate than the first insulating film, is sandwiched between the first insulating films, and connect it to a wiring conductor on a semiconductor substrate and a semiconductor substrate. In a method for manufacturing a semiconductor device having between and a step of selectively etching away the second insulating film protruding from the inner peripheral surface of the through hole by isotropic etching.

The other method is to use a laminated insulating layer in which a second insulating film, which has a slower etching rate than the first insulating film, is sandwiched between the first insulating films, to form a wiring conductor on a semiconductor substrate. and a semiconductor substrate, the method includes the steps of forming an insulating layer consisting of a first insulating film and a second insulating film on the lower layer side on the semiconductor substrate, and forming a required through hole. selectively etching and removing the second insulating film using a first photoresist pattern having an opening larger than the diameter; forming a first insulating film, and etching the insulating layer on which the upper first insulating film is formed by anisotropic etching using a second photoresist pattern having a required through-hole diameter. The method is characterized by comprising a step of forming a hole. That is, the present invention provides a method for manufacturing a semiconductor device having a laminated structure of a BPSG film and a silicon nitride film on a semiconductor substrate as a glabellar insulating film between a wiring conductor and a semiconductor substrate. This is a method of manufacturing a semiconductor device characterized by including a step of etching with high temperature phosphoric acid.

[Example] Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(f) are cross-sectional views showing the manufacturing method according to the first embodiment of the present invention in order of each step.

Further, FIG. 2 is a cross-sectional view showing the contact hole forming process of this embodiment in the order of manufacturing steps.

First, as shown in FIG. 1(a), a P-type well 2 is selectively formed on a P-type silicon substrate 1, and then a silicon oxide film 3 is formed on the surface of the silicon substrate 1 to a thickness of 300 to 900 Å. do. A silicon nitride film 4 is deposited thereon to a thickness of 1,000 to 1,500 mm using the CVD method, and is etched into a desired pattern.

Then, as shown in FIG. 1(b), a P-type ring conductive layer 5 is formed by selective ion implantation, and after removing the photoresist (not shown) used for this, the silicon nitride film 4 is removed. Selective oxidation is performed using a mask to form a field degraded film 6 on the main surface of the silicon substrate 1 to define an element region.

After removing the silicon nitride film 4 and the silicon oxide film 3, as shown in FIG. Polycrystalline silicon film 8 of 6000
Formed on the entire surface to a thickness of ~8000A. After this, the first
As shown in Figure (d), by thermally diffusing phosphorus at a temperature of 850 to 950°C so that the sheet resistance becomes about 30 to 50 Ω/portion, and patterning it by photolithography, the EPROM element can be fabricated. It is formed as a floating gate 9.

and normal N-channel MO5 in other element areas)
A gate oxide film 10 of the transistor is formed to a thickness of 300 to 800 Å, and at the same time the floating gate 9
An inter-gate oxide film 11 is also formed on the 0 surface.

Thereafter, a second polycrystalline silicon film 12 is formed using the CVD method.
The sheet resistance is set to 8 to 16 ohms/hole by forming the sheet to a thickness of 4,000 to 8,000 ohms and subjecting it to phosphorus diffusion. Subsequently, as shown in FIG. 1C, the second polycrystalline silicon film 12 is patterned to form a gate electrode 13a of a normally N-channel MOS transistor and a control gate 13b of an EPROM element. Further, N-type conductive layers 14 and 15 are formed by ion implantation. On top of this, by thermal oxidation method, 200 to 6
A silicon oxide film 16 of 00A is formed.

In the next iteration, the lower BPSG film 17 (approximately 100
0~3000A) interlayer silicon nitride film 18 (approximately 100~
500, A, ), and the upper 1BPsG film 19 (approximately 5
000-100OOA).

The contact hole forming process in this embodiment is performed as shown in FIG. Upper layer BPS shown in Figure 2(a)
The frontage of the contact hole is formed by etching the G film 19 with buffered hydrochloric acid and the upper layer BPSG film 19, the glabella silicon nitride film 18, the lower layer BPSG film 17, and the Goo 14a film 7 by etching the G film 19 with buffered hydrochloric acid, and by anisotropic dry etching. The steps up to the etching treatment using buffered hydrochloric acid as a damage recovery treatment for the silicon surface after contact dry etching shown in FIG. 6 are the same as in the conventional method shown in FIG. Therefore, at this point, the silicon nitride film eaves part 2 between the eyebrows is etched by the buffered fluoric acid etching described above.
3 remains occurring.

In the manufacturing method of the present invention, in the next step, as shown in FIG. 2(c), etching with high-temperature phosphoric acid at 100 to 180°C is added to etch only the silicon nitride film between the eyebrows, and as a result, the silicon nitride film 18 between the eyebrows is etched. It is set back from the edge of the BPSG film.

After that, the BPSG film is reflowed in a nitrogen gas atmosphere at about 900 to 1000°C, as shown in Fig. 1 (f
) <BPSG film 18 film layer 8 silicon nitride film 1
It is possible to form a good contact hole in which the silicon nitride film between the eyebrows does not protrude in the form of a canopy by entering the recessed portion of 7.19.

Thereafter, aluminum wiring 21 is formed by sputtering, and aluminum alloy is applied to complete the semiconductor manufacturing process.

FIG. 3 is a cross-sectional view after forming the glabellar silicon nitride film 18 in the second embodiment of the present invention, and FIG. 4 is a cross-sectional view showing the contact hole forming process in the second embodiment in order of process. In the first embodiment described above, the edge of the silicon nitride film 18 between the eyebrows was removed by etching with high-temperature phosphoric acid after the opening of the contact hole, but in this embodiment, the silicon nitride film 18 between the eyebrows at the contact hole portion was etched away before the upper BPSG film 19 was formed. A mask pattern having a diameter larger than the size of the contact hole is formed by photolithography, and this mask pattern is used to remove the silicon nitride film 18 between the eyebrows in the contact hole portion by etching with high-temperature phosphoric acid.

In FIG. 4(a), only the silicon nitride film 18 between the eyebrows at the front end of the contact hole in the subsequent process is selectively etched away using a photoresist pattern 22 by photolithography. As mentioned above, mask pattern 2 used at this time
In No. 2, a mask pattern is used in which the aperture size a is larger than the aperture size b between the mask patterns when contact holes are formed in the subsequent process by the amount of side etching of the BPSG film by buffered hydrochloric acid performed as a damage treatment during contact dry etching.

Next, as shown in FIG. 4(b), after forming an upper layer BPSG film 19, contact holes are opened in the same manner as in the prior art.

In the etching using buffered hydrochloric acid for damage treatment after the contact dry etching mentioned above,
Although the BPSG film is side-etched, the opening of the glabellar silicon nitride film 18 is formed taking side etching into consideration, so the glabellar silicon nitride film 18 remains inside the edges of the BPSG films 17 and 19. It does not overhang like a canopy.

In the first embodiment, since the high-temperature phosphoric acid treatment is performed after the frontage of the contact hole, there is a concern that impurities such as phosphorus may be mixed into the diffusion layer, but in this embodiment, the treatment can be performed before the frontage of the contact hole. There is no need to worry as mentioned above.

[Effects of the Invention] As explained above, the present invention uses BPS as an insulating film between the eyebrows.
In the manufacturing method of a semiconductor device having a laminated structure of a G film and a silicon nitride film, the addition of a step of etching away the silicon nitride film in the contact hole portion using high temperature phosphoric acid has made it possible to remove the silicon nitride film in the contact hole by etching the silicon nitride film using high-temperature phosphoric acid. B in wet etching process
It is possible to completely remove the eaves of the silicon nitride film between the eyebrows, which is caused by the difference in etching rate between the PSG film and the silicon nitride film. This makes it possible to prevent contact failures caused by breakage at the nitride film ridge between the eyebrows, which occurs in conventional manufacturing methods, when depositing metal for wiring, greatly improving product yields and producing highly reliable semiconductors. This has the effect of making it possible to manufacture the device.

[Brief explanation of the drawing]

FIGS. 1(a) to (f) are cross-sectional views showing the first embodiment of the present invention in the order of manufacturing steps, and FIGS. 2(a) to (C) are cross-sectional views showing the first embodiment of the present invention.
3 is a cross-sectional view showing the contact hole frontage process in the example in order of the manufacturing process, FIG. 3 is a cross-sectional view after formation of the glabella nitride film in the second example of the present invention, and FIGS. A cross-sectional view showing the contact hole opening process in the second embodiment in the order of the manufacturing process, FIG. 5 is a cross-sectional view of a semiconductor device manufactured by the conventional manufacturing method, and FIGS. 6(a) and 6(b) are FIG. 3 is a cross-sectional view showing a contact hole opening step in the manufacturing method in the order of the manufacturing steps. 1...P-type silicon substrate, 2...
...P-type well, 3...Silicon oxide film, 4...Silicon nitride film, 5...P-type conductive layer, 6... ...Field oxide film, 7.10...
...Gate oxide film, 8...First polycrystalline silicon film, 9...
・・・・・・Floating gate, 11・・・・・・
Intergate oxide film, 12...Second polycrystalline silicon film, 13a.
...Gate electrode, 13b.◆...Control gate, 14.15.
...N-type conductive layer, 16...Silicon oxide film, 17...Lower BPSG film, 18...Interlayer silicon nitride film, 19...
...upper layer BPSG film, 20...contact hole, 21...
...Aluminum wiring, 22...Photoresist pattern, 23...Interlayer nitride film eaves.

Claims (3)

[Claims] (1) A laminated insulating layer, in which a second insulating film whose etching rate is slower than the first insulating film is sandwiched between the first insulating films, is connected between the wiring conductor on the semiconductor substrate and the semiconductor substrate. In a method of manufacturing a semiconductor device having between
A process of anisotropically etching the insulating layer using a photoresist pattern to form a through hole leading to the semiconductor substrate, a process of isotropically etching the inner peripheral surface of the formed through hole, and a process of isotropically etching the insulating layer using a photoresist pattern. A method of manufacturing a semiconductor device, comprising the step of selectively etching away a second insulating film protruding from an inner peripheral surface of a through hole. (2) A laminated insulating layer, in which a second insulating film whose etching rate is slower than the first insulating film is sandwiched between the first insulating films, is connected between the wiring conductor on the semiconductor substrate and the semiconductor substrate. A method for manufacturing a semiconductor device having a semiconductor device in between includes a step of forming an insulating layer consisting of a first insulating film and a second insulating film on the lower layer side on a semiconductor substrate, and forming an opening larger than a required through hole diameter. selectively etching away the second insulating film using the first photoresist pattern, and etching the first insulating film on the upper layer side on the insulating layer from which the second insulating film has been selectively etched away; a step of forming a film, and a step of forming through holes in the insulating layer on which the first insulating film on the upper layer side is formed by anisotropic etching using a second photoresist pattern having a required through hole diameter. A method for manufacturing a semiconductor device, comprising: (3) The first insulating film is a borophosphorus glass film, the second insulating film is a silicon nitride film, and the silicon nitride film is etched away using high-temperature phosphoric acid. A method for manufacturing a semiconductor device according to item 1 or 2.