JPH03132201A - Microwave integrated circuit device - Google Patents

Microwave integrated circuit device

Info

Publication number
JPH03132201A
JPH03132201A JP1270666A JP27066689A JPH03132201A JP H03132201 A JPH03132201 A JP H03132201A JP 1270666 A JP1270666 A JP 1270666A JP 27066689 A JP27066689 A JP 27066689A JP H03132201 A JPH03132201 A JP H03132201A
Authority
JP
Japan
Prior art keywords
signal line
bias circuit
dielectric substrate
line
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1270666A
Other languages
Japanese (ja)
Inventor
Hisashi Adachi
寿史 足立
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1270666A priority Critical patent/JPH03132201A/en
Publication of JPH03132201A publication Critical patent/JPH03132201A/en
Pending legal-status Critical Current

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  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)
  • Microwave Amplifiers (AREA)

Abstract

PURPOSE:To improve the low-pass filter characteristic of a bias circuit by connecting a signal line to a conductor pattern with a metallic fine wire, and connecting the conductor pattern to the bias circuit with a soldered metallic wire or a metallic wire adhered with a conductive adhesive. CONSTITUTION:The signal line 3 is comprised on a dielectic substrate 2 for signal line with a microstrip line, and the bias circuit 5 is comprised on a dielectric substrate 4 for bias circuit with the microstrip line. The dielectric constant of the substrate 4 for bias circuit is set higher than that of the dielectric substrate 2 for signal line, and a pattern 7 for connection is provided on the substrate 2 for signal line separately from the signal line 3. And one terminal of the bias circuit 5 is connected to the pattern 7 for connection with the metallic wire 8, and the other terminal of the bias circuit 5 is connected to a bias terminal 9, and the metallic fine wire 6 connects the pattern 7 for connection to the center part of the signal line 3. Thereby, it is possible to improve the low-pass filter characteristic of the bias circuit 5, and to eliminate the influence of the bias circuit 5 on the signal line 3.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体素子とマイクロストリップ線路で構成し
たバイアス回路を備えたマイクロ波集積回路装置に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a microwave integrated circuit device equipped with a bias circuit composed of a semiconductor element and a microstrip line.

従来の技術 マイクロストリップ線路で半導体素子を使用する場合に
は、4分の1波長の長さの高インピーダンス線路と4分
の1波長の長さの低インピーダンス線路を組み合わせた
低域通過フィルタ型のバイアス回路がよく用いられる。
Conventional technology When using a semiconductor device in a microstrip line, a low-pass filter type that combines a high impedance line with a length of 1/4 wavelength and a low impedance line with a length of 1/4 wavelength is used. Bias circuits are often used.

第2図に従来のマイクロ波集積回路装置の上面図を示す
、第2図において、31は半導体素子、32は誘電体基
板、33は信号線路、34はバイアス回路、35はバイ
アス端子である。信号線路33及びバイアス回路34は
誘電体基板32上にマイクロストリップ線路で構成され
ている。バイアス回路34は線路幅の狭い4分の1波長
の長さの高インピーダンス線路と線路幅の広い4分の1
波長の長さの低インピーダンス線路を組み合わせた低域
通過フィルタである。
FIG. 2 shows a top view of a conventional microwave integrated circuit device. In FIG. 2, 31 is a semiconductor element, 32 is a dielectric substrate, 33 is a signal line, 34 is a bias circuit, and 35 is a bias terminal. The signal line 33 and the bias circuit 34 are formed of microstrip lines on the dielectric substrate 32. The bias circuit 34 consists of a high impedance line with a narrow line width of 1/4 wavelength and a 1/4 line with a wide line width.
This is a low-pass filter that combines a wavelength-long low-impedance line.

以上のように構成された従来のマイクロ波集積回路装置
においては半導体素子31はバイアス端子35からバイ
アス回路34と信号線路33を介して給電される。バイ
アス回路34は低域通過フィルタであリ、信号線路33
を伝わる信号成分がバイアス端子35に伝わるのを阻止
し、直流成分を通過させる。
In the conventional microwave integrated circuit device configured as described above, power is supplied to the semiconductor element 31 from the bias terminal 35 via the bias circuit 34 and the signal line 33. The bias circuit 34 is a low-pass filter, and the signal line 33
The signal components transmitted through the bias terminal 35 are prevented from being transmitted to the bias terminal 35, and the DC components are allowed to pass through.

発明が解決しようとする課題 しかしながら上記のような構成では、バイアス回路34
が信号線路33と同じ誘電体基板32上に構成されてい
るため、誘電体基板32の誘電率が高いときや誘電体基
板32の厚みが薄いときは、誘電率が低いときや厚みが
厚いときよりも同じインピーダンスを実現する線路の幅
は狭くなる。線路の幅を狭くするのには作成上の限界が
あるため、誘電体基板32が高誘電率で薄い場合にはバ
イアス回路34の高インピーダンス線路の幅を十分に狭
くできず十分に高インピーダンスを実現できない、よっ
て、バイアス回路34の低域通過フィルタ特性が劣化し
、バイアス回路34が信号線路33に対して無視できな
いインピーダンスとなり、信号周波数がバイアス端子3
5に漏れ、全体の特性が劣化するという課題を有してい
た。
Problems to be Solved by the Invention However, in the above configuration, the bias circuit 34
is formed on the same dielectric substrate 32 as the signal line 33, so when the dielectric constant of the dielectric substrate 32 is high or the thickness of the dielectric substrate 32 is thin, it is different when the dielectric constant is low or the thickness is thick. The width of the line that achieves the same impedance becomes narrower. There is a manufacturing limit to narrowing the width of the line, so if the dielectric substrate 32 has a high dielectric constant and is thin, the width of the high impedance line of the bias circuit 34 cannot be narrowed sufficiently, and it may be difficult to make the high impedance line narrow enough. As a result, the low-pass filter characteristics of the bias circuit 34 deteriorates, and the bias circuit 34 becomes a non-negligible impedance to the signal line 33, causing the signal frequency to become lower than the bias terminal 3.
5, and the overall characteristics deteriorated.

本発明はかかる点に鑑み、信号線路にほとんど影響を与
えずに半導体素子にバイアスを加えることを可能にする
マイクロ波集積回路装置を提供することを目的とする。
SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to provide a microwave integrated circuit device that makes it possible to apply a bias to a semiconductor element with almost no effect on a signal line.

課題を解決するための手段 本発明は、半導体素子と、第1の誘電体基板上゛にマイ
クロストリップ線路で構成された信号線路と、第2の誘
電体基板上にマイクロストリップ線路で構成されたバイ
アス回路と、金属キャリアとを備え、第2の誘電体基板
の誘電率は第1の誘電体基板の誘電率よりも小さく、前
記第1の誘電体基板上に前記信号線路にパターンで接続
していない導体パターンを設け、前記信号線路と前記導
体パターンを金属細線で接続し、前記導体パターンと前
記バイアス回路をはんだ付けされた金属線または導電性
接着剤で接着された金属線で接続して構成しζいる。
Means for Solving the Problems The present invention provides a semiconductor element, a signal line composed of a microstrip line on a first dielectric substrate, and a signal line composed of a microstrip line on a second dielectric substrate. A bias circuit and a metal carrier are provided, the dielectric constant of the second dielectric substrate is smaller than the dielectric constant of the first dielectric substrate, and a pattern is connected to the signal line on the first dielectric substrate. The signal line and the conductor pattern are connected with a thin metal wire, and the conductor pattern and the bias circuit are connected with a soldered metal wire or a metal wire bonded with a conductive adhesive. It is composed of ζ.

作用 本発明は上記した構成により、第2の誘電体基板の誘電
率が第1の誘電体基板の誘電率よりも低いため、バイア
ス回路の高インピーダンス線路のインピーダンスを高く
することができ、優れた低域通過フィルタ特性を得るこ
とができる。また、信号線路に直接接続しているのは金
属細線であるため、バイアス回路は信号線路にほとんど
影響を与えることがない。
Effect of the present invention With the above-described configuration, the dielectric constant of the second dielectric substrate is lower than the dielectric constant of the first dielectric substrate, so that the impedance of the high impedance line of the bias circuit can be increased. Low-pass filter characteristics can be obtained. Furthermore, since the thin metal wire is directly connected to the signal line, the bias circuit has almost no effect on the signal line.

実施例 第1図に本発明の実施例におけるマイクロ波集積回路装
置の構成図を示す。第1図において、1は半導体素子、
2はアルミナセラミック製の信号線路用誘電体基板、3
は信号線路、4は四フッ化エチレン材質のバイアス回路
用誘電体基板、5はバイアス回路、6は金属細線、7は
接続用パターン、8は金属線、9はバイアス端子である
Embodiment FIG. 1 shows a configuration diagram of a microwave integrated circuit device in an embodiment of the present invention. In FIG. 1, 1 is a semiconductor element;
2 is a dielectric substrate for signal line made of alumina ceramic, 3
4 is a signal line, 4 is a bias circuit dielectric substrate made of tetrafluoroethylene, 5 is a bias circuit, 6 is a thin metal wire, 7 is a connection pattern, 8 is a metal wire, and 9 is a bias terminal.

信号線路3は信号線路用誘電体基板2上にマイクロスト
リップ線路で構成されており、バイアス回路5はバイア
ス回路用誘電体基板4上にマイクロストリップ線路で構
成されている。バイアス回路5は線路幅の狭い4分の1
波長の長さの高インピーダンス線路と線路幅の広い4分
の1波長の長さの低インピーダンス線路を組み合わせた
低域通過フィルタである。バイアス回路用誘電体基板4
の誘電率は信号線路用誘電体基板2の誘電率よりも高い
、信号線路用誘電体基板2上には信号線路3とは離れて
接続用パターン7が設けられている。
The signal line 3 is formed of a microstrip line on the dielectric substrate 2 for signal line, and the bias circuit 5 is formed of a microstrip line on the dielectric substrate 4 for bias circuit. Bias circuit 5 is a narrow quarter of the line width
This is a low-pass filter that combines a wavelength-long high-impedance line and a quarter-wavelength low-impedance line with a wide line width. Bias circuit dielectric substrate 4
A connection pattern 7 is provided on the signal line dielectric substrate 2 , which has a dielectric constant higher than that of the signal line dielectric substrate 2 , apart from the signal line 3 .

バイアス回路5の一端は金属線8によって接続用パター
ン7と接続され、バイアス回路5の他端はバイアス端子
9に接続されている。金属細線6は接続用パターン7と
信号線路3の中央部とを接続している。
One end of the bias circuit 5 is connected to the connection pattern 7 by a metal wire 8, and the other end of the bias circuit 5 is connected to a bias terminal 9. The thin metal wire 6 connects the connection pattern 7 and the center of the signal line 3.

以上のように構成された第1の実施例のマイクロ波集積
回路装置の動作を以下に説明する。第1図において半導
体素子1はバイアス端子9からバイアス回路5.金属線
8.接続用パターン7、金属細線6.信号線路3を介し
て給電される。バイアス回路5は低域通過フィルタであ
り、信号線路3を伝わる信号成分がバイアス端子9に伝
わるのを阻止し、直流成分を通過させる。一般に同じ線
路幅のマイクロストリップ線路においては誘電体基板の
誘電率が低いほど、また、誘電体基板の厚みが厚いほど
線路のインピーダンスは高くなる。
The operation of the microwave integrated circuit device of the first embodiment configured as described above will be explained below. In FIG. 1, a semiconductor device 1 is connected to a bias terminal 9 through a bias circuit 5. Metal wire8. Connection pattern 7, thin metal wire 6. Power is supplied via the signal line 3. The bias circuit 5 is a low-pass filter, and blocks the signal component transmitted through the signal line 3 from being transmitted to the bias terminal 9, and allows the DC component to pass. Generally, in microstrip lines having the same line width, the lower the dielectric constant of the dielectric substrate and the thicker the dielectric substrate, the higher the impedance of the line.

第1図においてはバイアス回路用誘電体基板4の誘電率
は信号線路用誘電体基板2の誘電率よりも低く、バイア
ス回路用誘電体基板4と信号線路用誘電体基板2の厚み
はほぼ同じである。マイクロストリップ線路の線路幅を
狭くするのにも限界があるため、バイアス回路用誘電体
基板4上にマイクロストリップ線路を構成した方が、信
号線路用誘電体基板2上にマイクロストリップ線路を構
成した場合よりも高いインピーダンスを実現できる。
In FIG. 1, the dielectric constant of the bias circuit dielectric substrate 4 is lower than that of the signal line dielectric substrate 2, and the bias circuit dielectric substrate 4 and the signal line dielectric substrate 2 have approximately the same thickness. It is. Since there is a limit to narrowing the line width of the microstrip line, it is better to configure the microstrip line on the dielectric substrate 4 for the bias circuit than it is to configure the microstrip line on the dielectric substrate 2 for the signal line. It is possible to achieve higher impedance than in the case of

また、金属細線6のインピーダンスは十分に高く、信号
線路3の中央部に接続しているために、信号線路3の端
に接続する場合に比べて信号線路3に与える影響は少な
い。従って、優れたバイアス回路5の低域通過特性を実
現することができる。
Further, since the impedance of the thin metal wire 6 is sufficiently high and it is connected to the center of the signal line 3, it has less influence on the signal line 3 than when connected to the end of the signal line 3. Therefore, excellent low-pass characteristics of the bias circuit 5 can be achieved.

以上のように本実施例によれば、バイアス回路を低誘電
率の誘電体基板上に設け、信号線路を高誘電率の誘電体
基板上に設け、信号線路の中央から金属細線を介してバ
イアスを加えることにより、優れたバイアス回路の低域
通過フィルタ特性を得ることができる。また、信号線路
に対して影響を与えないインピーダンスのバイアス回路
を実現することができる。
As described above, according to this embodiment, the bias circuit is provided on a dielectric substrate with a low dielectric constant, the signal line is provided on a dielectric substrate with a high dielectric constant, and the bias circuit is provided from the center of the signal line through a thin metal wire. By adding , it is possible to obtain excellent low-pass filter characteristics of the bias circuit. Further, it is possible to realize an impedance bias circuit that does not affect the signal line.

発明の詳細 な説明したように、本発明によれば、バイアス回路の低
域通過特性を向上させ、信号線路にバイアス回路が影響
をほとんど与えないマイクロ波集積回路装置を簡単に実
現することができ、その実用的価値は大きい。
As described in detail, according to the present invention, it is possible to easily realize a microwave integrated circuit device in which the low-pass characteristics of the bias circuit is improved and the bias circuit has little influence on the signal line. , its practical value is great.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例におけるマイクロ波集積回路装
置の構成図、第2図は従来のマイクロ波集積回路装置の
上面図を示す。 1・・・・・・半導体素子、2・・・・・・信号線路用
誘電体基板、3・・・・・・信号線路、4・・・・・・
バイアス回路用誘電体基板、5・・・・・・バイアス回
路、6・・・・・・金属細線、7・・・・・・接続用パ
ターン、8・・・・・・金属線、9・旧・・バイアス端
子。
FIG. 1 is a block diagram of a microwave integrated circuit device according to an embodiment of the present invention, and FIG. 2 is a top view of a conventional microwave integrated circuit device. 1...Semiconductor element, 2...Dielectric substrate for signal line, 3...Signal line, 4...
Dielectric substrate for bias circuit, 5...Bias circuit, 6...Metal thin wire, 7...Connection pattern, 8...Metal wire, 9... Old...bias terminal.

Claims (1)

【特許請求の範囲】[Claims] 半導体素子と、第1の誘電体基板上にマイクロストリッ
プ線路で構成された信号線路と、第2の誘電体基板上に
マイクロストリップ線路で構成されたバイアス回路と、
金属キャリアとを備え、前記第2の誘電体基板の誘電率
は前記第1の誘電体基板の誘電率よりも小さく、前記第
1の誘電体基板上に前記信号線路にパターンで接続して
いない導体パターンを設け、前記信号線路と前記導体パ
ターンを金属細線で接続し、前記導体パターンと前記バ
イアス回路をはんだ付けされた金属線または導電性接着
剤で接着された金属線で接続したことを特徴とするマイ
クロ波集積回路装置。
a semiconductor element, a signal line configured with a microstrip line on a first dielectric substrate, and a bias circuit configured with a microstrip line on a second dielectric substrate;
a metal carrier, the second dielectric substrate has a dielectric constant lower than that of the first dielectric substrate, and is not connected to the signal line in a pattern on the first dielectric substrate. A conductor pattern is provided, the signal line and the conductor pattern are connected by a thin metal wire, and the conductor pattern and the bias circuit are connected by a soldered metal wire or a metal wire bonded with a conductive adhesive. Microwave integrated circuit device.
JP1270666A 1989-10-18 1989-10-18 Microwave integrated circuit device Pending JPH03132201A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1270666A JPH03132201A (en) 1989-10-18 1989-10-18 Microwave integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1270666A JPH03132201A (en) 1989-10-18 1989-10-18 Microwave integrated circuit device

Publications (1)

Publication Number Publication Date
JPH03132201A true JPH03132201A (en) 1991-06-05

Family

ID=17489260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1270666A Pending JPH03132201A (en) 1989-10-18 1989-10-18 Microwave integrated circuit device

Country Status (1)

Country Link
JP (1) JPH03132201A (en)

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