JPH03130854A - Bus diagnostic system - Google Patents

Abstract

PURPOSE:To specify a processor, a bus, or a bus controller that caused an error when the presence of this error is detected by checking the normal state of the bus controller at on-line operation. CONSTITUTION:A bus monitoring device 6 transmits a polling signal for selection of a processor which uses the buses 3 and 7 and a selection signal for a bus controller which uses the buses 3 and 7 respectively. Then a terminal bus controller 1 and an extension bus controller 2 receive the bus controller selection signals and apply the data return tests to the processors 4 and 5 connected to the buses 3 and 7 controlled by both controllers when acquiring both buses. Then the controllers 1 and 2 report the results of the return tests to the device 6. Thus the normal states of both controllers 1 and 2 are confirmed at on-line operation. Then the factor of a detected error can be specified.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to a multiprocessor system in which a plurality of processors are connected by a bus, and more specifically, a bus controller connected to the end of the bus for bus expansion. This invention relates to a bus diagnostic method that allows checking the normality of a bus during online operation.

(Prior art) A bus controller in a multiprocessor system is placed in the middle or at the end of the bus, but during online operation, the normality of the bus controller can be checked from the processor side and the bus monitoring function. There wasn't.

(Problems to be Solved by the Invention) Conventional bus controllers only functioned as a relay for communication between processors during online operation, and there was no way to access the bus controller itself from the processor case or bus monitoring function. be.

Therefore, when the processor or bus monitoring function detects a processor or bus error, there is a drawback that it cannot be determined whether the cause of the error is in the processor, bus, or bus controller.

An object of the present invention is to provide a bus diagnostic method for a multiprocessor system that can identify the cause of an error when an error occurs by confirming the normality of the bus controller during online operation.

(&!, Means for Solving the Problem) In order to achieve the above object, the bus diagnosis method according to the present invention includes a plurality of processors, a bus connecting the processors, and a polling signal to select the bus use priority of the processors. In a multi-processor system, the bus monitoring device receives a polling signal for selecting a processor using the bus and a bus controller connected to the middle or end of the bus to expand the processor and bus. When the bus controller receives the bus controller selection signal and acquires the bus, it performs a data loopback test on the processors connected to the bus under the bus controller. and reports the results to the bus monitoring device.

(Example) Hereinafter, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a multiprocessor system to which a bus diagnosis method according to the present invention is applied.

A plurality of processors 4 are connected to the bus 3, and a bus monitoring device 6 selects the bus usage priority of the processors. bus 3
An expansion bus controller 2 is connected, the bus T is extended, and a processor 5 is added. The bus T is terminated by a bus controller 1.

The bus controller 2 includes a bus selection request circuit.

FIG. 2 is a timing chart showing an example of a polling signal and a selection signal sent out by the bus monitoring device 6.

a is the polling synchronization signal during normal online operation, b
C is a processor selection signal, C is a polling synchronization signal during bus controller diagnosis, and dFi bus controller selection signal.

During normal online operation, the bus monitoring device 6 is set to a.

A polling signal for selecting a processor b is sent out, but when a bus controller diagnosis command is received from a program (not shown), a polling signal for diagnosing a bus controller C and d is sent out.

The polling synchronization signal C has a waveform that outputs two consecutive pulses, and the bus controller selection signal d has a waveform that outputs pulses equal to the number of bus controller numbers assigned to the bus controllers.

When the bus controller 2Fi receives the polling synchronization signal C, it enables the bus selection request circuit and counts the number of pulses of the bus controller selection signal, and when the next polling synchronization signal C is output, the own bus controller number and If they match, a bus busy signal is output on bus 3. Then, the bus controller 2 performs a data return test on the processors under its control one by one, and if no error is detected, it sends a bus controller test 11tl+complete command to the lotus monitoring device 6. Furthermore, when an error is detected, error data, the processor number where the error occurred, and a bus controller test end command are transmitted.

and release the bus.

When the bus monitoring device 6Vi bus controller test end command is received, it is reported to the program and returns to normal online operation.

(Effects of the Invention) As explained above, the present invention is configured so that the normality of the bus controller can be checked during online operation. This has the effect of identifying the cause of the problem.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a multiprocessor system employing the bus diagnosis method according to the present invention, and FIG. 2 shows the relationship between the polling synchronization signal and each selection signal to explain the embodiment of this bus diagnosis method. This is a timing chart. 1... Terminal bus controller 2... Expansion bus controller 3. 7... Bus 4... Processor 5... Added processor 6... - Bus monitoring device patent issued Japan Telecommunication System Agent Co., Ltd.

Claims (1)

[Claims] A plurality of processors, a bus that connects the processors, a bus monitoring device that selects bus use priority among the processors based on a polling signal, and a bus monitoring device that is connected in the middle or at the end of the bus to expand the processors and the bus. In a multiprocessor system comprising a bus controller, the bus monitoring device sends out a polling signal for selecting a processor that uses the bus and a selection signal for the bus controller that uses the bus, and the bus controller receives the selection signal for the bus controller. 1. A bus diagnostic method, characterized in that when a bus is obtained through a bus controller, a data return test is performed on a processor connected to the bus under the bus controller, and the result is reported to the bus monitoring device.