JPH03129877A - Manufacture of read-only semiconductor memory device - Google Patents

Abstract

PURPOSE:To shorten a manufacturing process by a method wherein a MOS transistor of stacked gate structure is used as a memory cell, and data are written in at a time by the selective irradiation of ultraviolet rays before a sealing and assembling process. CONSTITUTION:A floating gate 4 and a control gate 6 are provided onto the primary surface of a semiconductor substrate 1 to form a MIS field effect transistor, and cells formed of the MISFET transistors are arranged in matrix. As a positive voltage is applied on the control gate 6 of the memory cell, the memory cell matrix is selectively irradiating with ultraviolet rays using a mask 8 of a pattern required to be stored to inject electrons into the floating gate 4 of the prescribed cell to write data. By this setup, a memory device of this design can be shortened in manufacturing process.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor memory device (hereinafter referred to as ROM), and particularly relates to a method of storing (coding) a program. ROMs that use MoS transistors include (i) mask ROMs that store programs during manufacturing, and (ii) ROMs that store electrons in floating electrodes of two-layer structure electrodes by applying high voltage after manufacturing. , EPROMs that store programs are known.

[Problem to be solved by the invention]

Among the conventional MOS type ROMs mentioned above, mask ROMs are used to store programs during the manufacture of ICs.
It has the disadvantage that there are many subsequent steps and the construction period is long. In addition, the EPROM (ii) uses high voltage when storing data, so it must have a circuit for applying high voltage, and it cannot store data at once, so it takes a long time to complete program storage. It has the disadvantage of being expensive.

[Means to solve the problem]

The method for manufacturing a read-only semiconductor memory device of the present invention includes forming memory cells in a matrix shape, each consisting of an MIS field effect transistor, in which a floating gate electrode and a control gate electrode are provided on one main surface of a semiconductor substrate with a gate insulating film interposed therebetween. and writing information by selectively irradiating the memory cell matrix with ultraviolet rays while applying a positive voltage to the control gate electrode of the memory cell to inject electrons into the floating gate electrode of a predetermined memory cell. It is said that it has a process of carrying out.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) and 1(b) are schematic cross-sectional views arranged in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1(a), a memory device consisting of a MoS transistor in which a floating gate electrode 4 and a control gate electrode 6 are provided on one main surface of a p-type St substrate 1 with a first gate oxide film 3 interposed therebetween. Prepare cells arranged in a matrix. This MOS) transistor is a stacked gate avalanche injection type MMOS transistor used in conventional EPROMs.
It is the same as O8) transistor (SAMOS transistor). It is different from a memory in that it does not use high voltage for writing.

The n-type drain region 2d, n-type source region 2s, and control gate electrode 6 of all memory cells are grounded. However, the control gate electrode may be in a floating state, so that
The entire surface of the memory cell matrix is irradiated with ultraviolet light to release the electrons stored in the floating gate electrode during the manufacturing process (
erased state).

This is the same as the information erasing method of EPROM using SAMOS.As shown in FIG. to create areas that will be exposed to UV rays and areas that will not. In a transistor that is irradiated with ultraviolet rays, hot electrons are generated in the p-type Si substrate 1 due to the ultraviolet rays and are injected into the floating gate electrode. In a transistor that is not irradiated with ultraviolet rays, such injection of electrons does not occur; when enough electrons are stored in the floating gate electrode, irradiation with ultraviolet rays is stopped and information writing is completed.

It should be noted that during the erasing and writing operations, it is not necessary to always bias under the above-mentioned conditions, and the entire surface of the memory cell matrix may be scanned by sequentially addressing the memory cells.

〔Effect of the invention〕

As explained above, the present invention uses a stacked gate structure MOS transistor as a memory cell, and allows information to be written all at once by selective irradiation with ultraviolet rays, and this writing operation is performed before the encapsulation and assembly process. This is a particularly interesting idea, leading to shorter process steps and improved yields. Furthermore, since the voltage during writing does not need to be higher than the power supply voltage, there is no need to incorporate a high voltage generation circuit into the IC, which has the effect of making it possible to downsize the chip.

It is a cross-sectional schematic diagram shown in order of steps for explanation.

DESCRIPTION OF SYMBOLS 1...p-type Si substrate, 2d...n-type drain diffusion layer, 2s...-n-type source diffusion layer, 3...first gate oxide film, 4...floating gate electrode (polycrystalline silicon),
5... Second gate oxide film, 6... Control gate electrode,
7...Mask.

Claims (1)

[Claims] A step of forming memory cells in a matrix shape consisting of MIS field effect transistors in which floating gate electrodes and control gate electrodes are provided on one main surface of a semiconductor substrate with a gate insulating film interposed therebetween; A read-only semiconductor comprising the step of selectively irradiating the memory cell matrix with ultraviolet rays while a voltage is applied to inject electrons into floating gate electrodes of predetermined memory cells to write information. A method for manufacturing a storage device.