JPH0312817B2 - - Google Patents

Info

Publication number
JPH0312817B2
JPH0312817B2 JP58078497A JP7849783A JPH0312817B2 JP H0312817 B2 JPH0312817 B2 JP H0312817B2 JP 58078497 A JP58078497 A JP 58078497A JP 7849783 A JP7849783 A JP 7849783A JP H0312817 B2 JPH0312817 B2 JP H0312817B2
Authority
JP
Japan
Prior art keywords
loop
mode
counterclockwise
clockwise
station
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58078497A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59204339A (ja
Inventor
Kenzo Oono
Yoshinori Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58078497A priority Critical patent/JPS59204339A/ja
Publication of JPS59204339A publication Critical patent/JPS59204339A/ja
Publication of JPH0312817B2 publication Critical patent/JPH0312817B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Time-Division Multiplex Systems (AREA)
JP58078497A 1983-05-04 1983-05-04 ル−プネツトワ−ク制御システム Granted JPS59204339A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58078497A JPS59204339A (ja) 1983-05-04 1983-05-04 ル−プネツトワ−ク制御システム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58078497A JPS59204339A (ja) 1983-05-04 1983-05-04 ル−プネツトワ−ク制御システム

Publications (2)

Publication Number Publication Date
JPS59204339A JPS59204339A (ja) 1984-11-19
JPH0312817B2 true JPH0312817B2 (zh) 1991-02-21

Family

ID=13663598

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58078497A Granted JPS59204339A (ja) 1983-05-04 1983-05-04 ル−プネツトワ−ク制御システム

Country Status (1)

Country Link
JP (1) JPS59204339A (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0771098B2 (ja) * 1986-05-15 1995-07-31 株式会社日立製作所 情報通信方法
JPS62284539A (ja) * 1986-06-02 1987-12-10 Matsushita Electric Ind Co Ltd ル−プネツトワ−ク装置
JPH04127634A (ja) * 1990-09-18 1992-04-28 Mitsubishi Electric Corp ネットワーク制御方式

Also Published As

Publication number Publication date
JPS59204339A (ja) 1984-11-19

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