JPH03125488A - Semiconductor light-emitting device and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a high-quality device by forming a current block layer of one conductivity type on a semiconductor substrate and forming a diffused current path of the opposite conductivity type so as to eliminate both poor reproducibility of etched V-grooves and the degradation in quality and yield due to contamination during dry etching. CONSTITUTION:A p-InP buffer layer 12, an n-InP current block layer 13, and a p-InP clad layer 15 are sequentially deposited on a p-InP substrate 11 in a first step of vapor phase epitaxy. A dielectric film 31 of SiO2 or PSG is formed on the p-InP clad layer 15. The dielectric film is shaped into stripes by photo-lithographic etching. A p-type impurity is introduced to the n-InP current block layer 13 through those portions of the p-InP clad layer 15 where the dielectric film is removed. The impurity creates a current path in part of the n-InP current block layer 13. Then, all the dielectric film is removed. A second step of vapor phase epitaxy is performed to sequentially form an active p-InGaAsP layer 16, an n-InP clad layer 17, and an n-InGaAsP contact layer 18 on the P-InP clad layer 15.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an internal current confinement type semiconductor light emitting device for long distance optical communications and optical measuring instruments, and a method for manufacturing the same.

(Conventional technology) Conventionally, this type of semiconductor light emitting device has been applied
llppliedPhysi
cs Letters)■C3) (1984-8-
1) There are those disclosed in P2S5 to P283. To explain this as shown in FIG. 3, this element is of N type, P type,
Type current blocking layer 1a. It has an internal current confinement layer using N-P reverse bias consisting of (b) and (b) a light emitting layer (active layer) 3 formed in the groove 2 formed by photolithography and etching, resulting in high luminous efficiency. In order to achieve this, it had a double heterostructure in which an active layer 3 that generates light is sandwiched between cladding layers 4a and 4b having a smaller refractive index and a larger energy gap.

(Problems to be Solved by the Invention) However, the conventional elements as described above have the following problems. In the conventional element described above, first, the current blocking layers 1a and 1b for current confinement are crystal-grown, and then the V-groove 2 for a current path is formed.

To form this V-groove 2, photolithography and etching are performed using a dielectric film such as 5i02 as a mask. This etching includes wet etching using hydrochloric acid or bromine, and dry etching using chlorine gas. However, in the case of wet etching, the shape and dimensions of the groove 2 become unstable due to the instability of the temperature of the etching solution and the condition of the semiconductor surface. In addition, the reproducibility of dimensions with respect to design values becomes poor, leading to a decrease in yield. In addition, in the case of dry etching, the surface of the semiconductor after etching and the inside of groove 2 are contaminated by the reaction products of the etching gas and the semiconductor, which deteriorates the crystallinity of each crystal layer formed by the second crystal growth. There was a problem.

This invention is based on wet etching as described above.
It is an object of the present invention to provide a semiconductor light emitting device and a method for manufacturing the same, which can eliminate poor reproducibility of groove shapes and deterioration in quality and yield due to contamination due to dry etching, and can obtain high quality devices with a high yield. do.

(Means for Solving the Problems) The present invention provides an internal current confinement type semiconductor light emitting device having a current blocking layer forming an N-P reverse bias on a semiconductor substrate and using a part of the current blocking layer as a current path, and the semiconductor light emitting device. In the manufacturing method, a current blocking layer of one conductivity type (second conductivity type) is formed on a semiconductor substrate, and an impurity diffusion layer of the opposite conductivity type (first conductivity type) is formed in a part of the current blocking layer as a current path. be.

(Function) The current blocking layer is, for example, N-type, and is formed on a P-type semiconductor substrate with a P-type buffer layer sandwiched therebetween, as shown in FIG. Furthermore, on the current blocking layer (N type),
The P-type lower cladding layer, which is the bottom layer of the double heterostructure, overlaps. Then, the interface between the current blocking layer (N type) and the lower cladding layer (P type) becomes N-P reverse biased, and no current flows. However, if an impurity diffusion layer of the opposite conductivity type (in this case P type) is formed in a part of the current blocking layer (N type), the P type lower cladding layer can be passed through this P type impurity diffusion layer in this part. The P-type substrate side becomes conductive, and current flows concentrated in this part. Furthermore, current can be passed through the active layer on the P-type lower cladding layer by confining the impurity diffusion layer. According to this method of forming a current path using an impurity diffusion layer, there is no contamination as in the case of dry etching, and there is no poor reproducibility as in the case of wet etching (Example). An embodiment will be described with reference to the drawings.

FIG. 1 is a sectional view showing an embodiment of the semiconductor light emitting device of the present invention. In this figure, 11 is the carrier concentration 5
It is a pinP substrate with a carrier concentration of 7XIO"cm-3 and a thickness of 3.0 pta on its surface.
-1 nP buffer layer 12 is formed on it, with a carrier concentration of 4 x 1017 cm- and a thickness of 0.7 pm.
A P current blocking layer 13 is formed. This n-1nP current blocking layer 13 has a carrier concentration of 7×
A P-type impurity diffusion layer 14 of 1017 to 1×10 IIlCI11-3 is formed as a current path. And this P
n-InP current blocking layer 1 including type impurity diffusion layer 14
The entire surface of 3 has a carrier concentration of 4×10110l7,
p-1nP cladding layer 15 with a thickness of 24, carrier concentration 7
XIO”cm-, p-1nGa with thickness 0,1 pm
AsP active layer 16, carrier concentration 7 XIO"cm-,
1.0 μm thick n-1nP cladding layer 17. Carrier concentration I XIOIIlcm-, thickness 1.0p n-In
A GaAsP contact layer 18 is formed in this order, and n
-rnGaAsP contact layer 18 has layer side 8 top 19
is formed.

On the other hand, a P-side electrode 20 is formed on the back surface of the p-1nr' substrate 11. As can be seen from the following description of the manufacturing method, the P-type impurity diffusion layer 14 is formed by introducing impurities through the p4nP cladding layer 15 at the stage when the p-InP cladding layer 15 is laminated on the substrate 11. Since p-
The figure shows that it is also formed in the 1nP cladding layer 15.

In this semiconductor light emitting device, the interface between the n-1nP current blocking layer 13 and the p-InP cladding layer 15 becomes an N-P reverse bias, and no current flows, but in the part where the P-type impurity diffusion layer 14 is formed, is connected to the p-1nP cladding layer 15 and the p-1nP cladding layer 15 through this P-type impurity diffusion layer 14.
The 1nP substrate 11 side becomes conductive, and current flows concentrated in this part. As a result, current flows through the p-1nGaAsP active layer 16 constricted in the portion where the P-type impurity diffusion layer 14 is formed.

The semiconductor light emitting device as described above is shown in FIGS. 2(a) to (f) (
An embodiment of the manufacturing method of the present invention).

First, as shown in FIG. 2(a), the carrier concentration is 5×10
A 350 pm thick p-1nP substrate 11 is prepared.

By the first liquid phase growth method on the p-InP substrate 11, a carrier concentration of 7×10
" cm -, p-1nP buffer layer 12 with a thickness of 3.0 μm, carrier concentration 4 XIO" cm -, thickness 0.7
．． B+m n-1nP current blocking layer 13. P-1nP cladding layer 15 with carrier concentration 4×10”cm and thickness 2mm
Crystals are grown in this order.

Next, as shown in FIG. 2(C), 5i02. A dielectric film (mask layer) 31 made of PSG or the like is formed, and as shown in the figure, the dielectric film 31 is removed in stripes having a width of about 1.5 pm by photolithography and etching.

Thereafter, P-type impurities are introduced into the n-InP current blocking layer 13 from the removed portion of the dielectric film 31 through the p-1nP cladding layer 15 by a method such as thermal diffusion or ion implantation. As shown in Figure 2(d), a part of the carrier concentration is 7×1.
P-type impurity diffusion layer 14 of 0'7 to 1 x 1018 cm-3
is formed as a current path. After that, all of the dielectric film 31 is removed.

Thereafter, a second liquid phase growth is performed on the entire surface of the p-1nP cladding layer 15 to form p-InGaAs with a carrier concentration of 7XIO" and a thickness of 0.1 μm, as shown in FIG. 2(e).
P active layer 16, carrier concentration 7 XIO"cm-, n-InP cladding layer 17. carrier concentration I
XIO”cm-, 1.0mm thick n-InGaAsP
Contact layers 18 are sequentially formed.

After that, p
- After etching or polishing the back surface of the InP substrate 11, as shown in FIG. form. With the above steps, the semiconductor light emitting device shown in FIG. 1 is completed.

In addition, in the above manufacturing method, due to liquid phase growth, p-rn
With the P cladding layer 15 formed, the p-InP
n-1nP current blocking layer 1 through cladding layer 15
3, impurities were implanted to form a P-type impurity diffusion layer 14. However, when up to the n-InP current blocking layer 13 was formed, impurities were directly implanted into this n-1nP current blocking layer 13 to form a P-type impurity. A diffusion layer 14 may also be formed.

(Effects of the Invention) As explained in detail above, according to the present invention, since the current path is formed in the current blocking layer by the impurity diffusion layer, contamination such as when forming a V-groove by dry etching, etc.
It is possible to solve the problem of poor reproducibility when forming grooves by wet etching, and to obtain high-quality semiconductor light-emitting devices with stable dimensions and shapes and good crystallinity of each layer at a high yield.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment of the semiconductor light emitting device of the present invention, FIG. 2 is a process sectional view showing an embodiment of the method for manufacturing the semiconductor light emitting device of the present invention, and FIG. 3 is a conventional semiconductor light emitting device. FIG. 3 is a cross-sectional view showing the element. ] 1-p-1nP substrate 13-ninP current blocking layer, 14...P-type impurity diffusion layer, 31... dielectric film. 11: P-1nP board 77: n-rnP Kupu..., l'P M Honouri Sun Moon element's first part and example number 1 book shoulder 1 act Shito 1 Tarita's C sumo wrestler and ita 1) Fig. 2 552- + 41 days monryo μ sailing power 2 to 15 otsuke F ita・1 2nd
Figure 3

Claims (2)

[Claims] (1) A current blocking layer of a second conductivity type is provided on a semiconductor substrate of a first conductivity type, and a lower cladding layer of a first conductivity type, an active layer, and an upper cladding layer of a second conductivity type are sequentially provided thereon. a semiconductor light emitting device, wherein a first conductivity type impurity diffusion layer is formed as a current path in a part of the current blocking layer. (2) forming a second conductivity type current blocking layer on the first conductivity type semiconductor substrate; forming a first conductivity type lower cladding layer on the current blocking layer; and the lower cladding layer. A first conductivity type impurity is introduced into a part of the current blocking layer through or directly before forming the lower cladding layer to form a first conductivity type impurity diffusion layer as a current path in a part of the current blocking layer. A method for manufacturing a semiconductor light emitting device, comprising the steps of: forming an active layer and an upper cladding layer of a second conductivity type in sequence on the lower cladding layer.