JPH03116849A - Method and device for testing semiconductor device - Google Patents

Abstract

PURPOSE:To increase the accuracy of an evaluation and an analysis by a method wherein a circuit equivalent to a mounting circuit, on which a semiconductor device which is an object to be tested is actually mounted, is connected between a testing device main body and the object to be tested. CONSTITUTION:A plurality of transistor transistor logic circuits are prepared and are installed on an intermediate circuit constituting device 3. In this state, a test signal is exchanged between a testing device main body 1 and a memory IC 10, which is an object to be tested, and the test of prescribed electrical characteristics is executed. At this time, a test signal from the main body 1 is inputted in the memory IC 10 through an input side intermediate circuit 4a and a response signal from the memory IC 10 is replied to the main body 1 through an output side intermediate circuit 4b. As an intermediate circuit 4 is constituted so as to become a circuit equal with a circuit, on which the memory IC 10 is actually used, the above test to the memory IC 10 results in being executed in a state that an actual situation is reproduced. Thereby, in respect to the memory IC 10 a test to correspond to a situation in its actual use is executed, test data to correspond to the test is obtained and an accurate evaluation and analysis can be performed.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a technology for testing semiconductor devices, in particular a technology for testing the electrical characteristics of a semiconductor device, for example, the characteristics of a semiconductor device during the development and design of a new model. It relates to things that are effective for use in evaluation and failure analysis when discovering design flaws.

[Conventional technology]

When developing and designing new models of semiconductor devices,
The electrical characteristics of a developed or designed semiconductor device are tested by a semiconductor device testing device to determine whether it exhibits the desired properties and functions.

In such a case, the semiconductor device to be tested is directly connected to the main body of the test equipment for semiconductor devices via a socket, and electrical communication is performed between the main body and the semiconductor device. The test will be conducted.

Examples of semiconductor device testing techniques include:
Monthly Semicond published by Press Journal Co., Ltd.
"uctor World March 1986 issue" published February 20, 1988, pages 84-94.

Further, as an example of a change board for semiconductor devices, there is Japanese Utility Model Application Publication No. 132772/1983.

[Problem to be solved by the invention]

In this semiconductor device testing method, the signal waveform of the test equipment itself is formed into an ideal shape, so
This is advantageous for measurements that match theoretical values. However, this test situation differs from the actual usage situation where the semiconductor device is mounted on a predetermined board. This is because, in actual usage conditions, distortions, timing shifts, etc. occur in signal waveforms.

If the test conditions differ from the actual usage conditions, it will be difficult to reproduce the defective phenomenon through testing, such as when a failure occurs in the intermittent tent, making accurate evaluation difficult. The inventor of the present invention has revealed that there is a problem in that it is not possible to perform analysis.

An object of the present invention is to provide a semiconductor device testing method and bag that can match test conditions to actual conditions.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

An overview of typical inventions disclosed in this application is as follows.

In other words, a circuit equivalent to the circuit on which the semiconductor device that is the test object is actually mounted is connected to the test equipment main body and the semiconductor device that is the test 5Wi object. It is characterized in that the test is carried out under conditions equivalent to those in which it will be used.

[Effect]

According to the above-mentioned means, a circuit equivalent to the circuit on which the semiconductor device, which is the test object, is actually mounted is connected between the test equipment main body and the test object, so that the test situation can be changed to the actual one. Since it matches the usage situation, the actual usage situation is reproduced in the test. As a result, accurate evaluation and analysis commensurate with actual usage conditions will be ensured.

〔Example〕

FIG. 1 is a circuit diagram showing a semiconductor device testing apparatus according to an embodiment of the present invention.

In this embodiment, a semiconductor device testing apparatus according to the present invention includes a main body 1 for electrically performing a test, and a socket 2 as a connecting device for electrically connecting a semiconductor device as a test object to the main body l. and an intermediate circuit construction device 3 connected between the main body l and the socket 2. The intermediate circuit construction device 3 is configured to be able to detachably connect active elements and passive elements (hereinafter sometimes referred to as components) 5 for configuring the intermediate circuit, and the replacement and selection of these components 5 is possible. Thus, a desired intermediate circuit 4 can be constructed. The intermediate circuit 4 is configured not only to constitute an input side circuit 4a in the direction from the main body 1 side to the socket 2 side, but also to constitute an output side circuit 4b in the direction from the socket 2 side to the main body l side.

Next, a method for testing a semiconductor device, which is an embodiment of the present invention, will be described using the semiconductor device testing apparatus having the above configuration.

In this embodiment, a semiconductor integrated circuit device (hereinafter referred to as a memory IC) 10 having a static access memory built therein is tested. The memory ICl0, which is the test object, is attached to the socket 2 and electrically connected to the main body 1 and the intermediate circuit construction device 3.

On the other hand, components 5 such as active elements and passive elements necessary for constructing a predetermined intermediate circuit 4 are selected and appropriately installed in the intermediate circuit fN construction device 3. The intermediate circuit 4 is constructed so that the memory ICl0, which is the test object, is as similar as possible to the circuit on the mounting board in which it is actually used. As a representative active element, for example, a plurality of transistor transistor logic (TTL) are set and installed in the intermediate circuit construction device 3.

In this embodiment, the main body 1 is directly connected to the V c c terminal of the memory ICl0, which is the object of trial 1, and input to the A dd OR terminal, the C5 terminal, the WE terminal, and the OE terminal of the memory ICl0. The side intermediate circuit 4a is connected, and the output side intermediate circuit 4 is connected to the I10 terminal.
b is connected.

In this state, test signals are exchanged between the test device main body 1 and the memory ICl0, which is the test object, and a predetermined electrical characteristic test is performed.

At this time, the test signal from the test device main body 1 is input to the memory IC10 via the input side intermediate circuit 4a, and the response signal from the memory IC10 is sent back to the main body l via the output side intermediate circuit 4b.

Therefore, the test signal from the test device main body 1 and the response signal from the memory IC 10 are slightly modified by the intermediate circuits 4a and 4b, and the test signal from the main body 1 and the response signal from the memory IC 10 are slightly modified by the intermediate circuits 4a and 4b.
Each will be input to to. Since the intermediate circuit 4 is constructed to be equivalent to the circuit in which the memory ICl0 is actually used, the test for the memory ICl0 is executed in a state where the actual situation is reproduced.

Therefore, with respect to the memory XCl0, which is the test object, tests are performed that are appropriate to the actual usage conditions, and corresponding T&M data is obtained, thereby ensuring accurate evaluation and analysis.

According to the embodiment described above, the following effects can be obtained.

(1)! A: By connecting a circuit equivalent to the mounted circuit on which the semiconductor device that is the test object is actually mounted between the M equipment main body and the test object, the test situation for the semiconductor device in question can be compared to the actual one. Since it matches the usage situation, the actual usage situation is reproduced in the test. As a result, it is possible to ensure accurate evaluation and analysis of the semiconductor device, which is the test object, in accordance with the actual usage conditions.

0) By reproducing the actual usage conditions, it is possible to ensure accurate evaluation and analysis of the semiconductor devices to be inspected, commensurate with the actual usage conditions, thereby speeding up the development and design of new models of semiconductor devices. It becomes possible to respond accordingly.

(3) Since it is possible to evaluate and analyze a semiconductor device without actually mounting the semiconductor device on a mounting board, equipment costs, development costs, etc. can be reduced.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.

For example, as an intermediate circuit, you can use the actual circuit that is actually used for the semiconductor device that is the test object. & If the board can be prepared manually, the mounting board may be used as an intermediate circuit to connect the test apparatus main body and the semiconductor device to be tested.

As active elements constituting the intermediate circuit, for example, for low power Schottky, advanced Schottky, and advanced low power Schottky, T.
TL etc., high speed CMO3, CMO5
etc. can be used.

In the above explanation, the invention made by the present inventor was mainly applied to the test technology of Statinoke random access memory IC, which is the field of application that formed the background of the invention, but it is not limited to this. It can be used in general tests for other semiconductor devices such as logic devices.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

By connecting a circuit equivalent to the circuit on which the semiconductor device that is the test object is actually mounted between the test equipment itself and the test object, the test conditions for the semiconductor device match the actual usage conditions. Therefore, actual usage conditions are reproduced in the test. As a result, trial 1
Accurate evaluation and analysis commensurate with the actual usage conditions of the semiconductor device, which is the object to be folded, will be ensured.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a semiconductor device testing apparatus according to an embodiment of the present invention. ■・・・Test device body, 2...Socket (connection device)
, 3... Intermediate circuit construction device, 4... Intermediate circuit, 4a
...Input side intermediate circuit, 4b...Output side intermediate circuit, 5
...Intermediate circuit construction parts, 10...Memory IC (semiconductor device).

Claims (1)

[Claims] 1. The test device main body and the semiconductor device as the test object,
A circuit equivalent to the mounted circuit on which the semiconductor device to be tested is actually mounted is connected, and the test is performed under conditions equivalent to the conditions in which the semiconductor device to be tested is actually used. Characteristic testing method for semiconductor devices. 2. The method for testing a semiconductor device according to claim 1, wherein the equivalent circuit is a mounted circuit in which the semiconductor device to be tested is actually used. 3. An intermediate circuit is replaceably connected to the test equipment main body and a connecting device for electrically connecting a semiconductor device, which is the test object, to the test equipment main body, and this intermediate circuit is connected to the test equipment main body. A semiconductor device testing device characterized in that a certain semiconductor device is configured to be equivalent to a mounted circuit that is actually used.