JPH03116777A - Method of designing wiring of integrated circuit - Google Patents

Abstract

PURPOSE:To avoid the wasteful search for deciding detailed wiring so as to decide detailed wiring efficiently by deciding a detailed wiring path within the rough wiring path region for every wiring unit, and in case that the decision of the detailed wiring within the region is unable, by expanding the rough wiring path region by proper standard so as to decide the detailed wiring again in its region. CONSTITUTION:A rough wiring path region is decided for every wiring unit, and the results are stored in a storage region. Next, a detailed wiring path is decided within the rough wiring path region for every wiring unit stored in this storage region. Next, the judgement on whether the detailed wiring path decision is possible or not is done, and in case that the detailed wiring path decision is impossible in this rough wiring path region due to a wiring passage inhibited region 24, the initial rough wiring path region 21 is expanded to an expanded rough wiring path region 22 by a rough wiring expansion means. Hereby, the detailed wiring path 23 is decided within the expanded rough wiring path region 22.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a wiring design method for integrated circuits, and in particular to a wiring design method for integrated circuits such as gate array integrated circuits that efficiently and automatically wires a certain area. .

[Conventional technology]

Conventionally, this type of wiring design method either determines the detailed wiring route over the entire surface of the chip without determining the general wiring route area, or determines the general wiring route area only once and then determines the detailed wiring route within that area. There is.

[Problem to be solved by the invention]

In the conventional wiring design method described above, when determining a detailed route over the entire chip without determining the general route, the search area for determining the detailed route covers the entire chip, resulting in a huge amount of search data and efficient detailed wiring. The disadvantage is that the route cannot be determined.

In addition, if the general wiring route area is calculated only once and the detailed wiring route is determined within that area, the search area is limited, so even if the detailed route extends beyond the area within the general wiring route, it may not be possible to determine it. There are drawbacks.

An object of the present invention is to provide a wiring design method for an integrated circuit that efficiently determines detailed wiring routes and solves the problem of not being able to determine detailed wiring routes even though detailed routes exist.

[Means to solve the problem]

The integrated circuit wiring design method of the present invention includes a means for determining a general wiring route area for each wiring unit, a means for determining detailed wiring within the general wiring route area, and a determination as to whether or not detailed wiring route determination is possible. means for determining whether the general wiring area has been extended to a predetermined area; and means for determining whether the general wiring route has been extended to a predetermined area; and is configured to repeat the search until the detailed wiring route is determined or until the detailed route cannot be determined even if the general wiring route area is expanded to a predetermined area. Ru.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a flowchart of wiring design for an integrated circuit for explaining the present invention in detail.

As shown in FIG. 1, the wiring design method of the present invention includes a means 1 for determining an approximate wiring route area for each wiring unit, and a storage storage area 2 for storing the results of determining the approximate wiring route area.
, means 3 for determining detailed wiring within the general wiring route area, means 4 for determining whether detailed wiring route determination is possible or not, and whether the general wiring area has been expanded to a predetermined area. and a means 5 for expanding the approximate wiring route based on certain criteria if detailed route determination is not possible.

First, a rough wiring route area is determined 1 for each wiring unit, and the results are stored in a storage area 2. Next, detailed wiring route determination 3 is performed within the general wiring route area for each wiring unit stored in this storage area 2. Next, a judgment 4 is made to determine whether detailed wiring route determination is possible, and if it is not possible, expansion 6 of the general wiring route area based on a predetermined method is performed.
and 5 are performed, and the expanded schematic wiring route area is stored in the storage area 2 again. After that, detailed wiring route determination 3
repeat. If the general wiring route has already been extended to a predetermined area in the detailed wiring route determination determination step 4, the process ends without detailed wiring being possible.

FIG. 2 is a wiring pattern diagram on a chip for explaining the first embodiment of the present invention.

As shown in FIG. 2, in this embodiment, an area 21 on a chip 20 is a wiring unit consisting of wiring terminals 28 and 29, and is determined by the rough wiring route area determining means 1 shown in FIG. This is an initial rough wiring route area for each wiring. However, here, due to the wiring prohibited area 24, detailed wiring route determination is impossible within this general wiring route area. Therefore, the initial rough wiring route area 21 is expanded to the rough wiring expansion means 5.
The route is expanded to the expanded general wiring route area 22 by the following steps. As a result, the detailed wiring route 2 within the expanded general wiring route area 22
3 is determined.

FIG. 3 is a wiring pattern diagram on a chip for explaining a second embodiment of the present invention.

As shown in FIG. 3, in this embodiment, an area 31 on a chip 30 is an initial rough wiring route area obtained at the beginning of a wiring unit consisting of wiring terminals 37, 38, and 39, and an area 32 is the first extended general wiring route area obtained by the first expansion. In this embodiment, detailed wiring cannot be determined even at this stage because there is a wiring prohibited area 34. Therefore, as in area 33, The second expanded general wiring route area is expanded, and this results in detailed wiring route 3.
5 can be determined.

〔Effect of the invention〕

As explained above, in the integrated circuit wiring design method of the present invention, detailed wiring routes are determined within the general wiring route area for each wiring unit, and if detailed wiring cannot be determined within that area, appropriate standards are used. By expanding the general wiring route area and re-determining detailed wiring within that area, it is possible to avoid wasteful searches for determining detailed wiring, so detailed wiring can be determined efficiently. This has the effect of reducing situations where a detailed wiring route cannot be determined even though there is a detailed wiring route.

[Brief explanation of drawings]

FIG. 1 is a wiring design flow diagram of an integrated circuit for explaining the present invention in detail, FIG. 2 is a wiring pattern diagram on a chip for explaining the first embodiment of the present invention, and FIG. FIG. 7 is a wiring pattern diagram on a chip for explaining a second embodiment of the invention. DESCRIPTION OF SYMBOLS 1... General wiring route area determining means, 2... General wiring route storage storage area, 3... Detailed wiring route determining means, 4
. . . detailed wiring route determination determining means, 5 . . . general wiring expansion means, 6 . . . general wiring route area expansion sufficient determination means,
20.30...Chip, 21.31...Initial schematic wiring route area, 22, 32.33...Extended schematic wiring route area, 23.35...Detailed wiring route, 24°34...
・Wiring prohibited area, 28, 29.37° 38.39・
・Terminal for each wiring.

Claims (1)

[Claims] means for determining a general wiring route area for each wiring unit; means for determining detailed wiring within the general wiring route area; means for determining whether detailed wiring route determination is possible; means for determining whether or not the detailed wiring route has been extended to a predetermined area; and means for extending the general wiring route based on a certain criterion when the detailed wiring route cannot be determined; Is the route determined?
A wiring design method for an integrated circuit, characterized in that the search is repeated until a detailed route cannot be determined even if the general wiring route area is expanded to a predetermined area.