JPH03114224A - Formation of electrode - Google Patents
Formation of electrodeInfo
- Publication number
- JPH03114224A JPH03114224A JP25308089A JP25308089A JPH03114224A JP H03114224 A JPH03114224 A JP H03114224A JP 25308089 A JP25308089 A JP 25308089A JP 25308089 A JP25308089 A JP 25308089A JP H03114224 A JPH03114224 A JP H03114224A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- semiconductor substrate
- target
- forming
- aluminum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015572 biosynthetic process Effects 0.000 title description 4
- 239000004065 semiconductor Substances 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims abstract description 9
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 7
- 238000004544 sputter deposition Methods 0.000 claims abstract description 7
- 229910000838 Al alloy Inorganic materials 0.000 claims abstract 2
- 238000010438 heat treatment Methods 0.000 abstract description 4
- 229910052751 metal Inorganic materials 0.000 abstract description 2
- 239000002184 metal Substances 0.000 abstract description 2
- 238000001556 precipitation Methods 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Landscapes
- Physical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、半導体基板上への電極の形成方法に関する
。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of forming an electrode on a semiconductor substrate.
電極をスパッタリング法で形成する際、使用するターゲ
ットをアルミニウムに０．７５〜０．８５ｗｔ％Ｓｉを
含有させたターゲットを使用することで、低いＳｉ濃度
の電極が得られる形成方法を提供する。When forming an electrode by sputtering, a forming method is provided in which an electrode with a low Si concentration can be obtained by using a target made of aluminum containing 0.75 to 0.85 wt% Si.
従来、スパッタリング法で電極を形成する際、アルミニ
ウムに１．Ｏｗｔ％Ｓｔを含有させたターゲットを使用
する事が知られている。Conventionally, when forming electrodes by sputtering, aluminum is coated with 1. It is known to use a target containing Owt%St.
（発明が解決しようとする課題〕
電極形成後の熱処理での電極中のＳｉ溶解度は０゜５！
１ｔ％であり、従来のターゲットを使用した形成方法で
は、余分な０．５ｗｔ％のＳｉがコンタクトホール内の
半導体基板と電極の界面に析出し、接触抵抗を増大させ
半導体装置の動作を妨げる。(Problem to be solved by the invention) The solubility of Si in the electrode during heat treatment after electrode formation is 0°5!
In the conventional formation method using a target, an extra 0.5 wt% of Si is deposited at the interface between the semiconductor substrate and the electrode in the contact hole, increasing contact resistance and hindering the operation of the semiconductor device.
（ｆｆｌａを解決するための手段〕
上記の問題点を解決するために、電極を形成するスパッ
タリングに使用するターゲットを、アルミニウムに０．
７５〜０．８５ｗｔ％Ｓｉ含有の物を使う事で、形成さ
れた電極中の３１４度を０．７５〜０．８５ｗｔ％とな
るようにした。(Means for solving ffla) In order to solve the above problems, the target used for sputtering to form electrodes is made of aluminum with 0.
By using a material containing 75 to 0.85 wt% Si, the 314 degrees in the formed electrode was made to be 0.75 to 0.85 wt%.
上記のようなターゲットを用いて、スパッタリングにて
電極を形成する事で、後の熱処理工程においてコンタク
トホール内の半導体基板と、電極界面のＳｉ析出を少な
（する事ができ、接触抵抗の増加を防止する。By forming the electrode by sputtering using the above target, it is possible to reduce Si precipitation at the interface between the semiconductor substrate in the contact hole and the electrode in the subsequent heat treatment process, thereby reducing the increase in contact resistance. To prevent.
以下にこの発明の実施例を図面に基づいて説明する。第
１図ｔａｌにおいてコンタクトホール部の電極表面から
半導体基板までのＳｉ濃度分布グラフを示す。斜線で示
されている面積に相当するＳｉが析出するＳｉｌであり
、第１図ｆｂｌのコンタクトホール内の電極２と半導体
基板４の界面に析出したＳｉ５として示す、この世は第
２図で示される従来の形成方法のものより少ない。Embodiments of the present invention will be described below based on the drawings. FIG. 1 shows a Si concentration distribution graph from the electrode surface of the contact hole portion to the semiconductor substrate. This is Si deposited in an area corresponding to the shaded area, and is shown as Si5 deposited at the interface between the electrode 2 and the semiconductor substrate 4 in the contact hole of FIG. 1, as shown in FIG. 2. less than that of conventional forming methods.
この発明は、以上説明したように半導体基板上にスパッ
タリング法で電極を形成する際、アルミニウムに０．７
５〜０．８５ｗｔ％Ｓｉ含有のターゲットを使うことで
、電極形成後の熱処理において電極と半導体基板界面に
析出する５ｉｉｉを少なくし、接触抵抗の増大を防止で
き、微細パターンの金属配線層を実現できる。As explained above, in this invention, when forming electrodes on a semiconductor substrate by sputtering, aluminum has a 0.7
By using a target containing 5 to 0.85 wt% Si, it is possible to reduce the amount of 5III deposited at the interface between the electrode and the semiconductor substrate during the heat treatment after electrode formation, prevent an increase in contact resistance, and realize a metal wiring layer with a fine pattern. can.
第１図１ａ）は本発明の形成方法の５ｉｆＱ度分布を示
すグラフ、（ｂｌは本発明により形成された半導体装置
の断面図、第２図＋ａｌは従来の形成方法のＳｉ’４度
分布を示すグラフ、（ｂｌは従来の方法により形成され
た半導体装置の断面図である。
・析出するＳｉ
・電極
・絶縁膜
・半導体基板
・析出したＳｔ
以上FIG. 1(a) is a graph showing the 5ifQ degree distribution of the forming method of the present invention, (bl is a cross-sectional view of a semiconductor device formed by the present invention, and FIG. 2+al is a graph showing the Si'4 degree distribution of the conventional forming method. In the graph shown, (bl is a cross-sectional view of a semiconductor device formed by a conventional method. - Precipitated Si - Electrode - Insulating film - Semiconductor substrate - Deposited St)
Claims (1)
形成する工程において、アルミニウムに０．７５〜０．
８５ｗｔ％Ｓｉを含有させたターゲットを使用すること
を特徴とした電極の形成方法。In the step of forming an aluminum alloy on a semiconductor substrate by a sputtering method, aluminum has a thickness of 0.75 to 0.
A method for forming an electrode, characterized by using a target containing 85 wt% Si.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25308089A JPH03114224A (en) | 1989-09-27 | 1989-09-27 | Formation of electrode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25308089A JPH03114224A (en) | 1989-09-27 | 1989-09-27 | Formation of electrode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03114224A true JPH03114224A (en) | 1991-05-15 |
Family
ID=17246214
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25308089A Pending JPH03114224A (en) | 1989-09-27 | 1989-09-27 | Formation of electrode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03114224A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990009632A (en) * | 1997-07-10 | 1999-02-05 | 성재갑 | Disposable absorbent articles with reusable waist elastic belts including vents |
| DE4222142B4 (en) * | 1991-07-08 | 2006-08-03 | Samsung Electronics Co., Ltd., Suwon | Semiconductor device with a wiring layer and method for its production |
-
1989
- 1989-09-27 JP JP25308089A patent/JPH03114224A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4222142B4 (en) * | 1991-07-08 | 2006-08-03 | Samsung Electronics Co., Ltd., Suwon | Semiconductor device with a wiring layer and method for its production |
| KR19990009632A (en) * | 1997-07-10 | 1999-02-05 | 성재갑 | Disposable absorbent articles with reusable waist elastic belts including vents |
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